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| author | Richard Henderson | 2022-02-08 07:40:00 +0100 |
|---|---|---|
| committer | Richard Henderson | 2022-02-08 22:47:48 +0100 |
| commit | 9940799bdea5d456fdbc11d10f355755843063e9 (patch) | |
| tree | 6b1fd3a23ae364c87180061be7c68518ba71397c /linux-user/include/host/arm/host-signal.h | |
| parent | linux-user: Introduce host_signal_mask (diff) | |
| download | qemu-9940799bdea5d456fdbc11d10f355755843063e9.tar.gz qemu-9940799bdea5d456fdbc11d10f355755843063e9.tar.xz qemu-9940799bdea5d456fdbc11d10f355755843063e9.zip | |
linux-user: Introduce host_sigcontext
Do not directly access ucontext_t as the third signal parameter.
This is preparation for a sparc64 fix.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'linux-user/include/host/arm/host-signal.h')
| -rw-r--r-- | linux-user/include/host/arm/host-signal.h | 11 |
1 files changed, 7 insertions, 4 deletions
diff --git a/linux-user/include/host/arm/host-signal.h b/linux-user/include/host/arm/host-signal.h index bbeb4ffefb..faba496d24 100644 --- a/linux-user/include/host/arm/host-signal.h +++ b/linux-user/include/host/arm/host-signal.h @@ -11,22 +11,25 @@ #ifndef ARM_HOST_SIGNAL_H #define ARM_HOST_SIGNAL_H -static inline uintptr_t host_signal_pc(ucontext_t *uc) +/* The third argument to a SA_SIGINFO handler is ucontext_t. */ +typedef ucontext_t host_sigcontext; + +static inline uintptr_t host_signal_pc(host_sigcontext *uc) { return uc->uc_mcontext.arm_pc; } -static inline void host_signal_set_pc(ucontext_t *uc, uintptr_t pc) +static inline void host_signal_set_pc(host_sigcontext *uc, uintptr_t pc) { uc->uc_mcontext.arm_pc = pc; } -static inline void *host_signal_mask(ucontext_t *uc) +static inline void *host_signal_mask(host_sigcontext *uc) { return &uc->uc_sigmask; } -static inline bool host_signal_write(siginfo_t *info, ucontext_t *uc) +static inline bool host_signal_write(siginfo_t *info, host_sigcontext *uc) { /* * In the FSR, bit 11 is WnR, assuming a v6 or |