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author | Anthony Liguori | 2013-07-10 17:54:16 +0200 |
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committer | Anthony Liguori | 2013-07-10 17:54:16 +0200 |
commit | 51455c59ddc370612f6e070d8eb0e594aaa7ef24 (patch) | |
tree | a3044bd466cb3a548e6abad273663469bf68647a /linux-user/sparc/target_cpu.h | |
parent | Merge remote-tracking branch 'riku/linux-user-for-upstream' into staging (diff) | |
parent | cpu: Move reset logging to CPUState (diff) | |
download | qemu-51455c59ddc370612f6e070d8eb0e594aaa7ef24.tar.gz qemu-51455c59ddc370612f6e070d8eb0e594aaa7ef24.tar.xz qemu-51455c59ddc370612f6e070d8eb0e594aaa7ef24.zip |
Merge remote-tracking branch 'afaerber/tags/qom-cpu-for-anthony' into staging
QOM CPUState refactorings
* Fix for OpenRISCCPU subclasses
* Fix for gdbstub CPU selection
* Move linux-user CPU functions into new header
* CPUState part 10 refactoring: first_cpu, next_cpu, cpu_single_env et al.
* Fix some targets to consistently inline TCG code generation
* Centrally log CPU reset
# gpg: Signature made Wed 10 Jul 2013 07:52:39 AM CDT using RSA key ID 3E7E013F
# gpg: Can't check signature: public key not found
# By Andreas Färber (41) and others
# Via Andreas Färber
* afaerber/tags/qom-cpu-for-anthony: (43 commits)
cpu: Move reset logging to CPUState
target-ppc: Change LOG_MMU_STATE() argument to CPUState
target-i386: Change LOG_PCALL_STATE() argument to CPUState
log: Change log_cpu_state[_mask]() argument to CPUState
target-i386: Change do_smm_enter() argument to X86CPU
target-i386: Change do_interrupt_all() argument to X86CPU
target-xtensa: Change gen_intermediate_code_internal() arg to XtensaCPU
target-unicore32: Change gen_intermediate_code_internal() signature
target-sparc: Change gen_intermediate_code_internal() argument to SPARCCPU
target-sh4: Change gen_intermediate_code_internal() argument to SuperHCPU
target-s390x: Change gen_intermediate_code_internal() argument to S390CPU
target-ppc: Change gen_intermediate_code_internal() argument to PowerPCCPU
target-mips: Change gen_intermediate_code_internal() argument to MIPSCPU
target-microblaze: Change gen_intermediate_code_internal() argument types
target-m68k: Change gen_intermediate_code_internal() argument to M68kCPU
target-lm32: Change gen_intermediate_code_internal() argument to LM32CPU
target-i386: Change gen_intermediate_code_internal() argument to X86CPU
target-cris: Change gen_intermediate_code_internal() argument to CRISCPU
target-arm: Change gen_intermediate_code_internal() argument to ARMCPU
target-alpha: Change gen_intermediate_code_internal() argument to AlphaCPU
...
Diffstat (limited to 'linux-user/sparc/target_cpu.h')
-rw-r--r-- | linux-user/sparc/target_cpu.h | 36 |
1 files changed, 36 insertions, 0 deletions
diff --git a/linux-user/sparc/target_cpu.h b/linux-user/sparc/target_cpu.h new file mode 100644 index 0000000000..5a620a2bb7 --- /dev/null +++ b/linux-user/sparc/target_cpu.h @@ -0,0 +1,36 @@ +/* + * SPARC specific CPU ABI and functions for linux-user + * + * Copyright (C) 2003 Thomas M. Ogrisegg <tom@fnord.at> + * Copyright (C) 2003-2005 Fabrice Bellard + * + * This library is free software; you can redistribute it and/or + * modify it under the terms of the GNU Lesser General Public + * License as published by the Free Software Foundation; either + * version 2 of the License, or (at your option) any later version. + * + * This library is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * Lesser General Public License for more details. + * + * You should have received a copy of the GNU Lesser General Public + * License along with this library; if not, see <http://www.gnu.org/licenses/>. + */ +#ifndef TARGET_CPU_H +#define TARGET_CPU_H + +static inline void cpu_clone_regs(CPUSPARCState *env, target_ulong newsp) +{ + if (newsp) { + env->regwptr[22] = newsp; + } + env->regwptr[0] = 0; + /* FIXME: Do we also need to clear CF? */ + /* XXXXX */ + printf("HELPME: %s:%d\n", __FILE__, __LINE__); +} + +/* TODO: need to implement cpu_set_tls() */ + +#endif |