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| author | Philippe Mathieu-Daudé | 2022-05-09 22:57:27 +0200 |
|---|---|---|
| committer | Laurent Vivier | 2022-05-23 22:47:19 +0200 |
| commit | a0939b89161a756a7f58cab2bec0a2410c5d0b5f (patch) | |
| tree | 22144adc8a978444d2b88bd999ec12b7efa6d395 /linux-user/user-internals.h | |
| parent | linux-user/elfload: Remove pointless non-const CPUArchState cast (diff) | |
| download | qemu-a0939b89161a756a7f58cab2bec0a2410c5d0b5f.tar.gz qemu-a0939b89161a756a7f58cab2bec0a2410c5d0b5f.tar.xz qemu-a0939b89161a756a7f58cab2bec0a2410c5d0b5f.zip | |
linux-user: Have do_syscall() use CPUArchState* instead of void*
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220509205728.51912-3-philippe.mathieu.daude@gmail.com>
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
Diffstat (limited to 'linux-user/user-internals.h')
| -rw-r--r-- | linux-user/user-internals.h | 16 |
1 files changed, 8 insertions, 8 deletions
diff --git a/linux-user/user-internals.h b/linux-user/user-internals.h index ddc260e465..0bb26331c1 100644 --- a/linux-user/user-internals.h +++ b/linux-user/user-internals.h @@ -59,7 +59,7 @@ int info_is_fdpic(struct image_info *info); void target_set_brk(abi_ulong new_brk); void syscall_init(void); -abi_long do_syscall(void *cpu_env, int num, abi_long arg1, +abi_long do_syscall(CPUArchState *cpu_env, int num, abi_long arg1, abi_long arg2, abi_long arg3, abi_long arg4, abi_long arg5, abi_long arg6, abi_long arg7, abi_long arg8); @@ -132,22 +132,22 @@ void print_termios(void *arg); /* ARM EABI and MIPS expect 64bit types aligned even on pairs or registers */ #ifdef TARGET_ARM -static inline int regpairs_aligned(void *cpu_env, int num) +static inline int regpairs_aligned(CPUArchState *cpu_env, int num) { return ((((CPUARMState *)cpu_env)->eabi) == 1) ; } #elif defined(TARGET_MIPS) && defined(TARGET_ABI_MIPSO32) -static inline int regpairs_aligned(void *cpu_env, int num) { return 1; } +static inline int regpairs_aligned(CPUArchState *cpu_env, int num) { return 1; } #elif defined(TARGET_PPC) && !defined(TARGET_PPC64) /* * SysV AVI for PPC32 expects 64bit parameters to be passed on odd/even pairs * of registers which translates to the same as ARM/MIPS, because we start with * r3 as arg1 */ -static inline int regpairs_aligned(void *cpu_env, int num) { return 1; } +static inline int regpairs_aligned(CPUArchState *cpu_env, int num) { return 1; } #elif defined(TARGET_SH4) /* SH4 doesn't align register pairs, except for p{read,write}64 */ -static inline int regpairs_aligned(void *cpu_env, int num) +static inline int regpairs_aligned(CPUArchState *cpu_env, int num) { switch (num) { case TARGET_NR_pread64: @@ -159,11 +159,11 @@ static inline int regpairs_aligned(void *cpu_env, int num) } } #elif defined(TARGET_XTENSA) -static inline int regpairs_aligned(void *cpu_env, int num) { return 1; } +static inline int regpairs_aligned(CPUArchState *cpu_env, int num) { return 1; } #elif defined(TARGET_HEXAGON) -static inline int regpairs_aligned(void *cpu_env, int num) { return 1; } +static inline int regpairs_aligned(CPUArchState *cpu_env, int num) { return 1; } #else -static inline int regpairs_aligned(void *cpu_env, int num) { return 0; } +static inline int regpairs_aligned(CPUArchState *cpu_env, int num) { return 0; } #endif /** |