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author | Anthony Liguori | 2013-07-10 17:54:16 +0200 |
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committer | Anthony Liguori | 2013-07-10 17:54:16 +0200 |
commit | 51455c59ddc370612f6e070d8eb0e594aaa7ef24 (patch) | |
tree | a3044bd466cb3a548e6abad273663469bf68647a /memory.c | |
parent | Merge remote-tracking branch 'riku/linux-user-for-upstream' into staging (diff) | |
parent | cpu: Move reset logging to CPUState (diff) | |
download | qemu-51455c59ddc370612f6e070d8eb0e594aaa7ef24.tar.gz qemu-51455c59ddc370612f6e070d8eb0e594aaa7ef24.tar.xz qemu-51455c59ddc370612f6e070d8eb0e594aaa7ef24.zip |
Merge remote-tracking branch 'afaerber/tags/qom-cpu-for-anthony' into staging
QOM CPUState refactorings
* Fix for OpenRISCCPU subclasses
* Fix for gdbstub CPU selection
* Move linux-user CPU functions into new header
* CPUState part 10 refactoring: first_cpu, next_cpu, cpu_single_env et al.
* Fix some targets to consistently inline TCG code generation
* Centrally log CPU reset
# gpg: Signature made Wed 10 Jul 2013 07:52:39 AM CDT using RSA key ID 3E7E013F
# gpg: Can't check signature: public key not found
# By Andreas Färber (41) and others
# Via Andreas Färber
* afaerber/tags/qom-cpu-for-anthony: (43 commits)
cpu: Move reset logging to CPUState
target-ppc: Change LOG_MMU_STATE() argument to CPUState
target-i386: Change LOG_PCALL_STATE() argument to CPUState
log: Change log_cpu_state[_mask]() argument to CPUState
target-i386: Change do_smm_enter() argument to X86CPU
target-i386: Change do_interrupt_all() argument to X86CPU
target-xtensa: Change gen_intermediate_code_internal() arg to XtensaCPU
target-unicore32: Change gen_intermediate_code_internal() signature
target-sparc: Change gen_intermediate_code_internal() argument to SPARCCPU
target-sh4: Change gen_intermediate_code_internal() argument to SuperHCPU
target-s390x: Change gen_intermediate_code_internal() argument to S390CPU
target-ppc: Change gen_intermediate_code_internal() argument to PowerPCCPU
target-mips: Change gen_intermediate_code_internal() argument to MIPSCPU
target-microblaze: Change gen_intermediate_code_internal() argument types
target-m68k: Change gen_intermediate_code_internal() argument to M68kCPU
target-lm32: Change gen_intermediate_code_internal() argument to LM32CPU
target-i386: Change gen_intermediate_code_internal() argument to X86CPU
target-cris: Change gen_intermediate_code_internal() argument to CRISCPU
target-arm: Change gen_intermediate_code_internal() argument to ARMCPU
target-alpha: Change gen_intermediate_code_internal() argument to AlphaCPU
...
Diffstat (limited to 'memory.c')
-rw-r--r-- | memory.c | 10 |
1 files changed, 4 insertions, 6 deletions
@@ -838,9 +838,8 @@ static uint64_t unassigned_mem_read(void *opaque, hwaddr addr, #ifdef DEBUG_UNASSIGNED printf("Unassigned mem read " TARGET_FMT_plx "\n", addr); #endif - if (cpu_single_env != NULL) { - cpu_unassigned_access(ENV_GET_CPU(cpu_single_env), - addr, false, false, 0, size); + if (current_cpu != NULL) { + cpu_unassigned_access(current_cpu, addr, false, false, 0, size); } return 0; } @@ -851,9 +850,8 @@ static void unassigned_mem_write(void *opaque, hwaddr addr, #ifdef DEBUG_UNASSIGNED printf("Unassigned mem write " TARGET_FMT_plx " = 0x%"PRIx64"\n", addr, val); #endif - if (cpu_single_env != NULL) { - cpu_unassigned_access(ENV_GET_CPU(cpu_single_env), - addr, true, false, 0, size); + if (current_cpu != NULL) { + cpu_unassigned_access(current_cpu, addr, true, false, 0, size); } } |