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| author | Yongbok Kim | 2016-03-24 16:49:58 +0100 |
|---|---|---|
| committer | Leon Alrae | 2016-03-30 10:14:00 +0200 |
| commit | f6d4dd810983fdf3d1c9fb81838167efef63d1c8 (patch) | |
| tree | f38749caeb52b4c6e6360a6c0bf8ff9bf7325a15 /qemu-nbd.c | |
| parent | target-mips: use CP0_CHECK for gen_m{f|t}hc0 (diff) | |
| download | qemu-f6d4dd810983fdf3d1c9fb81838167efef63d1c8.tar.gz qemu-f6d4dd810983fdf3d1c9fb81838167efef63d1c8.tar.xz qemu-f6d4dd810983fdf3d1c9fb81838167efef63d1c8.zip | |
target-mips: add MAAR, MAARI register
The MAAR register is a read/write register included in Release 5
of the architecture that defines the accessibility attributes of
physical address regions. In particular, MAAR defines whether an
instruction fetch or data load can speculatively access a memory
region within the physical address bounds specified by MAAR.
As QEMU doesn't do speculative access, hence this patch only
provides ability to access the registers.
Signed-off-by: Yongbok Kim <yongbok.kim@imgtec.com>
Reviewed-by: Leon Alrae <leon.alrae@imgtec.com>
Signed-off-by: Leon Alrae <leon.alrae@imgtec.com>
Diffstat (limited to 'qemu-nbd.c')
0 files changed, 0 insertions, 0 deletions