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| author | Peter Maydell | 2015-10-08 16:33:56 +0200 |
|---|---|---|
| committer | Peter Maydell | 2015-10-08 16:33:56 +0200 |
| commit | 31c9bd164ddb653915b9029ba0edd40cd57530d9 (patch) | |
| tree | a89ce755264cd0d9f97dcf4c8aae5df524034fd3 /target-openrisc/cpu.h | |
| parent | Merge remote-tracking branch 'remotes/rth/tags/pull-tile-20151007' into staging (diff) | |
| parent | tcg: Adjust CODE_GEN_AVG_BLOCK_SIZE (diff) | |
| download | qemu-31c9bd164ddb653915b9029ba0edd40cd57530d9.tar.gz qemu-31c9bd164ddb653915b9029ba0edd40cd57530d9.tar.xz qemu-31c9bd164ddb653915b9029ba0edd40cd57530d9.zip | |
Merge remote-tracking branch 'remotes/rth/tags/pull-tcg-20151007' into staging
Do away with TB retranslation
# gpg: Signature made Wed 07 Oct 2015 10:42:08 BST using RSA key ID 4DD0279B
# gpg: Good signature from "Richard Henderson <rth7680@gmail.com>"
# gpg: aka "Richard Henderson <rth@redhat.com>"
# gpg: aka "Richard Henderson <rth@twiddle.net>"
* remotes/rth/tags/pull-tcg-20151007: (26 commits)
tcg: Adjust CODE_GEN_AVG_BLOCK_SIZE
tcg: Check for overflow via highwater mark
tcg: Allocate a guard page after code_gen_buffer
tcg: Emit prologue to the beginning of code_gen_buffer
tcg: Remove tcg_gen_code_search_pc
tcg: Remove gen_intermediate_code_pc
tcg: Save insn data and use it in cpu_restore_state_from_tb
tcg: Pass data argument to restore_state_to_opc
tcg: Add TCG_MAX_INSNS
target-*: Drop cpu_gen_code define
tcg: Merge cpu_gen_code into tb_gen_code
target-sparc: Add npc state to insn_start
target-sparc: Remove gen_opc_jump_pc
target-sparc: Split out gen_branch_n
target-sparc: Tidy gen_branch_a interface
target-cris: Mirror gen_opc_pc into insn_start
target-sh4: Add flags state to insn_start
target-s390x: Add cc_op state to insn_start
target-mips: Add delayed branch state to insn_start
target-i386: Add cc_op state to insn_start
...
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'target-openrisc/cpu.h')
| -rw-r--r-- | target-openrisc/cpu.h | 1 |
1 files changed, 0 insertions, 1 deletions
diff --git a/target-openrisc/cpu.h b/target-openrisc/cpu.h index 1ff1c9ec2a..eb71607395 100644 --- a/target-openrisc/cpu.h +++ b/target-openrisc/cpu.h @@ -360,7 +360,6 @@ int cpu_openrisc_signal_handler(int host_signum, void *pinfo, void *puc); #define cpu_list cpu_openrisc_list #define cpu_exec cpu_openrisc_exec -#define cpu_gen_code cpu_openrisc_gen_code #define cpu_signal_handler cpu_openrisc_signal_handler #ifndef CONFIG_USER_ONLY |