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authorPeter Maydell2020-05-04 14:37:17 +0200
committerPeter Maydell2020-05-04 14:37:17 +0200
commit9af638cc1f665712522608c5d6b8c03d8fa67666 (patch)
treeb04f0d713a642e29f08f66b50b9592ee7529b8fe /target/arm/cpu.c
parentMerge remote-tracking branch 'remotes/marcel/tags/rdma-pull-request' into sta... (diff)
parenttarget/arm: Move gen_ function typedefs to translate.h (diff)
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Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20200504' into staging
target-arm queue: * Start of conversion of Neon insns to decodetree * versal board: support SD and RTC * Implement ARMv8.2-TTS2UXN * Make VQDMULL undefined when U=1 * Some minor code cleanups # gpg: Signature made Mon 04 May 2020 13:32:08 BST # gpg: using RSA key E1A5C593CD419DE28E8315CF3C2525ED14360CDE # gpg: issuer "peter.maydell@linaro.org" # gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" [ultimate] # gpg: aka "Peter Maydell <pmaydell@gmail.com>" [ultimate] # gpg: aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>" [ultimate] # Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83 15CF 3C25 25ED 1436 0CDE * remotes/pmaydell/tags/pull-target-arm-20200504: (39 commits) target/arm: Move gen_ function typedefs to translate.h target/arm: Convert Neon 3-reg-same VMUL, VMLA, VMLS, VSHL to decodetree target/arm: Convert Neon 3-reg-same VQADD/VQSUB to decodetree target/arm: Convert Neon 3-reg-same comparisons to decodetree target/arm: Convert Neon 3-reg-same VMAX/VMIN to decodetree target/arm: Convert Neon 3-reg-same logic ops to decodetree target/arm: Convert Neon 3-reg-same VADD/VSUB to decodetree target/arm: Convert Neon 'load/store single structure' to decodetree target/arm: Convert Neon 'load single structure to all lanes' to decodetree target/arm: Convert Neon load/store multiple structures to decodetree target/arm: Convert VFM[AS]L (scalar) to decodetree target/arm: Convert V[US]DOT (scalar) to decodetree target/arm: Convert VCMLA (scalar) to decodetree target/arm: Convert VFM[AS]L (vector) to decodetree target/arm: Convert V[US]DOT (vector) to decodetree target/arm: Convert VCADD (vector) to decodetree target/arm: Convert VCMLA (vector) to decodetree target/arm: Add stubs for AArch32 Neon decodetree target/arm: Don't allow Thumb Neon insns without FEATURE_NEON target/arm/translate-vfp.inc.c: Remove duplicate simd_r32 check ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'target/arm/cpu.c')
-rw-r--r--target/arm/cpu.c3
1 files changed, 2 insertions, 1 deletions
diff --git a/target/arm/cpu.c b/target/arm/cpu.c
index 141d947775..5d64adfe76 100644
--- a/target/arm/cpu.c
+++ b/target/arm/cpu.c
@@ -2686,6 +2686,7 @@ static void arm_max_initfn(Object *obj)
t = FIELD_DP32(t, ID_MMFR4, HPDS, 1); /* AA32HPD */
t = FIELD_DP32(t, ID_MMFR4, AC2, 1); /* ACTLR2, HACTLR2 */
t = FIELD_DP32(t, ID_MMFR4, CNP, 1); /* TTCNP */
+ t = FIELD_DP32(t, ID_MMFR4, XNX, 1); /* TTS2UXN */
cpu->isar.id_mmfr4 = t;
}
#endif
@@ -2754,7 +2755,7 @@ static const ARMCPUInfo arm_cpus[] = {
static Property arm_cpu_properties[] = {
DEFINE_PROP_BOOL("start-powered-off", ARMCPU, start_powered_off, false),
DEFINE_PROP_UINT32("psci-conduit", ARMCPU, psci_conduit, 0),
- DEFINE_PROP_UINT32("midr", ARMCPU, midr, 0),
+ DEFINE_PROP_UINT64("midr", ARMCPU, midr, 0),
DEFINE_PROP_UINT64("mp-affinity", ARMCPU,
mp_affinity, ARM64_AFFINITY_INVALID),
DEFINE_PROP_INT32("node-id", ARMCPU, node_id, CPU_UNSET_NUMA_NODE_ID),