diff options
author | Richard Henderson | 2018-01-25 12:45:28 +0100 |
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committer | Peter Maydell | 2018-01-25 12:45:28 +0100 |
commit | 3f68b8a5a6862f856524bb347bf348ae364dd43c (patch) | |
tree | 9bdf250319c80c0077c8d9d6fd871aa5b936aba1 /target/arm/translate-a64.c | |
parent | target/arm: Use pointers in neon tbl helper (diff) | |
download | qemu-3f68b8a5a6862f856524bb347bf348ae364dd43c.tar.gz qemu-3f68b8a5a6862f856524bb347bf348ae364dd43c.tar.xz qemu-3f68b8a5a6862f856524bb347bf348ae364dd43c.zip |
target/arm: Change the type of vfp.regs
All direct users of this field want an integral value. Drop all
of the extra casting between uint64_t and float64.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20180119045438.28582-6-richard.henderson@linaro.org
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'target/arm/translate-a64.c')
-rw-r--r-- | target/arm/translate-a64.c | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/target/arm/translate-a64.c b/target/arm/translate-a64.c index 6d9b3af64c..c14fb4185c 100644 --- a/target/arm/translate-a64.c +++ b/target/arm/translate-a64.c @@ -165,12 +165,12 @@ void aarch64_cpu_dump_state(CPUState *cs, FILE *f, if (flags & CPU_DUMP_FPU) { int numvfpregs = 32; for (i = 0; i < numvfpregs; i += 2) { - uint64_t vlo = float64_val(env->vfp.regs[i * 2]); - uint64_t vhi = float64_val(env->vfp.regs[(i * 2) + 1]); + uint64_t vlo = env->vfp.regs[i * 2]; + uint64_t vhi = env->vfp.regs[(i * 2) + 1]; cpu_fprintf(f, "q%02d=%016" PRIx64 ":%016" PRIx64 " ", i, vhi, vlo); - vlo = float64_val(env->vfp.regs[(i + 1) * 2]); - vhi = float64_val(env->vfp.regs[((i + 1) * 2) + 1]); + vlo = env->vfp.regs[(i + 1) * 2]; + vhi = env->vfp.regs[((i + 1) * 2) + 1]; cpu_fprintf(f, "q%02d=%016" PRIx64 ":%016" PRIx64 "\n", i + 1, vhi, vlo); } |