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| author | Richard Henderson | 2018-12-13 14:48:05 +0100 |
|---|---|---|
| committer | Peter Maydell | 2018-12-13 15:41:24 +0100 |
| commit | 619959c3583dad325c36f09ce670e7d091382cae (patch) | |
| tree | a290e4fdf7c439aa01b151f83fec2bcff01bf30a /target/arm | |
| parent | target/arm: Add SCR_EL3 bits up to ARMv8.5 (diff) | |
| download | qemu-619959c3583dad325c36f09ce670e7d091382cae.tar.gz qemu-619959c3583dad325c36f09ce670e7d091382cae.tar.xz qemu-619959c3583dad325c36f09ce670e7d091382cae.zip | |
target/arm: Fix HCR_EL2.TGE check in arm_phys_excp_target_el
The enable for TGE has already occurred within arm_hcr_el2_amo
and friends. Moreover, when E2H is also set, the sense is
supposed to be reversed, which has also already occurred within
the helpers.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20181203203839.757-5-richard.henderson@linaro.org
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'target/arm')
| -rw-r--r-- | target/arm/helper.c | 3 |
1 files changed, 0 insertions, 3 deletions
diff --git a/target/arm/helper.c b/target/arm/helper.c index 04c4a91b04..bf020364e1 100644 --- a/target/arm/helper.c +++ b/target/arm/helper.c @@ -6537,9 +6537,6 @@ uint32_t arm_phys_excp_target_el(CPUState *cs, uint32_t excp_idx, break; }; - /* If HCR.TGE is set then HCR is treated as being 1 */ - hcr |= ((env->cp15.hcr_el2 & HCR_TGE) == HCR_TGE); - /* Perform a table-lookup for the target EL given the current state */ target_el = target_el_table[is64][scr][rw][hcr][secure][cur_el]; |