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| author | David Gibson | 2018-03-23 04:32:48 +0100 |
|---|---|---|
| committer | David Gibson | 2018-04-27 10:05:22 +0200 |
| commit | 26cd35b8613881c410d5226e6dc56e7bfb4b83d1 (patch) | |
| tree | 4a9b5ddd032caf4852e067364816261f52cb20b5 /target/ppc/cpu.h | |
| parent | target/ppc: Move 1T segment and AMR options to PPCHash64Options (diff) | |
| download | qemu-26cd35b8613881c410d5226e6dc56e7bfb4b83d1.tar.gz qemu-26cd35b8613881c410d5226e6dc56e7bfb4b83d1.tar.xz qemu-26cd35b8613881c410d5226e6dc56e7bfb4b83d1.zip | |
target/ppc: Fold ci_large_pages flag into PPCHash64Options
The ci_large_pages boolean in CPUPPCState is only relevant to 64-bit hash
MMU machines, indicating whether it's possible to map large (> 4kiB) pages
as cache-inhibitied (i.e. for IO, rather than memory). Fold it as another
flag into the PPCHash64Options structure.
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Reviewed-by: Cédric Le Goater <clg@kaod.org>
Reviewed-by: Greg Kurz <groug@kaod.org>
Diffstat (limited to 'target/ppc/cpu.h')
| -rw-r--r-- | target/ppc/cpu.h | 1 |
1 files changed, 0 insertions, 1 deletions
diff --git a/target/ppc/cpu.h b/target/ppc/cpu.h index 1c5c33ca11..c0c44fb91d 100644 --- a/target/ppc/cpu.h +++ b/target/ppc/cpu.h @@ -1090,7 +1090,6 @@ struct CPUPPCState { #if defined(TARGET_PPC64) ppc_slb_t vrma_slb; target_ulong rmls; - bool ci_large_pages; #endif #if defined(TARGET_PPC64) && !defined(CONFIG_USER_ONLY) |