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| author | Babu Moger | 2018-05-10 22:41:42 +0200 |
|---|---|---|
| committer | Eduardo Habkost | 2018-05-15 16:33:33 +0200 |
| commit | 6aaeb05492ef668f415324f43e7d875c0f1e90b3 (patch) | |
| tree | 11cf2cc1bdcf6a6ad46770d0b887e8abf81fdcd3 /target | |
| parent | i386: Helpers to encode cache information consistently (diff) | |
| download | qemu-6aaeb05492ef668f415324f43e7d875c0f1e90b3.tar.gz qemu-6aaeb05492ef668f415324f43e7d875c0f1e90b3.tar.xz qemu-6aaeb05492ef668f415324f43e7d875c0f1e90b3.zip | |
i386: Add cache information in X86CPUDefinition
Add cache information in X86CPUDefinition and CPUX86State.
Signed-off-by: Babu Moger <babu.moger@amd.com>
Tested-by: Geoffrey McRae <geoff@hostfission.com>
Reviewed-by: Eduardo Habkost <ehabkost@redhat.com>
Message-Id: <20180510204148.11687-3-babu.moger@amd.com>
Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
Diffstat (limited to 'target')
| -rw-r--r-- | target/i386/cpu.c | 1 | ||||
| -rw-r--r-- | target/i386/cpu.h | 7 |
2 files changed, 8 insertions, 0 deletions
diff --git a/target/i386/cpu.c b/target/i386/cpu.c index 28bb93990e..55685ed19d 100644 --- a/target/i386/cpu.c +++ b/target/i386/cpu.c @@ -1106,6 +1106,7 @@ struct X86CPUDefinition { int stepping; FeatureWordArray features; const char *model_id; + CPUCaches *cache_info; }; static X86CPUDefinition builtin_x86_defs[] = { diff --git a/target/i386/cpu.h b/target/i386/cpu.h index 512c69dddd..ac94013c4a 100644 --- a/target/i386/cpu.h +++ b/target/i386/cpu.h @@ -1097,6 +1097,12 @@ typedef struct CPUCacheInfo { } CPUCacheInfo; +typedef struct CPUCaches { + CPUCacheInfo l1d_cache; + CPUCacheInfo l1i_cache; + CPUCacheInfo l2_cache; + CPUCacheInfo l3_cache; +} CPUCaches; typedef struct CPUX86State { /* standard registers */ @@ -1286,6 +1292,7 @@ typedef struct CPUX86State { /* Features that were explicitly enabled/disabled */ FeatureWordArray user_features; uint32_t cpuid_model[12]; + CPUCaches *cache_info; /* MTRRs */ uint64_t mtrr_fixed[11]; |