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-rw-r--r--accel/tcg/cpu-exec.c21
-rw-r--r--accel/tcg/translate-all.c61
-rw-r--r--hw/alpha/dp264.c2
-rw-r--r--hw/cris/axis_dev88.c2
-rw-r--r--hw/hppa/machine.c2
-rw-r--r--hw/i386/pc_piix.c10
-rw-r--r--hw/lm32/lm32_boards.c3
-rw-r--r--hw/lm32/milkymist.c1
-rw-r--r--hw/m68k/mcf5208.c2
-rw-r--r--hw/m68k/q800.c1
-rw-r--r--hw/microblaze/petalogix_ml605_mmu.c1
-rw-r--r--hw/microblaze/petalogix_s3adsp1800_mmu.c2
-rw-r--r--hw/mips/mips_malta.c2
-rw-r--r--hw/moxie/moxiesim.c2
-rw-r--r--hw/nios2/10m50_devboard.c2
-rw-r--r--hw/openrisc/openrisc_sim.c2
-rw-r--r--hw/ppc/mac_oldworld.c2
-rw-r--r--hw/ppc/spapr.c2
-rw-r--r--hw/riscv/spike.c2
-rw-r--r--hw/s390x/s390-virtio-ccw.c2
-rw-r--r--hw/sh4/shix.c2
-rw-r--r--hw/sparc/sun4m.c2
-rw-r--r--hw/sparc64/sun4u.c2
-rw-r--r--hw/tricore/tricore_testboard.c1
-rw-r--r--hw/unicore32/puv3.c2
-rw-r--r--include/hw/boards.h4
-rw-r--r--include/hw/nmi.h2
-rw-r--r--include/qemu/compiler.h2
-rw-r--r--softmmu/vl.c6
-rw-r--r--tcg/arm/tcg-target.inc.c29
30 files changed, 91 insertions, 85 deletions
diff --git a/accel/tcg/cpu-exec.c b/accel/tcg/cpu-exec.c
index 2560c90eec..d95c4848a4 100644
--- a/accel/tcg/cpu-exec.c
+++ b/accel/tcg/cpu-exec.c
@@ -240,6 +240,8 @@ void cpu_exec_step_atomic(CPUState *cpu)
uint32_t cf_mask = cflags & CF_HASH_MASK;
if (sigsetjmp(cpu->jmp_env, 0) == 0) {
+ start_exclusive();
+
tb = tb_lookup__cpu_state(cpu, &pc, &cs_base, &flags, cf_mask);
if (tb == NULL) {
mmap_lock();
@@ -247,8 +249,6 @@ void cpu_exec_step_atomic(CPUState *cpu)
mmap_unlock();
}
- start_exclusive();
-
/* Since we got here, we know that parallel_cpus must be true. */
parallel_cpus = false;
cc->cpu_exec_enter(cpu);
@@ -271,14 +271,15 @@ void cpu_exec_step_atomic(CPUState *cpu)
qemu_plugin_disable_mem_helpers(cpu);
}
- if (cpu_in_exclusive_context(cpu)) {
- /* We might longjump out of either the codegen or the
- * execution, so must make sure we only end the exclusive
- * region if we started it.
- */
- parallel_cpus = true;
- end_exclusive();
- }
+
+ /*
+ * As we start the exclusive region before codegen we must still
+ * be in the region if we longjump out of either the codegen or
+ * the execution.
+ */
+ g_assert(cpu_in_exclusive_context(cpu));
+ parallel_cpus = true;
+ end_exclusive();
}
struct tb_desc {
diff --git a/accel/tcg/translate-all.c b/accel/tcg/translate-all.c
index a08ab11f65..78914154bf 100644
--- a/accel/tcg/translate-all.c
+++ b/accel/tcg/translate-all.c
@@ -18,6 +18,7 @@
*/
#include "qemu/osdep.h"
+#include "qemu/units.h"
#include "qemu-common.h"
#define NO_CPU_IO_DEFS
@@ -891,43 +892,61 @@ static void page_lock_pair(PageDesc **ret_p1, tb_page_addr_t phys1,
}
}
-#if defined(CONFIG_USER_ONLY)
-/* Currently it is not recommended to allocate big chunks of data in
- user mode. It will change when a dedicated libc will be used. */
-/* ??? 64-bit hosts ought to have no problem mmaping data outside the
- region in which the guest needs to run. Revisit this. */
-#define USE_STATIC_CODE_GEN_BUFFER
-#endif
-
/* Minimum size of the code gen buffer. This number is randomly chosen,
but not so small that we can't have a fair number of TB's live. */
-#define MIN_CODE_GEN_BUFFER_SIZE (1024u * 1024)
+#define MIN_CODE_GEN_BUFFER_SIZE (1 * MiB)
/* Maximum size of the code gen buffer we'd like to use. Unless otherwise
indicated, this is constrained by the range of direct branches on the
host cpu, as used by the TCG implementation of goto_tb. */
#if defined(__x86_64__)
-# define MAX_CODE_GEN_BUFFER_SIZE (2ul * 1024 * 1024 * 1024)
+# define MAX_CODE_GEN_BUFFER_SIZE (2 * GiB)
#elif defined(__sparc__)
-# define MAX_CODE_GEN_BUFFER_SIZE (2ul * 1024 * 1024 * 1024)
+# define MAX_CODE_GEN_BUFFER_SIZE (2 * GiB)
#elif defined(__powerpc64__)
-# define MAX_CODE_GEN_BUFFER_SIZE (2ul * 1024 * 1024 * 1024)
+# define MAX_CODE_GEN_BUFFER_SIZE (2 * GiB)
#elif defined(__powerpc__)
-# define MAX_CODE_GEN_BUFFER_SIZE (32u * 1024 * 1024)
+# define MAX_CODE_GEN_BUFFER_SIZE (32 * MiB)
#elif defined(__aarch64__)
-# define MAX_CODE_GEN_BUFFER_SIZE (2ul * 1024 * 1024 * 1024)
+# define MAX_CODE_GEN_BUFFER_SIZE (2 * GiB)
#elif defined(__s390x__)
/* We have a +- 4GB range on the branches; leave some slop. */
-# define MAX_CODE_GEN_BUFFER_SIZE (3ul * 1024 * 1024 * 1024)
+# define MAX_CODE_GEN_BUFFER_SIZE (3 * GiB)
#elif defined(__mips__)
/* We have a 256MB branch region, but leave room to make sure the
main executable is also within that region. */
-# define MAX_CODE_GEN_BUFFER_SIZE (128ul * 1024 * 1024)
+# define MAX_CODE_GEN_BUFFER_SIZE (128 * MiB)
#else
# define MAX_CODE_GEN_BUFFER_SIZE ((size_t)-1)
#endif
-#define DEFAULT_CODE_GEN_BUFFER_SIZE_1 (32u * 1024 * 1024)
+#if TCG_TARGET_REG_BITS == 32
+#define DEFAULT_CODE_GEN_BUFFER_SIZE_1 (32 * MiB)
+#ifdef CONFIG_USER_ONLY
+/*
+ * For user mode on smaller 32 bit systems we may run into trouble
+ * allocating big chunks of data in the right place. On these systems
+ * we utilise a static code generation buffer directly in the binary.
+ */
+#define USE_STATIC_CODE_GEN_BUFFER
+#endif
+#else /* TCG_TARGET_REG_BITS == 64 */
+#ifdef CONFIG_USER_ONLY
+/*
+ * As user-mode emulation typically means running multiple instances
+ * of the translator don't go too nuts with our default code gen
+ * buffer lest we make things too hard for the OS.
+ */
+#define DEFAULT_CODE_GEN_BUFFER_SIZE_1 (128 * MiB)
+#else
+/*
+ * We expect most system emulation to run one or two guests per host.
+ * Users running large scale system emulation may want to tweak their
+ * runtime setup via the tb-size control on the command line.
+ */
+#define DEFAULT_CODE_GEN_BUFFER_SIZE_1 (1 * GiB)
+#endif
+#endif
#define DEFAULT_CODE_GEN_BUFFER_SIZE \
(DEFAULT_CODE_GEN_BUFFER_SIZE_1 < MAX_CODE_GEN_BUFFER_SIZE \
@@ -937,15 +956,7 @@ static inline size_t size_code_gen_buffer(size_t tb_size)
{
/* Size the buffer. */
if (tb_size == 0) {
-#ifdef USE_STATIC_CODE_GEN_BUFFER
tb_size = DEFAULT_CODE_GEN_BUFFER_SIZE;
-#else
- /* ??? Needs adjustments. */
- /* ??? If we relax the requirement that CONFIG_USER_ONLY use the
- static buffer, we could size this on RESERVED_VA, on the text
- segment size of the executable, or continue to use the default. */
- tb_size = (unsigned long)(ram_size / 4);
-#endif
}
if (tb_size < MIN_CODE_GEN_BUFFER_SIZE) {
tb_size = MIN_CODE_GEN_BUFFER_SIZE;
diff --git a/hw/alpha/dp264.c b/hw/alpha/dp264.c
index 8d71a30617..d28f57199f 100644
--- a/hw/alpha/dp264.c
+++ b/hw/alpha/dp264.c
@@ -181,7 +181,7 @@ static void clipper_machine_init(MachineClass *mc)
mc->init = clipper_init;
mc->block_default_type = IF_IDE;
mc->max_cpus = 4;
- mc->is_default = 1;
+ mc->is_default = true;
mc->default_cpu_type = ALPHA_CPU_TYPE_NAME("ev67");
mc->default_ram_id = "ram";
}
diff --git a/hw/cris/axis_dev88.c b/hw/cris/axis_dev88.c
index cf6790fd6f..75e5c993b5 100644
--- a/hw/cris/axis_dev88.c
+++ b/hw/cris/axis_dev88.c
@@ -344,7 +344,7 @@ static void axisdev88_machine_init(MachineClass *mc)
{
mc->desc = "AXIS devboard 88";
mc->init = axisdev88_init;
- mc->is_default = 1;
+ mc->is_default = true;
mc->default_cpu_type = CRIS_CPU_TYPE_NAME("crisv32");
mc->default_ram_id = "axisdev88.ram";
}
diff --git a/hw/hppa/machine.c b/hw/hppa/machine.c
index 67181e75ba..bf18767e24 100644
--- a/hw/hppa/machine.c
+++ b/hw/hppa/machine.c
@@ -290,7 +290,7 @@ static void machine_hppa_machine_init(MachineClass *mc)
mc->block_default_type = IF_SCSI;
mc->max_cpus = HPPA_MAX_CPUS;
mc->default_cpus = 1;
- mc->is_default = 1;
+ mc->is_default = true;
mc->default_ram_size = 512 * MiB;
mc->default_boot_order = "cd";
mc->default_ram_id = "ram";
diff --git a/hw/i386/pc_piix.c b/hw/i386/pc_piix.c
index fa12203079..9088db8fb6 100644
--- a/hw/i386/pc_piix.c
+++ b/hw/i386/pc_piix.c
@@ -423,7 +423,7 @@ static void pc_i440fx_5_0_machine_options(MachineClass *m)
PCMachineClass *pcmc = PC_MACHINE_CLASS(m);
pc_i440fx_machine_options(m);
m->alias = "pc";
- m->is_default = 1;
+ m->is_default = true;
pcmc->default_cpu_version = 1;
}
@@ -434,7 +434,7 @@ static void pc_i440fx_4_2_machine_options(MachineClass *m)
{
pc_i440fx_5_0_machine_options(m);
m->alias = NULL;
- m->is_default = 0;
+ m->is_default = false;
compat_props_add(m->compat_props, hw_compat_4_2, hw_compat_4_2_len);
compat_props_add(m->compat_props, pc_compat_4_2, pc_compat_4_2_len);
}
@@ -446,7 +446,7 @@ static void pc_i440fx_4_1_machine_options(MachineClass *m)
{
pc_i440fx_4_2_machine_options(m);
m->alias = NULL;
- m->is_default = 0;
+ m->is_default = false;
compat_props_add(m->compat_props, hw_compat_4_1, hw_compat_4_1_len);
compat_props_add(m->compat_props, pc_compat_4_1, pc_compat_4_1_len);
}
@@ -459,7 +459,7 @@ static void pc_i440fx_4_0_machine_options(MachineClass *m)
PCMachineClass *pcmc = PC_MACHINE_CLASS(m);
pc_i440fx_4_1_machine_options(m);
m->alias = NULL;
- m->is_default = 0;
+ m->is_default = false;
pcmc->default_cpu_version = CPU_VERSION_LEGACY;
compat_props_add(m->compat_props, hw_compat_4_0, hw_compat_4_0_len);
compat_props_add(m->compat_props, pc_compat_4_0, pc_compat_4_0_len);
@@ -473,7 +473,7 @@ static void pc_i440fx_3_1_machine_options(MachineClass *m)
PCMachineClass *pcmc = PC_MACHINE_CLASS(m);
pc_i440fx_4_0_machine_options(m);
- m->is_default = 0;
+ m->is_default = false;
pcmc->do_not_add_smb_acpi = true;
m->smbus_no_migration_support = true;
m->alias = NULL;
diff --git a/hw/lm32/lm32_boards.c b/hw/lm32/lm32_boards.c
index 4e0a98c117..b842f74344 100644
--- a/hw/lm32/lm32_boards.c
+++ b/hw/lm32/lm32_boards.c
@@ -295,7 +295,7 @@ static void lm32_evr_class_init(ObjectClass *oc, void *data)
mc->desc = "LatticeMico32 EVR32 eval system";
mc->init = lm32_evr_init;
- mc->is_default = 1;
+ mc->is_default = true;
mc->default_cpu_type = LM32_CPU_TYPE_NAME("lm32-full");
mc->default_ram_size = 64 * MiB;
mc->default_ram_id = "lm32_evr.sdram";
@@ -313,7 +313,6 @@ static void lm32_uclinux_class_init(ObjectClass *oc, void *data)
mc->desc = "lm32 platform for uClinux and u-boot by Theobroma Systems";
mc->init = lm32_uclinux_init;
- mc->is_default = 0;
mc->default_cpu_type = LM32_CPU_TYPE_NAME("lm32-full");
mc->default_ram_size = 64 * MiB;
mc->default_ram_id = "lm32_uclinux.sdram";
diff --git a/hw/lm32/milkymist.c b/hw/lm32/milkymist.c
index 5c72266e58..85913bb68b 100644
--- a/hw/lm32/milkymist.c
+++ b/hw/lm32/milkymist.c
@@ -219,7 +219,6 @@ static void milkymist_machine_init(MachineClass *mc)
{
mc->desc = "Milkymist One";
mc->init = milkymist_init;
- mc->is_default = 0;
mc->default_cpu_type = LM32_CPU_TYPE_NAME("lm32-full");
mc->default_ram_size = 128 * MiB;
mc->default_ram_id = "milkymist.sdram";
diff --git a/hw/m68k/mcf5208.c b/hw/m68k/mcf5208.c
index 31622c71cb..b84c152ce3 100644
--- a/hw/m68k/mcf5208.c
+++ b/hw/m68k/mcf5208.c
@@ -350,7 +350,7 @@ static void mcf5208evb_machine_init(MachineClass *mc)
{
mc->desc = "MCF5208EVB";
mc->init = mcf5208evb_init;
- mc->is_default = 1;
+ mc->is_default = true;
mc->default_cpu_type = M68K_CPU_TYPE_NAME("m5208");
mc->default_ram_id = "mcf5208.ram";
}
diff --git a/hw/m68k/q800.c b/hw/m68k/q800.c
index a4c4bc14cb..c5699f6f3e 100644
--- a/hw/m68k/q800.c
+++ b/hw/m68k/q800.c
@@ -438,7 +438,6 @@ static void q800_machine_class_init(ObjectClass *oc, void *data)
mc->init = q800_init;
mc->default_cpu_type = M68K_CPU_TYPE_NAME("m68040");
mc->max_cpus = 1;
- mc->is_default = 0;
mc->block_default_type = IF_SCSI;
mc->default_ram_id = "m68k_mac.ram";
}
diff --git a/hw/microblaze/petalogix_ml605_mmu.c b/hw/microblaze/petalogix_ml605_mmu.c
index 09486bc8bf..0a2640c40b 100644
--- a/hw/microblaze/petalogix_ml605_mmu.c
+++ b/hw/microblaze/petalogix_ml605_mmu.c
@@ -216,7 +216,6 @@ static void petalogix_ml605_machine_init(MachineClass *mc)
{
mc->desc = "PetaLogix linux refdesign for xilinx ml605 little endian";
mc->init = petalogix_ml605_init;
- mc->is_default = 0;
}
DEFINE_MACHINE("petalogix-ml605", petalogix_ml605_machine_init)
diff --git a/hw/microblaze/petalogix_s3adsp1800_mmu.c b/hw/microblaze/petalogix_s3adsp1800_mmu.c
index 849bafc186..0bb6cdea8d 100644
--- a/hw/microblaze/petalogix_s3adsp1800_mmu.c
+++ b/hw/microblaze/petalogix_s3adsp1800_mmu.c
@@ -132,7 +132,7 @@ static void petalogix_s3adsp1800_machine_init(MachineClass *mc)
{
mc->desc = "PetaLogix linux refdesign for xilinx Spartan 3ADSP1800";
mc->init = petalogix_s3adsp1800_init;
- mc->is_default = 1;
+ mc->is_default = true;
}
DEFINE_MACHINE("petalogix-s3adsp1800", petalogix_s3adsp1800_machine_init)
diff --git a/hw/mips/mips_malta.c b/hw/mips/mips_malta.c
index 6e7ba9235d..d380f73d7b 100644
--- a/hw/mips/mips_malta.c
+++ b/hw/mips/mips_malta.c
@@ -1439,7 +1439,7 @@ static void mips_malta_machine_init(MachineClass *mc)
mc->init = mips_malta_init;
mc->block_default_type = IF_IDE;
mc->max_cpus = 16;
- mc->is_default = 1;
+ mc->is_default = true;
#ifdef TARGET_MIPS64
mc->default_cpu_type = MIPS_CPU_TYPE_NAME("20Kc");
#else
diff --git a/hw/moxie/moxiesim.c b/hw/moxie/moxiesim.c
index 1d06e39fcb..51a98287b5 100644
--- a/hw/moxie/moxiesim.c
+++ b/hw/moxie/moxiesim.c
@@ -150,7 +150,7 @@ static void moxiesim_machine_init(MachineClass *mc)
{
mc->desc = "Moxie simulator platform";
mc->init = moxiesim_init;
- mc->is_default = 1;
+ mc->is_default = true;
mc->default_cpu_type = MOXIE_CPU_TYPE_NAME("MoxieLite");
}
diff --git a/hw/nios2/10m50_devboard.c b/hw/nios2/10m50_devboard.c
index ad8b2fc670..33dc2bf511 100644
--- a/hw/nios2/10m50_devboard.c
+++ b/hw/nios2/10m50_devboard.c
@@ -120,7 +120,7 @@ static void nios2_10m50_ghrd_machine_init(struct MachineClass *mc)
{
mc->desc = "Altera 10M50 GHRD Nios II design";
mc->init = nios2_10m50_ghrd_init;
- mc->is_default = 1;
+ mc->is_default = true;
}
DEFINE_MACHINE("10m50-ghrd", nios2_10m50_ghrd_machine_init);
diff --git a/hw/openrisc/openrisc_sim.c b/hw/openrisc/openrisc_sim.c
index ad5371250f..d08ce61811 100644
--- a/hw/openrisc/openrisc_sim.c
+++ b/hw/openrisc/openrisc_sim.c
@@ -176,7 +176,7 @@ static void openrisc_sim_machine_init(MachineClass *mc)
mc->desc = "or1k simulation";
mc->init = openrisc_sim_init;
mc->max_cpus = 2;
- mc->is_default = 1;
+ mc->is_default = true;
mc->default_cpu_type = OPENRISC_CPU_TYPE_NAME("or1200");
}
diff --git a/hw/ppc/mac_oldworld.c b/hw/ppc/mac_oldworld.c
index 66e434bba3..440c406eb4 100644
--- a/hw/ppc/mac_oldworld.c
+++ b/hw/ppc/mac_oldworld.c
@@ -435,7 +435,7 @@ static void heathrow_class_init(ObjectClass *oc, void *data)
mc->block_default_type = IF_IDE;
mc->max_cpus = MAX_CPUS;
#ifndef TARGET_PPC64
- mc->is_default = 1;
+ mc->is_default = true;
#endif
/* TOFIX "cad" when Mac floppy is implemented */
mc->default_boot_order = "cd";
diff --git a/hw/ppc/spapr.c b/hw/ppc/spapr.c
index c03ce6afb9..cc10798be4 100644
--- a/hw/ppc/spapr.c
+++ b/hw/ppc/spapr.c
@@ -4560,7 +4560,7 @@ static const TypeInfo spapr_machine_info = {
static void spapr_machine_latest_class_options(MachineClass *mc)
{
mc->alias = "pseries";
- mc->is_default = 1;
+ mc->is_default = true;
}
#define DEFINE_SPAPR_MACHINE(suffix, verstr, latest) \
diff --git a/hw/riscv/spike.c b/hw/riscv/spike.c
index 8823681783..6f03857660 100644
--- a/hw/riscv/spike.c
+++ b/hw/riscv/spike.c
@@ -448,7 +448,7 @@ static void spike_machine_init(MachineClass *mc)
mc->desc = "RISC-V Spike Board";
mc->init = spike_board_init;
mc->max_cpus = 1;
- mc->is_default = 1;
+ mc->is_default = true;
mc->default_cpu_type = SPIKE_V1_10_0_CPU;
}
diff --git a/hw/s390x/s390-virtio-ccw.c b/hw/s390x/s390-virtio-ccw.c
index a89cf4c129..895498cca6 100644
--- a/hw/s390x/s390-virtio-ccw.c
+++ b/hw/s390x/s390-virtio-ccw.c
@@ -630,7 +630,7 @@ bool css_migration_enabled(void)
mc->desc = "VirtIO-ccw based S390 machine v" verstr; \
if (latest) { \
mc->alias = "s390-ccw-virtio"; \
- mc->is_default = 1; \
+ mc->is_default = true; \
} \
} \
static void ccw_machine_##suffix##_instance_init(Object *obj) \
diff --git a/hw/sh4/shix.c b/hw/sh4/shix.c
index 2fc2915428..68b14ee5e7 100644
--- a/hw/sh4/shix.c
+++ b/hw/sh4/shix.c
@@ -82,7 +82,7 @@ static void shix_machine_init(MachineClass *mc)
{
mc->desc = "shix card";
mc->init = shix_init;
- mc->is_default = 1;
+ mc->is_default = true;
mc->default_cpu_type = TYPE_SH7750R_CPU;
}
diff --git a/hw/sparc/sun4m.c b/hw/sparc/sun4m.c
index f5bf95fc9f..36ee1a0a3d 100644
--- a/hw/sparc/sun4m.c
+++ b/hw/sparc/sun4m.c
@@ -1402,7 +1402,7 @@ static void ss5_class_init(ObjectClass *oc, void *data)
mc->desc = "Sun4m platform, SPARCstation 5";
mc->init = ss5_init;
mc->block_default_type = IF_SCSI;
- mc->is_default = 1;
+ mc->is_default = true;
mc->default_boot_order = "c";
mc->default_cpu_type = SPARC_CPU_TYPE_NAME("Fujitsu-MB86904");
mc->default_display = "tcx";
diff --git a/hw/sparc64/sun4u.c b/hw/sparc64/sun4u.c
index b7ac42f7a5..d33e84f831 100644
--- a/hw/sparc64/sun4u.c
+++ b/hw/sparc64/sun4u.c
@@ -816,7 +816,7 @@ static void sun4u_class_init(ObjectClass *oc, void *data)
mc->init = sun4u_init;
mc->block_default_type = IF_IDE;
mc->max_cpus = 1; /* XXX for now */
- mc->is_default = 1;
+ mc->is_default = true;
mc->default_boot_order = "c";
mc->default_cpu_type = SPARC_CPU_TYPE_NAME("TI-UltraSparc-IIi");
mc->ignore_boot_device_suffixes = true;
diff --git a/hw/tricore/tricore_testboard.c b/hw/tricore/tricore_testboard.c
index 20c9ccb3ce..8ec2b5bddd 100644
--- a/hw/tricore/tricore_testboard.c
+++ b/hw/tricore/tricore_testboard.c
@@ -105,7 +105,6 @@ static void ttb_machine_init(MachineClass *mc)
{
mc->desc = "a minimal TriCore board";
mc->init = tricoreboard_init;
- mc->is_default = 0;
mc->default_cpu_type = TRICORE_CPU_TYPE_NAME("tc1796");
}
diff --git a/hw/unicore32/puv3.c b/hw/unicore32/puv3.c
index 7e933de228..7f9c0238fe 100644
--- a/hw/unicore32/puv3.c
+++ b/hw/unicore32/puv3.c
@@ -140,7 +140,7 @@ static void puv3_machine_init(MachineClass *mc)
{
mc->desc = "PKUnity Version-3 based on UniCore32";
mc->init = puv3_init;
- mc->is_default = 1;
+ mc->is_default = true;
mc->default_cpu_type = UNICORE32_CPU_TYPE_NAME("UniCore-II");
}
diff --git a/include/hw/boards.h b/include/hw/boards.h
index 142b86d0ae..9bc42dfb22 100644
--- a/include/hw/boards.h
+++ b/include/hw/boards.h
@@ -81,6 +81,8 @@ typedef struct {
* @max_cpus: maximum number of CPUs supported. Default: 1
* @min_cpus: minimum number of CPUs supported. Default: 1
* @default_cpus: number of CPUs instantiated if none are specified. Default: 1
+ * @is_default:
+ * If true QEMU will use this machine by default if no '-M' option is given.
* @get_hotplug_handler: this function is called during bus-less
* device hotplug. If defined it returns pointer to an instance
* of HotplugHandler object, which handles hotplug operation
@@ -181,7 +183,7 @@ struct MachineClass {
no_sdcard:1,
pci_allow_0_address:1,
legacy_fw_cfg_order:1;
- int is_default;
+ bool is_default;
const char *default_machine_opts;
const char *default_boot_order;
const char *default_display;
diff --git a/include/hw/nmi.h b/include/hw/nmi.h
index a1e128724e..fe37ce3ad8 100644
--- a/include/hw/nmi.h
+++ b/include/hw/nmi.h
@@ -31,7 +31,7 @@
#define NMI_GET_CLASS(obj) \
OBJECT_GET_CLASS(NMIClass, (obj), TYPE_NMI)
#define NMI(obj) \
- INTERFACE_CHECK(NMI, (obj), TYPE_NMI)
+ INTERFACE_CHECK(NMIState, (obj), TYPE_NMI)
typedef struct NMIState NMIState;
diff --git a/include/qemu/compiler.h b/include/qemu/compiler.h
index 85c02c16d3..c76281f354 100644
--- a/include/qemu/compiler.h
+++ b/include/qemu/compiler.h
@@ -236,7 +236,7 @@
* supports QEMU_ERROR, this will be reported at compile time; otherwise
* this will be reported at link time due to the missing symbol.
*/
-#ifdef __OPTIMIZE__
+#if defined(__OPTIMIZE__) && !defined(__NO_INLINE__)
extern void QEMU_NORETURN QEMU_ERROR("code path is reachable")
qemu_build_not_reached(void);
#else
diff --git a/softmmu/vl.c b/softmmu/vl.c
index 705ee6f841..5549f4b619 100644
--- a/softmmu/vl.c
+++ b/softmmu/vl.c
@@ -1163,16 +1163,18 @@ static MachineClass *find_machine(const char *name, GSList *machines)
static MachineClass *find_default_machine(GSList *machines)
{
GSList *el;
+ MachineClass *default_machineclass = NULL;
for (el = machines; el; el = el->next) {
MachineClass *mc = el->data;
if (mc->is_default) {
- return mc;
+ assert(default_machineclass == NULL && "Multiple default machines");
+ default_machineclass = mc;
}
}
- return NULL;
+ return default_machineclass;
}
static int machine_help_func(QemuOpts *opts, MachineState *machine)
diff --git a/tcg/arm/tcg-target.inc.c b/tcg/arm/tcg-target.inc.c
index fffb6611e2..6aa7757aac 100644
--- a/tcg/arm/tcg-target.inc.c
+++ b/tcg/arm/tcg-target.inc.c
@@ -1745,7 +1745,7 @@ static void tcg_out_qemu_st(TCGContext *s, const TCGArg *args, bool is64)
#endif
}
-static tcg_insn_unit *tb_ret_addr;
+static void tcg_out_epilogue(TCGContext *s);
static inline void tcg_out_op(TCGContext *s, TCGOpcode opc,
const TCGArg *args, const int *const_args)
@@ -1755,14 +1755,8 @@ static inline void tcg_out_op(TCGContext *s, TCGOpcode opc,
switch (opc) {
case INDEX_op_exit_tb:
- /* Reuse the zeroing that exists for goto_ptr. */
- a0 = args[0];
- if (a0 == 0) {
- tcg_out_goto(s, COND_AL, s->code_gen_epilogue);
- } else {
- tcg_out_movi32(s, COND_AL, TCG_REG_R0, args[0]);
- tcg_out_goto(s, COND_AL, tb_ret_addr);
- }
+ tcg_out_movi(s, TCG_TYPE_PTR, TCG_REG_R0, args[0]);
+ tcg_out_epilogue(s);
break;
case INDEX_op_goto_tb:
{
@@ -2284,19 +2278,17 @@ static void tcg_out_nop_fill(tcg_insn_unit *p, int count)
+ TCG_TARGET_STACK_ALIGN - 1) \
& -TCG_TARGET_STACK_ALIGN)
+#define STACK_ADDEND (FRAME_SIZE - PUSH_SIZE)
+
static void tcg_target_qemu_prologue(TCGContext *s)
{
- int stack_addend;
-
/* Calling convention requires us to save r4-r11 and lr. */
/* stmdb sp!, { r4 - r11, lr } */
tcg_out32(s, (COND_AL << 28) | 0x092d4ff0);
/* Reserve callee argument and tcg temp space. */
- stack_addend = FRAME_SIZE - PUSH_SIZE;
-
tcg_out_dat_rI(s, COND_AL, ARITH_SUB, TCG_REG_CALL_STACK,
- TCG_REG_CALL_STACK, stack_addend, 1);
+ TCG_REG_CALL_STACK, STACK_ADDEND, 1);
tcg_set_frame(s, TCG_REG_CALL_STACK, TCG_STATIC_CALL_ARGS_SIZE,
CPU_TEMP_BUF_NLONGS * sizeof(long));
@@ -2310,11 +2302,14 @@ static void tcg_target_qemu_prologue(TCGContext *s)
*/
s->code_gen_epilogue = s->code_ptr;
tcg_out_movi(s, TCG_TYPE_PTR, TCG_REG_R0, 0);
+ tcg_out_epilogue(s);
+}
- /* TB epilogue */
- tb_ret_addr = s->code_ptr;
+static void tcg_out_epilogue(TCGContext *s)
+{
+ /* Release local stack frame. */
tcg_out_dat_rI(s, COND_AL, ARITH_ADD, TCG_REG_CALL_STACK,
- TCG_REG_CALL_STACK, stack_addend, 1);
+ TCG_REG_CALL_STACK, STACK_ADDEND, 1);
/* ldmia sp!, { r4 - r11, pc } */
tcg_out32(s, (COND_AL << 28) | 0x08bd8ff0);
generated by cgit v1.2.3-55-g7522 (git 2.39.0) at 2025-04-28 00:07:06 +0200