diff options
| -rw-r--r-- | accel/tcg/user-exec.c | 3 | ||||
| -rw-r--r-- | hw/core/cpu.c | 9 | ||||
| -rw-r--r-- | include/hw/core/cpu.h | 9 | ||||
| -rw-r--r-- | softmmu/physmem.c | 4 | ||||
| -rw-r--r-- | target/arm/cpu.c | 4 |
5 files changed, 12 insertions, 17 deletions
diff --git a/accel/tcg/user-exec.c b/accel/tcg/user-exec.c index 5509dd53e9..9e6e188d19 100644 --- a/accel/tcg/user-exec.c +++ b/accel/tcg/user-exec.c @@ -187,7 +187,8 @@ static inline int handle_cpu_signal(uintptr_t pc, siginfo_t *info, clear_helper_retaddr(); cc = CPU_GET_CLASS(cpu); - cc->tcg_ops.tlb_fill(cpu, address, 0, access_type, MMU_USER_IDX, false, pc); + cc->tcg_ops.tlb_fill(cpu, address, 0, access_type, + MMU_USER_IDX, false, pc); g_assert_not_reached(); } diff --git a/hw/core/cpu.c b/hw/core/cpu.c index 3d5bf9fe02..00330ba07d 100644 --- a/hw/core/cpu.c +++ b/hw/core/cpu.c @@ -186,14 +186,6 @@ static int cpu_common_gdb_write_register(CPUState *cpu, uint8_t *buf, int reg) return 0; } -static bool cpu_common_debug_check_watchpoint(CPUState *cpu, CPUWatchpoint *wp) -{ - /* If no extra check is required, QEMU watchpoint match can be considered - * as an architectural match. - */ - return true; -} - static bool cpu_common_virtio_is_big_endian(CPUState *cpu) { return target_words_bigendian(); @@ -415,7 +407,6 @@ static void cpu_class_init(ObjectClass *klass, void *data) k->gdb_read_register = cpu_common_gdb_read_register; k->gdb_write_register = cpu_common_gdb_write_register; k->virtio_is_big_endian = cpu_common_virtio_is_big_endian; - k->debug_check_watchpoint = cpu_common_debug_check_watchpoint; set_bit(DEVICE_CATEGORY_CPU, dc->categories); dc->realize = cpu_common_realizefn; dc->unrealize = cpu_common_unrealizefn; diff --git a/include/hw/core/cpu.h b/include/hw/core/cpu.h index 832dd26e92..e76a49754d 100644 --- a/include/hw/core/cpu.h +++ b/include/hw/core/cpu.h @@ -141,6 +141,12 @@ typedef struct TcgCpuOperations { */ vaddr (*adjust_watchpoint_address)(CPUState *cpu, vaddr addr, int len); + /** + * @debug_check_watchpoint: return true if the architectural + * watchpoint whose address has matched should really fire, used by ARM + */ + bool (*debug_check_watchpoint)(CPUState *cpu, CPUWatchpoint *wp); + } TcgCpuOperations; /** @@ -177,8 +183,6 @@ typedef struct TcgCpuOperations { * a memory access with the specified memory transaction attributes. * @gdb_read_register: Callback for letting GDB read a register. * @gdb_write_register: Callback for letting GDB write a register. - * @debug_check_watchpoint: Callback: return true if the architectural - * watchpoint whose address has matched should really fire. * @write_elf64_note: Callback for writing a CPU-specific ELF note to a * 64-bit VM coredump. * @write_elf32_qemunote: Callback for writing a CPU- and QEMU-specific ELF @@ -232,7 +236,6 @@ struct CPUClass { int (*asidx_from_attrs)(CPUState *cpu, MemTxAttrs attrs); int (*gdb_read_register)(CPUState *cpu, GByteArray *buf, int reg); int (*gdb_write_register)(CPUState *cpu, uint8_t *buf, int reg); - bool (*debug_check_watchpoint)(CPUState *cpu, CPUWatchpoint *wp); int (*write_elf64_note)(WriteCoreDumpFunction f, CPUState *cpu, int cpuid, void *opaque); diff --git a/softmmu/physmem.c b/softmmu/physmem.c index 3d9a9c39bd..9e64cf7adf 100644 --- a/softmmu/physmem.c +++ b/softmmu/physmem.c @@ -917,8 +917,8 @@ void cpu_check_watchpoint(CPUState *cpu, vaddr addr, vaddr len, wp->hitaddr = MAX(addr, wp->vaddr); wp->hitattrs = attrs; if (!cpu->watchpoint_hit) { - if (wp->flags & BP_CPU && - !cc->debug_check_watchpoint(cpu, wp)) { + if (wp->flags & BP_CPU && cc->tcg_ops.debug_check_watchpoint && + !cc->tcg_ops.debug_check_watchpoint(cpu, wp)) { wp->flags &= ~BP_WATCHPOINT_HIT; continue; } diff --git a/target/arm/cpu.c b/target/arm/cpu.c index 2a14431065..c9a66d3103 100644 --- a/target/arm/cpu.c +++ b/target/arm/cpu.c @@ -2280,12 +2280,12 @@ static void arm_cpu_class_init(ObjectClass *oc, void *data) cc->tcg_ops.synchronize_from_tb = arm_cpu_synchronize_from_tb; cc->tcg_ops.tlb_fill = arm_cpu_tlb_fill; cc->tcg_ops.debug_excp_handler = arm_debug_excp_handler; - cc->debug_check_watchpoint = arm_debug_check_watchpoint; #if !defined(CONFIG_USER_ONLY) + cc->tcg_ops.do_interrupt = arm_cpu_do_interrupt; cc->tcg_ops.do_transaction_failed = arm_cpu_do_transaction_failed; cc->tcg_ops.do_unaligned_access = arm_cpu_do_unaligned_access; cc->tcg_ops.adjust_watchpoint_address = arm_adjust_watchpoint_address; - cc->tcg_ops.do_interrupt = arm_cpu_do_interrupt; + cc->tcg_ops.debug_check_watchpoint = arm_debug_check_watchpoint; #endif /* CONFIG_TCG && !CONFIG_USER_ONLY */ #endif /* CONFIG_TCG */ } |