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-rw-r--r--hw/arm/allwinner-a10.c12
-rw-r--r--hw/arm/boot.c10
-rw-r--r--hw/arm/fsl-imx6.c14
-rw-r--r--hw/arm/fsl-imx7.c13
-rw-r--r--hw/arm/integratorcp.c23
5 files changed, 45 insertions, 27 deletions
diff --git a/hw/arm/allwinner-a10.c b/hw/arm/allwinner-a10.c
index 43a3f01f45..5dbbacb7e8 100644
--- a/hw/arm/allwinner-a10.c
+++ b/hw/arm/allwinner-a10.c
@@ -38,11 +38,6 @@ static void aw_a10_init(Object *obj)
object_initialize(&s->emac, sizeof(s->emac), TYPE_AW_EMAC);
qdev_set_parent_bus(DEVICE(&s->emac), sysbus_get_default());
- /* FIXME use qdev NIC properties instead of nd_table[] */
- if (nd_table[0].used) {
- qemu_check_nic_model(&nd_table[0], TYPE_AW_EMAC);
- qdev_set_nic_properties(DEVICE(&s->emac), &nd_table[0]);
- }
object_initialize(&s->sata, sizeof(s->sata), TYPE_ALLWINNER_AHCI);
qdev_set_parent_bus(DEVICE(&s->sata), sysbus_get_default());
@@ -91,6 +86,11 @@ static void aw_a10_realize(DeviceState *dev, Error **errp)
sysbus_connect_irq(sysbusdev, 4, s->irq[67]);
sysbus_connect_irq(sysbusdev, 5, s->irq[68]);
+ /* FIXME use qdev NIC properties instead of nd_table[] */
+ if (nd_table[0].used) {
+ qemu_check_nic_model(&nd_table[0], TYPE_AW_EMAC);
+ qdev_set_nic_properties(DEVICE(&s->emac), &nd_table[0]);
+ }
object_property_set_bool(OBJECT(&s->emac), true, "realized", &err);
if (err != NULL) {
error_propagate(errp, err);
@@ -118,7 +118,7 @@ static void aw_a10_class_init(ObjectClass *oc, void *data)
DeviceClass *dc = DEVICE_CLASS(oc);
dc->realize = aw_a10_realize;
- /* Reason: Uses serial_hds in realize and nd_table in instance_init */
+ /* Reason: Uses serial_hds and nd_table in realize function */
dc->user_creatable = false;
}
diff --git a/hw/arm/boot.c b/hw/arm/boot.c
index 9319b12fcd..26184bcd7c 100644
--- a/hw/arm/boot.c
+++ b/hw/arm/boot.c
@@ -422,6 +422,7 @@ static void fdt_add_psci_node(void *fdt)
ARMCPU *armcpu = ARM_CPU(qemu_get_cpu(0));
const char *psci_method;
int64_t psci_conduit;
+ int rc;
psci_conduit = object_property_get_int(OBJECT(armcpu),
"psci-conduit",
@@ -439,6 +440,15 @@ static void fdt_add_psci_node(void *fdt)
g_assert_not_reached();
}
+ /*
+ * If /psci node is present in provided DTB, assume that no fixup
+ * is necessary and all PSCI configuration should be taken as-is
+ */
+ rc = fdt_path_offset(fdt, "/psci");
+ if (rc >= 0) {
+ return;
+ }
+
qemu_fdt_add_subnode(fdt, "/psci");
if (armcpu->psci_version == 2) {
const char comp[] = "arm,psci-0.2\0arm,psci";
diff --git a/hw/arm/fsl-imx6.c b/hw/arm/fsl-imx6.c
index b6ac72de27..9dfbc9a8c4 100644
--- a/hw/arm/fsl-imx6.c
+++ b/hw/arm/fsl-imx6.c
@@ -37,13 +37,7 @@ static void fsl_imx6_init(Object *obj)
char name[NAME_SIZE];
int i;
- if (smp_cpus > FSL_IMX6_NUM_CPUS) {
- error_report("%s: Only %d CPUs are supported (%d requested)",
- TYPE_FSL_IMX6, FSL_IMX6_NUM_CPUS, smp_cpus);
- exit(1);
- }
-
- for (i = 0; i < smp_cpus; i++) {
+ for (i = 0; i < MIN(smp_cpus, FSL_IMX6_NUM_CPUS); i++) {
object_initialize(&s->cpu[i], sizeof(s->cpu[i]),
"cortex-a9-" TYPE_ARM_CPU);
snprintf(name, NAME_SIZE, "cpu%d", i);
@@ -119,6 +113,12 @@ static void fsl_imx6_realize(DeviceState *dev, Error **errp)
uint16_t i;
Error *err = NULL;
+ if (smp_cpus > FSL_IMX6_NUM_CPUS) {
+ error_setg(errp, "%s: Only %d CPUs are supported (%d requested)",
+ TYPE_FSL_IMX6, FSL_IMX6_NUM_CPUS, smp_cpus);
+ return;
+ }
+
for (i = 0; i < smp_cpus; i++) {
/* On uniprocessor, the CBAR is set to 0 */
diff --git a/hw/arm/fsl-imx7.c b/hw/arm/fsl-imx7.c
index 26ef36c79a..390b4310e6 100644
--- a/hw/arm/fsl-imx7.c
+++ b/hw/arm/fsl-imx7.c
@@ -35,13 +35,8 @@ static void fsl_imx7_init(Object *obj)
char name[NAME_SIZE];
int i;
- if (smp_cpus > FSL_IMX7_NUM_CPUS) {
- error_report("%s: Only %d CPUs are supported (%d requested)",
- TYPE_FSL_IMX7, FSL_IMX7_NUM_CPUS, smp_cpus);
- exit(1);
- }
- for (i = 0; i < smp_cpus; i++) {
+ for (i = 0; i < MIN(smp_cpus, FSL_IMX7_NUM_CPUS); i++) {
object_initialize(&s->cpu[i], sizeof(s->cpu[i]),
ARM_CPU_TYPE_NAME("cortex-a7"));
snprintf(name, NAME_SIZE, "cpu%d", i);
@@ -197,6 +192,12 @@ static void fsl_imx7_realize(DeviceState *dev, Error **errp)
qemu_irq irq;
char name[NAME_SIZE];
+ if (smp_cpus > FSL_IMX7_NUM_CPUS) {
+ error_setg(errp, "%s: Only %d CPUs are supported (%d requested)",
+ TYPE_FSL_IMX7, FSL_IMX7_NUM_CPUS, smp_cpus);
+ return;
+ }
+
for (i = 0; i < smp_cpus; i++) {
o = OBJECT(&s->cpu[i]);
diff --git a/hw/arm/integratorcp.c b/hw/arm/integratorcp.c
index e8303b83be..58b40efc19 100644
--- a/hw/arm/integratorcp.c
+++ b/hw/arm/integratorcp.c
@@ -266,7 +266,6 @@ static const MemoryRegionOps integratorcm_ops = {
static void integratorcm_init(Object *obj)
{
IntegratorCMState *s = INTEGRATOR_CM(obj);
- SysBusDevice *dev = SYS_BUS_DEVICE(obj);
s->cm_osc = 0x01000048;
/* ??? What should the high bits of this value be? */
@@ -276,20 +275,28 @@ static void integratorcm_init(Object *obj)
s->cm_init = 0x00000112;
s->cm_refcnt_offset = muldiv64(qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL), 24,
1000);
- memory_region_init_ram(&s->flash, obj, "integrator.flash", 0x100000,
- &error_fatal);
- memory_region_init_io(&s->iomem, obj, &integratorcm_ops, s,
- "integratorcm", 0x00800000);
- sysbus_init_mmio(dev, &s->iomem);
-
- integratorcm_do_remap(s);
/* ??? Save/restore. */
}
static void integratorcm_realize(DeviceState *d, Error **errp)
{
IntegratorCMState *s = INTEGRATOR_CM(d);
+ SysBusDevice *dev = SYS_BUS_DEVICE(d);
+ Error *local_err = NULL;
+
+ memory_region_init_ram(&s->flash, OBJECT(d), "integrator.flash", 0x100000,
+ &local_err);
+ if (local_err) {
+ error_propagate(errp, local_err);
+ return;
+ }
+
+ memory_region_init_io(&s->iomem, OBJECT(d), &integratorcm_ops, s,
+ "integratorcm", 0x00800000);
+ sysbus_init_mmio(dev, &s->iomem);
+
+ integratorcm_do_remap(s);
if (s->memsz >= 256) {
integrator_spd[31] = 64;
generated by cgit v1.2.3-55-g7522 (git 2.39.0) at 2025-04-27 02:46:15 +0200