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-rw-r--r--hw/display/artist.c43
-rw-r--r--hw/display/cirrus_vga.c12
-rw-r--r--hw/display/trace-events4
-rw-r--r--hw/display/virtio-gpu.c5
4 files changed, 45 insertions, 19 deletions
diff --git a/hw/display/artist.c b/hw/display/artist.c
index 71982559c6..955296d3d8 100644
--- a/hw/display/artist.c
+++ b/hw/display/artist.c
@@ -192,6 +192,10 @@ static const char *artist_reg_name(uint64_t addr)
}
#undef REG_NAME
+/* artist has a fixed line length of 2048 bytes. */
+#define ADDR_TO_Y(addr) extract32(addr, 11, 11)
+#define ADDR_TO_X(addr) extract32(addr, 0, 11)
+
static int16_t artist_get_x(uint32_t reg)
{
return reg >> 16;
@@ -348,13 +352,13 @@ static void artist_invalidate_cursor(ARTISTState *s)
y, s->cursor_height);
}
-static void vram_bit_write(ARTISTState *s, int posx, int posy, bool incr_x,
+static void vram_bit_write(ARTISTState *s, int posy, bool incr_x,
int size, uint32_t data)
{
struct vram_buffer *buf;
uint32_t vram_bitmask = s->vram_bitmask;
int mask, i, pix_count, pix_length;
- unsigned int offset, width;
+ unsigned int posx, offset, width;
uint8_t *data8, *p;
pix_count = vram_write_pix_per_transfer(s);
@@ -366,6 +370,8 @@ static void vram_bit_write(ARTISTState *s, int posx, int posy, bool incr_x,
if (s->cmap_bm_access) {
offset = s->vram_pos;
} else {
+ posx = ADDR_TO_X(s->vram_pos >> 2);
+ posy += ADDR_TO_Y(s->vram_pos >> 2);
offset = posy * width + posx;
}
@@ -858,7 +864,6 @@ static void artist_reg_write(void *opaque, hwaddr addr, uint64_t val,
unsigned size)
{
ARTISTState *s = opaque;
- int posx, posy;
int width, height;
trace_artist_reg_write(size, addr, artist_reg_name(addr & ~3ULL), val);
@@ -881,16 +886,12 @@ static void artist_reg_write(void *opaque, hwaddr addr, uint64_t val,
break;
case VRAM_WRITE_INCR_Y:
- posx = (s->vram_pos >> 2) & 0x7ff;
- posy = (s->vram_pos >> 13) & 0x3ff;
- vram_bit_write(s, posx, posy + s->vram_char_y++, false, size, val);
+ vram_bit_write(s, s->vram_char_y++, false, size, val);
break;
case VRAM_WRITE_INCR_X:
case VRAM_WRITE_INCR_X2:
- posx = (s->vram_pos >> 2) & 0x7ff;
- posy = (s->vram_pos >> 13) & 0x3ff;
- vram_bit_write(s, posx, posy + s->vram_char_y, true, size, val);
+ vram_bit_write(s, s->vram_char_y, true, size, val);
break;
case VRAM_IDX:
@@ -1156,8 +1157,7 @@ static void artist_vram_write(void *opaque, hwaddr addr, uint64_t val,
{
ARTISTState *s = opaque;
struct vram_buffer *buf;
- int posy = (addr >> 11) & 0x3ff;
- int posx = addr & 0x7ff;
+ unsigned int posy, posx;
unsigned int offset;
trace_artist_vram_write(size, addr, val);
@@ -1170,6 +1170,9 @@ static void artist_vram_write(void *opaque, hwaddr addr, uint64_t val,
}
buf = vram_write_buffer(s);
+ posy = ADDR_TO_Y(addr);
+ posx = ADDR_TO_X(addr);
+
if (!buf->size) {
return;
}
@@ -1212,7 +1215,7 @@ static uint64_t artist_vram_read(void *opaque, hwaddr addr, unsigned size)
ARTISTState *s = opaque;
struct vram_buffer *buf;
uint64_t val;
- int posy, posx;
+ unsigned int posy, posx;
if (s->cmap_bm_access) {
buf = &s->vram_buffer[ARTIST_BUFFER_CMAP];
@@ -1229,8 +1232,8 @@ static uint64_t artist_vram_read(void *opaque, hwaddr addr, unsigned size)
return 0;
}
- posy = (addr >> 13) & 0x3ff;
- posx = (addr >> 2) & 0x7ff;
+ posy = ADDR_TO_Y(addr);
+ posx = ADDR_TO_X(addr);
if (posy > buf->height || posx > buf->width) {
return 0;
@@ -1374,6 +1377,18 @@ static void artist_realizefn(DeviceState *dev, Error **errp)
struct vram_buffer *buf;
hwaddr offset = 0;
+ if (s->width > 2048 || s->height > 2048) {
+ error_report("artist: screen size can not exceed 2048 x 2048 pixel.");
+ s->width = MIN(s->width, 2048);
+ s->height = MIN(s->height, 2048);
+ }
+
+ if (s->width < 640 || s->height < 480) {
+ error_report("artist: minimum screen size is 640 x 480 pixel.");
+ s->width = MAX(s->width, 640);
+ s->height = MAX(s->height, 480);
+ }
+
memory_region_init(&s->mem_as_root, OBJECT(dev), "artist", ~0ull);
address_space_init(&s->as, &s->mem_as_root, "artist");
diff --git a/hw/display/cirrus_vga.c b/hw/display/cirrus_vga.c
index 02d9ed0bd4..41e71af08a 100644
--- a/hw/display/cirrus_vga.c
+++ b/hw/display/cirrus_vga.c
@@ -640,10 +640,16 @@ static void cirrus_invalidate_region(CirrusVGAState * s, int off_begin,
}
for (y = 0; y < lines; y++) {
- off_cur = off_begin;
+ off_cur = off_begin & s->cirrus_addr_mask;
off_cur_end = ((off_cur + bytesperline - 1) & s->cirrus_addr_mask) + 1;
- assert(off_cur_end >= off_cur);
- memory_region_set_dirty(&s->vga.vram, off_cur, off_cur_end - off_cur);
+ if (off_cur_end >= off_cur) {
+ memory_region_set_dirty(&s->vga.vram, off_cur, off_cur_end - off_cur);
+ } else {
+ /* wraparound */
+ memory_region_set_dirty(&s->vga.vram, off_cur,
+ s->cirrus_addr_mask + 1 - off_cur);
+ memory_region_set_dirty(&s->vga.vram, 0, off_cur_end);
+ }
off_begin += off_pitch;
}
}
diff --git a/hw/display/trace-events b/hw/display/trace-events
index 970d6bac5d..957b8ba994 100644
--- a/hw/display/trace-events
+++ b/hw/display/trace-events
@@ -32,9 +32,11 @@ vmware_scratch_read(uint32_t index, uint32_t value) "index %d, value 0x%x"
vmware_scratch_write(uint32_t index, uint32_t value) "index %d, value 0x%x"
vmware_setmode(uint32_t w, uint32_t h, uint32_t bpp) "%dx%d @ %d bpp"
+# virtio-gpu-base.c
+virtio_gpu_features(bool virgl) "virgl %d"
+
# virtio-gpu-3d.c
# virtio-gpu.c
-virtio_gpu_features(bool virgl) "virgl %d"
virtio_gpu_cmd_get_display_info(void) ""
virtio_gpu_cmd_get_edid(uint32_t scanout) "scanout %d"
virtio_gpu_cmd_set_scanout(uint32_t id, uint32_t res, uint32_t w, uint32_t h, uint32_t x, uint32_t y) "id %d, res 0x%x, w %d, h %d, x %d, y %d"
diff --git a/hw/display/virtio-gpu.c b/hw/display/virtio-gpu.c
index 5f0dd7c150..90be4e3ed7 100644
--- a/hw/display/virtio-gpu.c
+++ b/hw/display/virtio-gpu.c
@@ -646,9 +646,9 @@ int virtio_gpu_create_mapping_iov(VirtIOGPU *g,
uint64_t a = le64_to_cpu(ents[i].addr);
uint32_t l = le32_to_cpu(ents[i].length);
hwaddr len = l;
- (*iov)[i].iov_len = l;
(*iov)[i].iov_base = dma_memory_map(VIRTIO_DEVICE(g)->dma_as,
a, &len, DMA_DIRECTION_TO_DEVICE);
+ (*iov)[i].iov_len = len;
if (addr) {
(*addr)[i] = a;
}
@@ -656,6 +656,9 @@ int virtio_gpu_create_mapping_iov(VirtIOGPU *g,
qemu_log_mask(LOG_GUEST_ERROR, "%s: failed to map MMIO memory for"
" resource %d element %d\n",
__func__, ab->resource_id, i);
+ if ((*iov)[i].iov_base) {
+ i++; /* cleanup the 'i'th map */
+ }
virtio_gpu_cleanup_mapping_iov(g, *iov, i);
g_free(ents);
*iov = NULL;
generated by cgit v1.2.3-55-g7522 (git 2.39.0) at 2025-04-29 05:43:35 +0200