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-rw-r--r--hw/isa/Kconfig9
-rw-r--r--hw/isa/lpc_ich9.c3
-rw-r--r--hw/isa/piix3.c28
-rw-r--r--hw/isa/piix4.c10
-rw-r--r--hw/isa/vt82c686.c120
5 files changed, 132 insertions, 38 deletions
diff --git a/hw/isa/Kconfig b/hw/isa/Kconfig
index d42143a991..18b5c6bf3f 100644
--- a/hw/isa/Kconfig
+++ b/hw/isa/Kconfig
@@ -33,13 +33,20 @@ config PC87312
config PIIX3
bool
+ select I8257
select ISA_BUS
config PIIX4
bool
# For historical reasons, SuperIO devices are created in the board
# for PIIX4.
+ select ACPI_PIIX4
+ select I8254
+ select I8257
+ select I8259
+ select IDE_PIIX
select ISA_BUS
+ select MC146818RTC
select USB_UHCI
config VT82C686
@@ -53,6 +60,7 @@ config VT82C686
select I8254
select I8257
select I8259
+ select IDE_VIA
select MC146818RTC
select PARALLEL
@@ -67,6 +75,7 @@ config LPC_ICH9
bool
# For historical reasons, SuperIO devices are created in the board
# for ICH9.
+ select I8257
select ISA_BUS
select ACPI_SMBUS
select ACPI_X86_ICH
diff --git a/hw/isa/lpc_ich9.c b/hw/isa/lpc_ich9.c
index 4553b5925b..8694e58b21 100644
--- a/hw/isa/lpc_ich9.c
+++ b/hw/isa/lpc_ich9.c
@@ -34,6 +34,7 @@
#include "qapi/error.h"
#include "qapi/visitor.h"
#include "qemu/range.h"
+#include "hw/dma/i8257.h"
#include "hw/isa/isa.h"
#include "migration/vmstate.h"
#include "hw/irq.h"
@@ -722,6 +723,8 @@ static void ich9_lpc_realize(PCIDevice *d, Error **errp)
qdev_init_gpio_out_named(dev, lpc->gsi, ICH9_GPIO_GSI, GSI_NUM_PINS);
isa_bus_irqs(isa_bus, lpc->gsi);
+
+ i8257_dma_init(isa_bus, 0);
}
static bool ich9_rst_cnt_needed(void *opaque)
diff --git a/hw/isa/piix3.c b/hw/isa/piix3.c
index 48f9ab1096..808fd4eadf 100644
--- a/hw/isa/piix3.c
+++ b/hw/isa/piix3.c
@@ -25,12 +25,11 @@
#include "qemu/osdep.h"
#include "qemu/range.h"
#include "qapi/error.h"
+#include "hw/dma/i8257.h"
#include "hw/southbridge/piix.h"
#include "hw/irq.h"
#include "hw/isa/isa.h"
#include "hw/xen/xen.h"
-#include "sysemu/xen.h"
-#include "sysemu/reset.h"
#include "sysemu/runstate.h"
#include "migration/vmstate.h"
#include "hw/acpi/acpi_aml_interface.h"
@@ -155,9 +154,9 @@ static void piix3_write_config_xen(PCIDevice *dev,
piix3_write_config(dev, address, val, len);
}
-static void piix3_reset(void *opaque)
+static void piix3_reset(DeviceState *dev)
{
- PIIX3State *d = opaque;
+ PIIX3State *d = PIIX3_PCI_DEVICE(dev);
uint8_t *pci_conf = d->dev.config;
pci_conf[0x04] = 0x07; /* master, memory and I/O */
@@ -289,15 +288,21 @@ static uint64_t rcr_read(void *opaque, hwaddr addr, unsigned len)
static const MemoryRegionOps rcr_ops = {
.read = rcr_read,
.write = rcr_write,
- .endianness = DEVICE_LITTLE_ENDIAN
+ .endianness = DEVICE_LITTLE_ENDIAN,
+ .impl = {
+ .min_access_size = 1,
+ .max_access_size = 1,
+ },
};
static void pci_piix3_realize(PCIDevice *dev, Error **errp)
{
PIIX3State *d = PIIX3_PCI_DEVICE(dev);
+ ISABus *isa_bus;
- if (!isa_bus_new(DEVICE(d), get_system_memory(),
- pci_address_space_io(dev), errp)) {
+ isa_bus = isa_bus_new(DEVICE(d), pci_address_space(dev),
+ pci_address_space_io(dev), errp);
+ if (!isa_bus) {
return;
}
@@ -306,7 +311,7 @@ static void pci_piix3_realize(PCIDevice *dev, Error **errp)
memory_region_add_subregion_overlap(pci_address_space_io(dev),
PIIX_RCR_IOPORT, &d->rcr_mem, 1);
- qemu_register_reset(piix3_reset, d);
+ i8257_dma_init(isa_bus, 0);
}
static void build_pci_isa_aml(AcpiDevAmlIf *adev, Aml *scope)
@@ -328,6 +333,7 @@ static void pci_piix3_class_init(ObjectClass *klass, void *data)
PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);
AcpiDevAmlIfClass *adevc = ACPI_DEV_AML_IF_CLASS(klass);
+ dc->reset = piix3_reset;
dc->desc = "ISA bridge";
dc->vmsd = &vmstate_piix3;
dc->hotpluggable = false;
@@ -370,7 +376,7 @@ static void piix3_realize(PCIDevice *dev, Error **errp)
pci_bus_irqs(pci_bus, piix3_set_irq, pci_slot_get_pirq,
piix3, PIIX_NUM_PIRQS);
pci_bus_set_route_irq_fn(pci_bus, piix3_route_intx_pin_to_irq);
-};
+}
static void piix3_class_init(ObjectClass *klass, void *data)
{
@@ -405,7 +411,7 @@ static void piix3_xen_realize(PCIDevice *dev, Error **errp)
*/
pci_bus_irqs(pci_bus, xen_piix3_set_irq, xen_pci_slot_get_pirq,
piix3, XEN_PIIX_NUM_PIRQS);
-};
+}
static void piix3_xen_class_init(ObjectClass *klass, void *data)
{
@@ -413,7 +419,7 @@ static void piix3_xen_class_init(ObjectClass *klass, void *data)
k->config_write = piix3_write_config_xen;
k->realize = piix3_xen_realize;
-};
+}
static const TypeInfo piix3_xen_info = {
.name = TYPE_PIIX3_XEN_DEVICE,
diff --git a/hw/isa/piix4.c b/hw/isa/piix4.c
index 15f344dbb7..8fc1db6dc9 100644
--- a/hw/isa/piix4.c
+++ b/hw/isa/piix4.c
@@ -28,6 +28,7 @@
#include "hw/irq.h"
#include "hw/southbridge/piix.h"
#include "hw/pci/pci.h"
+#include "hw/ide/piix.h"
#include "hw/isa/isa.h"
#include "hw/intc/i8259.h"
#include "hw/dma/i8257.h"
@@ -139,9 +140,11 @@ static void piix4_isa_reset(DeviceState *dev)
pci_conf[0xab] = 0x00;
pci_conf[0xac] = 0x00;
pci_conf[0xae] = 0x00;
+
+ d->rcr = 0;
}
-static int piix4_ide_post_load(void *opaque, int version_id)
+static int piix4_post_load(void *opaque, int version_id)
{
PIIX4State *s = opaque;
@@ -156,7 +159,7 @@ static const VMStateDescription vmstate_piix4 = {
.name = "PIIX4",
.version_id = 3,
.minimum_version_id = 2,
- .post_load = piix4_ide_post_load,
+ .post_load = piix4_post_load,
.fields = (VMStateField[]) {
VMSTATE_PCI_DEVICE(dev, PIIX4State),
VMSTATE_UINT8_V(rcr, PIIX4State, 3),
@@ -254,7 +257,6 @@ static void piix4_realize(PCIDevice *dev, Error **errp)
if (!qdev_realize(DEVICE(&s->ide), BUS(pci_bus), errp)) {
return;
}
- pci_ide_create_devs(PCI_DEVICE(&s->ide));
/* USB */
qdev_prop_set_int32(DEVICE(&s->uhci), "addr", dev->devfn + 2);
@@ -277,7 +279,7 @@ static void piix4_init(Object *obj)
PIIX4State *s = PIIX4_PCI_DEVICE(obj);
object_initialize_child(obj, "rtc", &s->rtc, TYPE_MC146818_RTC);
- object_initialize_child(obj, "ide", &s->ide, "piix4-ide");
+ object_initialize_child(obj, "ide", &s->ide, TYPE_PIIX4_IDE);
object_initialize_child(obj, "uhci", &s->uhci, "piix4-usb-uhci");
object_initialize_child(obj, "pm", &s->pm, TYPE_PIIX4_PM);
diff --git a/hw/isa/vt82c686.c b/hw/isa/vt82c686.c
index 8f656251b8..3f9bd0c04d 100644
--- a/hw/isa/vt82c686.c
+++ b/hw/isa/vt82c686.c
@@ -17,11 +17,13 @@
#include "hw/isa/vt82c686.h"
#include "hw/pci/pci.h"
#include "hw/qdev-properties.h"
+#include "hw/ide/pci.h"
#include "hw/isa/isa.h"
#include "hw/isa/superio.h"
#include "hw/intc/i8259.h"
#include "hw/irq.h"
#include "hw/dma/i8257.h"
+#include "hw/usb/hcd-uhci.h"
#include "hw/timer/i8254.h"
#include "hw/rtc/mc146818rtc.h"
#include "migration/vmstate.h"
@@ -248,6 +250,8 @@ static const ViaPMInitInfo vt82c686b_pm_init_info = {
.device_id = PCI_DEVICE_ID_VIA_82C686B_PM,
};
+#define TYPE_VT82C686B_PM "vt82c686b-pm"
+
static const TypeInfo vt82c686b_pm_info = {
.name = TYPE_VT82C686B_PM,
.parent = TYPE_VIA_PM,
@@ -259,6 +263,8 @@ static const ViaPMInitInfo vt8231_pm_init_info = {
.device_id = PCI_DEVICE_ID_VIA_8231_PM,
};
+#define TYPE_VT8231_PM "vt8231-pm"
+
static const TypeInfo vt8231_pm_info = {
.name = TYPE_VT8231_PM,
.parent = TYPE_VIA_PM,
@@ -543,8 +549,13 @@ struct ViaISAState {
PCIDevice dev;
qemu_irq cpu_intr;
qemu_irq *isa_irqs;
- ISABus *isa_bus;
- ViaSuperIOState *via_sio;
+ ViaSuperIOState via_sio;
+ RTCState rtc;
+ PCIIDEState ide;
+ UHCIState uhci[2];
+ ViaPMState pm;
+ PCIDevice ac97;
+ PCIDevice mc97;
};
static const VMStateDescription vmstate_via = {
@@ -557,10 +568,23 @@ static const VMStateDescription vmstate_via = {
}
};
+static void via_isa_init(Object *obj)
+{
+ ViaISAState *s = VIA_ISA(obj);
+
+ object_initialize_child(obj, "rtc", &s->rtc, TYPE_MC146818_RTC);
+ object_initialize_child(obj, "ide", &s->ide, TYPE_VIA_IDE);
+ object_initialize_child(obj, "uhci1", &s->uhci[0], TYPE_VT82C686B_USB_UHCI);
+ object_initialize_child(obj, "uhci2", &s->uhci[1], TYPE_VT82C686B_USB_UHCI);
+ object_initialize_child(obj, "ac97", &s->ac97, TYPE_VIA_AC97);
+ object_initialize_child(obj, "mc97", &s->mc97, TYPE_VIA_MC97);
+}
+
static const TypeInfo via_isa_info = {
.name = TYPE_VIA_ISA,
.parent = TYPE_PCI_DEVICE,
.instance_size = sizeof(ViaISAState),
+ .instance_init = via_isa_init,
.abstract = true,
.interfaces = (InterfaceInfo[]) {
{ INTERFACE_CONVENTIONAL_PCI_DEVICE },
@@ -584,24 +608,74 @@ static void via_isa_realize(PCIDevice *d, Error **errp)
{
ViaISAState *s = VIA_ISA(d);
DeviceState *dev = DEVICE(d);
+ PCIBus *pci_bus = pci_get_bus(d);
qemu_irq *isa_irq;
+ ISABus *isa_bus;
int i;
qdev_init_gpio_out(dev, &s->cpu_intr, 1);
isa_irq = qemu_allocate_irqs(via_isa_request_i8259_irq, s, 1);
- s->isa_bus = isa_bus_new(dev, get_system_memory(), pci_address_space_io(d),
- &error_fatal);
- s->isa_irqs = i8259_init(s->isa_bus, *isa_irq);
- isa_bus_irqs(s->isa_bus, s->isa_irqs);
- i8254_pit_init(s->isa_bus, 0x40, 0, NULL);
- i8257_dma_init(s->isa_bus, 0);
- mc146818_rtc_init(s->isa_bus, 2000, NULL);
+ isa_bus = isa_bus_new(dev, pci_address_space(d), pci_address_space_io(d),
+ errp);
+
+ if (!isa_bus) {
+ return;
+ }
+
+ s->isa_irqs = i8259_init(isa_bus, *isa_irq);
+ isa_bus_irqs(isa_bus, s->isa_irqs);
+ i8254_pit_init(isa_bus, 0x40, 0, NULL);
+ i8257_dma_init(isa_bus, 0);
+
+ /* RTC */
+ qdev_prop_set_int32(DEVICE(&s->rtc), "base_year", 2000);
+ if (!qdev_realize(DEVICE(&s->rtc), BUS(isa_bus), errp)) {
+ return;
+ }
+ isa_connect_gpio_out(ISA_DEVICE(&s->rtc), 0, s->rtc.isairq);
for (i = 0; i < PCI_CONFIG_HEADER_SIZE; i++) {
if (i < PCI_COMMAND || i >= PCI_REVISION_ID) {
d->wmask[i] = 0;
}
}
+
+ /* Super I/O */
+ if (!qdev_realize(DEVICE(&s->via_sio), BUS(isa_bus), errp)) {
+ return;
+ }
+
+ /* Function 1: IDE */
+ qdev_prop_set_int32(DEVICE(&s->ide), "addr", d->devfn + 1);
+ if (!qdev_realize(DEVICE(&s->ide), BUS(pci_bus), errp)) {
+ return;
+ }
+
+ /* Functions 2-3: USB Ports */
+ for (i = 0; i < ARRAY_SIZE(s->uhci); i++) {
+ qdev_prop_set_int32(DEVICE(&s->uhci[i]), "addr", d->devfn + 2 + i);
+ if (!qdev_realize(DEVICE(&s->uhci[i]), BUS(pci_bus), errp)) {
+ return;
+ }
+ }
+
+ /* Function 4: Power Management */
+ qdev_prop_set_int32(DEVICE(&s->pm), "addr", d->devfn + 4);
+ if (!qdev_realize(DEVICE(&s->pm), BUS(pci_bus), errp)) {
+ return;
+ }
+
+ /* Function 5: AC97 Audio */
+ qdev_prop_set_int32(DEVICE(&s->ac97), "addr", d->devfn + 5);
+ if (!qdev_realize(DEVICE(&s->ac97), BUS(pci_bus), errp)) {
+ return;
+ }
+
+ /* Function 6: MC97 Modem */
+ qdev_prop_set_int32(DEVICE(&s->mc97), "addr", d->devfn + 6);
+ if (!qdev_realize(DEVICE(&s->mc97), BUS(pci_bus), errp)) {
+ return;
+ }
}
/* TYPE_VT82C686B_ISA */
@@ -615,7 +689,7 @@ static void vt82c686b_write_config(PCIDevice *d, uint32_t addr,
pci_default_write_config(d, addr, val, len);
if (addr == 0x85) {
/* BIT(1): enable or disable superio config io ports */
- via_superio_io_enable(s->via_sio, val & BIT(1));
+ via_superio_io_enable(&s->via_sio, val & BIT(1));
}
}
@@ -639,13 +713,12 @@ static void vt82c686b_isa_reset(DeviceState *dev)
pci_conf[0x77] = 0x10; /* GPIO Control 1/2/3/4 */
}
-static void vt82c686b_realize(PCIDevice *d, Error **errp)
+static void vt82c686b_init(Object *obj)
{
- ViaISAState *s = VIA_ISA(d);
+ ViaISAState *s = VIA_ISA(obj);
- via_isa_realize(d, errp);
- s->via_sio = VIA_SUPERIO(isa_create_simple(s->isa_bus,
- TYPE_VT82C686B_SUPERIO));
+ object_initialize_child(obj, "sio", &s->via_sio, TYPE_VT82C686B_SUPERIO);
+ object_initialize_child(obj, "pm", &s->pm, TYPE_VT82C686B_PM);
}
static void vt82c686b_class_init(ObjectClass *klass, void *data)
@@ -653,7 +726,7 @@ static void vt82c686b_class_init(ObjectClass *klass, void *data)
DeviceClass *dc = DEVICE_CLASS(klass);
PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);
- k->realize = vt82c686b_realize;
+ k->realize = via_isa_realize;
k->config_write = vt82c686b_write_config;
k->vendor_id = PCI_VENDOR_ID_VIA;
k->device_id = PCI_DEVICE_ID_VIA_82C686B_ISA;
@@ -670,6 +743,7 @@ static const TypeInfo vt82c686b_isa_info = {
.name = TYPE_VT82C686B_ISA,
.parent = TYPE_VIA_ISA,
.instance_size = sizeof(ViaISAState),
+ .instance_init = vt82c686b_init,
.class_init = vt82c686b_class_init,
};
@@ -684,7 +758,7 @@ static void vt8231_write_config(PCIDevice *d, uint32_t addr,
pci_default_write_config(d, addr, val, len);
if (addr == 0x50) {
/* BIT(2): enable or disable superio config io ports */
- via_superio_io_enable(s->via_sio, val & BIT(2));
+ via_superio_io_enable(&s->via_sio, val & BIT(2));
}
}
@@ -703,13 +777,12 @@ static void vt8231_isa_reset(DeviceState *dev)
pci_conf[0x6b] = 0x01; /* Fast IR I/O Base */
}
-static void vt8231_realize(PCIDevice *d, Error **errp)
+static void vt8231_init(Object *obj)
{
- ViaISAState *s = VIA_ISA(d);
+ ViaISAState *s = VIA_ISA(obj);
- via_isa_realize(d, errp);
- s->via_sio = VIA_SUPERIO(isa_create_simple(s->isa_bus,
- TYPE_VT8231_SUPERIO));
+ object_initialize_child(obj, "sio", &s->via_sio, TYPE_VT8231_SUPERIO);
+ object_initialize_child(obj, "pm", &s->pm, TYPE_VT8231_PM);
}
static void vt8231_class_init(ObjectClass *klass, void *data)
@@ -717,7 +790,7 @@ static void vt8231_class_init(ObjectClass *klass, void *data)
DeviceClass *dc = DEVICE_CLASS(klass);
PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);
- k->realize = vt8231_realize;
+ k->realize = via_isa_realize;
k->config_write = vt8231_write_config;
k->vendor_id = PCI_VENDOR_ID_VIA;
k->device_id = PCI_DEVICE_ID_VIA_8231_ISA;
@@ -734,6 +807,7 @@ static const TypeInfo vt8231_isa_info = {
.name = TYPE_VT8231_ISA,
.parent = TYPE_VIA_ISA,
.instance_size = sizeof(ViaISAState),
+ .instance_init = vt8231_init,
.class_init = vt8231_class_init,
};
generated by cgit v1.2.3-55-g7522 (git 2.39.0) at 2025-04-27 03:45:12 +0200