diff options
Diffstat (limited to 'hw/serial.c')
| -rw-r--r-- | hw/serial.c | 153 |
1 files changed, 33 insertions, 120 deletions
diff --git a/hw/serial.c b/hw/serial.c index 2e6d2122d0..d35c7a9207 100644 --- a/hw/serial.c +++ b/hw/serial.c @@ -153,11 +153,11 @@ struct SerialState { int poll_msl; struct QEMUTimer *modem_status_poll; + MemoryRegion io; }; typedef struct ISASerialState { ISADevice dev; - MemoryRegion io; uint32_t index; uint32_t iobase; uint32_t isairq; @@ -786,8 +786,8 @@ static int serial_isa_initfn(ISADevice *dev) serial_init_core(s); qdev_set_legacy_instance_id(&dev->qdev, isa->iobase, 3); - memory_region_init_io(&isa->io, &serial_io_ops, s, "serial", 8); - isa_register_ioport(dev, &isa->io, isa->iobase); + memory_region_init_io(&s->io, &serial_io_ops, s, "serial", 8); + isa_register_ioport(dev, &s->io, isa->iobase); return 0; } @@ -821,124 +821,45 @@ SerialState *serial_init(int base, qemu_irq irq, int baudbase, } /* Memory mapped interface */ -static uint32_t serial_mm_readb(void *opaque, target_phys_addr_t addr) -{ - SerialState *s = opaque; - - return serial_ioport_read(s, addr >> s->it_shift) & 0xFF; -} - -static void serial_mm_writeb(void *opaque, target_phys_addr_t addr, - uint32_t value) -{ - SerialState *s = opaque; - - serial_ioport_write(s, addr >> s->it_shift, value & 0xFF); -} - -static uint32_t serial_mm_readw_be(void *opaque, target_phys_addr_t addr) -{ - SerialState *s = opaque; - uint32_t val; - - val = serial_ioport_read(s, addr >> s->it_shift) & 0xFFFF; - val = bswap16(val); - return val; -} - -static uint32_t serial_mm_readw_le(void *opaque, target_phys_addr_t addr) -{ - SerialState *s = opaque; - uint32_t val; - - val = serial_ioport_read(s, addr >> s->it_shift) & 0xFFFF; - return val; -} - -static void serial_mm_writew_be(void *opaque, target_phys_addr_t addr, - uint32_t value) -{ - SerialState *s = opaque; - - value = bswap16(value); - serial_ioport_write(s, addr >> s->it_shift, value & 0xFFFF); -} - -static void serial_mm_writew_le(void *opaque, target_phys_addr_t addr, - uint32_t value) -{ - SerialState *s = opaque; - - serial_ioport_write(s, addr >> s->it_shift, value & 0xFFFF); -} - -static uint32_t serial_mm_readl_be(void *opaque, target_phys_addr_t addr) +static uint64_t serial_mm_read(void *opaque, target_phys_addr_t addr, + unsigned size) { SerialState *s = opaque; - uint32_t val; - - val = serial_ioport_read(s, addr >> s->it_shift); - val = bswap32(val); - return val; + return serial_ioport_read(s, addr >> s->it_shift); } -static uint32_t serial_mm_readl_le(void *opaque, target_phys_addr_t addr) +static void serial_mm_write(void *opaque, target_phys_addr_t addr, + uint64_t value, unsigned size) { SerialState *s = opaque; - uint32_t val; - - val = serial_ioport_read(s, addr >> s->it_shift); - return val; -} - -static void serial_mm_writel_be(void *opaque, target_phys_addr_t addr, - uint32_t value) -{ - SerialState *s = opaque; - - value = bswap32(value); + value &= ~0u >> (32 - (size * 8)); serial_ioport_write(s, addr >> s->it_shift, value); } -static void serial_mm_writel_le(void *opaque, target_phys_addr_t addr, - uint32_t value) -{ - SerialState *s = opaque; - - serial_ioport_write(s, addr >> s->it_shift, value); -} - -static CPUReadMemoryFunc * const serial_mm_read_be[] = { - &serial_mm_readb, - &serial_mm_readw_be, - &serial_mm_readl_be, -}; - -static CPUWriteMemoryFunc * const serial_mm_write_be[] = { - &serial_mm_writeb, - &serial_mm_writew_be, - &serial_mm_writel_be, -}; - -static CPUReadMemoryFunc * const serial_mm_read_le[] = { - &serial_mm_readb, - &serial_mm_readw_le, - &serial_mm_readl_le, -}; - -static CPUWriteMemoryFunc * const serial_mm_write_le[] = { - &serial_mm_writeb, - &serial_mm_writew_le, - &serial_mm_writel_le, +static const MemoryRegionOps serial_mm_ops[3] = { + [DEVICE_NATIVE_ENDIAN] = { + .read = serial_mm_read, + .write = serial_mm_write, + .endianness = DEVICE_NATIVE_ENDIAN, + }, + [DEVICE_LITTLE_ENDIAN] = { + .read = serial_mm_read, + .write = serial_mm_write, + .endianness = DEVICE_LITTLE_ENDIAN, + }, + [DEVICE_BIG_ENDIAN] = { + .read = serial_mm_read, + .write = serial_mm_write, + .endianness = DEVICE_BIG_ENDIAN, + }, }; -SerialState *serial_mm_init (target_phys_addr_t base, int it_shift, - qemu_irq irq, int baudbase, - CharDriverState *chr, int ioregister, - int be) +SerialState *serial_mm_init(MemoryRegion *address_space, + target_phys_addr_t base, int it_shift, + qemu_irq irq, int baudbase, + CharDriverState *chr, enum device_endian end) { SerialState *s; - int s_io_memory; s = g_malloc0(sizeof(SerialState)); @@ -950,18 +871,10 @@ SerialState *serial_mm_init (target_phys_addr_t base, int it_shift, serial_init_core(s); vmstate_register(NULL, base, &vmstate_serial, s); - if (ioregister) { - if (be) { - s_io_memory = cpu_register_io_memory(serial_mm_read_be, - serial_mm_write_be, s, - DEVICE_NATIVE_ENDIAN); - } else { - s_io_memory = cpu_register_io_memory(serial_mm_read_le, - serial_mm_write_le, s, - DEVICE_NATIVE_ENDIAN); - } - cpu_register_physical_memory(base, 8 << it_shift, s_io_memory); - } + memory_region_init_io(&s->io, &serial_mm_ops[end], s, + "serial", 8 << it_shift); + memory_region_add_subregion(address_space, base, &s->io); + serial_update_msl(s); return s; } |