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-rw-r--r--target-lm32/cpu-qom.h42
-rw-r--r--target-lm32/cpu.c1
-rw-r--r--target-lm32/cpu.h46
-rw-r--r--target-lm32/gdbstub.c1
-rw-r--r--target-lm32/helper.c1
-rw-r--r--target-lm32/machine.c3
-rw-r--r--target-lm32/op_helper.c1
-rw-r--r--target-lm32/translate.c1
8 files changed, 51 insertions, 45 deletions
diff --git a/target-lm32/cpu-qom.h b/target-lm32/cpu-qom.h
index 77bc7b2686..b423d2564b 100644
--- a/target-lm32/cpu-qom.h
+++ b/target-lm32/cpu-qom.h
@@ -21,7 +21,6 @@
#define QEMU_LM32_CPU_QOM_H
#include "qom/cpu.h"
-#include "cpu.h"
#define TYPE_LM32_CPU "lm32-cpu"
@@ -48,45 +47,6 @@ typedef struct LM32CPUClass {
void (*parent_reset)(CPUState *cpu);
} LM32CPUClass;
-/**
- * LM32CPU:
- * @env: #CPULM32State
- *
- * A LatticeMico32 CPU.
- */
-typedef struct LM32CPU {
- /*< private >*/
- CPUState parent_obj;
- /*< public >*/
-
- CPULM32State env;
-
- uint32_t revision;
- uint8_t num_interrupts;
- uint8_t num_breakpoints;
- uint8_t num_watchpoints;
- uint32_t features;
-} LM32CPU;
-
-static inline LM32CPU *lm32_env_get_cpu(CPULM32State *env)
-{
- return container_of(env, LM32CPU, env);
-}
-
-#define ENV_GET_CPU(e) CPU(lm32_env_get_cpu(e))
-
-#define ENV_OFFSET offsetof(LM32CPU, env)
-
-#ifndef CONFIG_USER_ONLY
-extern const struct VMStateDescription vmstate_lm32_cpu;
-#endif
-
-void lm32_cpu_do_interrupt(CPUState *cpu);
-bool lm32_cpu_exec_interrupt(CPUState *cs, int int_req);
-void lm32_cpu_dump_state(CPUState *cpu, FILE *f, fprintf_function cpu_fprintf,
- int flags);
-hwaddr lm32_cpu_get_phys_page_debug(CPUState *cpu, vaddr addr);
-int lm32_cpu_gdb_read_register(CPUState *cpu, uint8_t *buf, int reg);
-int lm32_cpu_gdb_write_register(CPUState *cpu, uint8_t *buf, int reg);
+typedef struct LM32CPU LM32CPU;
#endif
diff --git a/target-lm32/cpu.c b/target-lm32/cpu.c
index 6e7e1b8e63..a783d461dd 100644
--- a/target-lm32/cpu.c
+++ b/target-lm32/cpu.c
@@ -22,6 +22,7 @@
#include "qapi/error.h"
#include "cpu.h"
#include "qemu-common.h"
+#include "exec/exec-all.h"
static void lm32_cpu_set_pc(CPUState *cs, vaddr value)
diff --git a/target-lm32/cpu.h b/target-lm32/cpu.h
index 6a0d297b30..62880f7e4b 100644
--- a/target-lm32/cpu.h
+++ b/target-lm32/cpu.h
@@ -25,6 +25,7 @@
#define CPUArchState struct CPULM32State
#include "qemu-common.h"
+#include "cpu-qom.h"
#include "exec/cpu-defs.h"
struct CPULM32State;
typedef struct CPULM32State CPULM32State;
@@ -180,6 +181,47 @@ struct CPULM32State {
};
+/**
+ * LM32CPU:
+ * @env: #CPULM32State
+ *
+ * A LatticeMico32 CPU.
+ */
+struct LM32CPU {
+ /*< private >*/
+ CPUState parent_obj;
+ /*< public >*/
+
+ CPULM32State env;
+
+ uint32_t revision;
+ uint8_t num_interrupts;
+ uint8_t num_breakpoints;
+ uint8_t num_watchpoints;
+ uint32_t features;
+};
+
+static inline LM32CPU *lm32_env_get_cpu(CPULM32State *env)
+{
+ return container_of(env, LM32CPU, env);
+}
+
+#define ENV_GET_CPU(e) CPU(lm32_env_get_cpu(e))
+
+#define ENV_OFFSET offsetof(LM32CPU, env)
+
+#ifndef CONFIG_USER_ONLY
+extern const struct VMStateDescription vmstate_lm32_cpu;
+#endif
+
+void lm32_cpu_do_interrupt(CPUState *cpu);
+bool lm32_cpu_exec_interrupt(CPUState *cs, int int_req);
+void lm32_cpu_dump_state(CPUState *cpu, FILE *f, fprintf_function cpu_fprintf,
+ int flags);
+hwaddr lm32_cpu_get_phys_page_debug(CPUState *cpu, vaddr addr);
+int lm32_cpu_gdb_read_register(CPUState *cpu, uint8_t *buf, int reg);
+int lm32_cpu_gdb_write_register(CPUState *cpu, uint8_t *buf, int reg);
+
typedef enum {
LM32_WP_DISABLED = 0,
LM32_WP_READ,
@@ -193,8 +235,6 @@ static inline lm32_wp_t lm32_wp_type(uint32_t dc, int idx)
return (dc >> (idx+1)*2) & 0x3;
}
-#include "cpu-qom.h"
-
LM32CPU *cpu_lm32_init(const char *cpu_model);
int cpu_lm32_exec(CPUState *cpu);
/* you can call this signal handler from your SIGBUS and SIGSEGV
@@ -233,6 +273,4 @@ static inline void cpu_get_tb_cpu_state(CPULM32State *env, target_ulong *pc,
*flags = 0;
}
-#include "exec/exec-all.h"
-
#endif
diff --git a/target-lm32/gdbstub.c b/target-lm32/gdbstub.c
index 8ac1288bb6..cf929dd392 100644
--- a/target-lm32/gdbstub.c
+++ b/target-lm32/gdbstub.c
@@ -19,6 +19,7 @@
*/
#include "qemu/osdep.h"
#include "qemu-common.h"
+#include "cpu.h"
#include "exec/gdbstub.h"
#include "hw/lm32/lm32_pic.h"
diff --git a/target-lm32/helper.c b/target-lm32/helper.c
index 655248f81a..b8f4ed9960 100644
--- a/target-lm32/helper.c
+++ b/target-lm32/helper.c
@@ -19,6 +19,7 @@
#include "qemu/osdep.h"
#include "cpu.h"
+#include "exec/exec-all.h"
#include "qemu/host-utils.h"
#include "sysemu/sysemu.h"
#include "exec/semihost.h"
diff --git a/target-lm32/machine.c b/target-lm32/machine.c
index 91c943d193..3c258a4bcc 100644
--- a/target-lm32/machine.c
+++ b/target-lm32/machine.c
@@ -1,6 +1,9 @@
#include "qemu/osdep.h"
+#include "qemu-common.h"
+#include "cpu.h"
#include "hw/hw.h"
#include "hw/boards.h"
+#include "migration/cpu.h"
static const VMStateDescription vmstate_env = {
.name = "env",
diff --git a/target-lm32/op_helper.c b/target-lm32/op_helper.c
index b6759e0225..7a550d1c0c 100644
--- a/target-lm32/op_helper.c
+++ b/target-lm32/op_helper.c
@@ -6,6 +6,7 @@
#include "hw/lm32/lm32_pic.h"
#include "hw/char/lm32_juart.h"
+#include "exec/exec-all.h"
#include "exec/cpu_ldst.h"
#ifndef CONFIG_USER_ONLY
diff --git a/target-lm32/translate.c b/target-lm32/translate.c
index dd972f5b8c..d09d81447b 100644
--- a/target-lm32/translate.c
+++ b/target-lm32/translate.c
@@ -21,6 +21,7 @@
#include "cpu.h"
#include "disas/disas.h"
#include "exec/helper-proto.h"
+#include "exec/exec-all.h"
#include "tcg-op.h"
#include "exec/cpu_ldst.h"