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-rw-r--r--target-ppc/cpu-qom.h167
-rw-r--r--target-ppc/cpu.h167
-rw-r--r--target-ppc/excp_helper.c1
-rw-r--r--target-ppc/gdbstub.c1
-rw-r--r--target-ppc/int_helper.c1
-rw-r--r--target-ppc/kvm-stub.c1
-rw-r--r--target-ppc/kvm.c2
-rw-r--r--target-ppc/machine.c5
-rw-r--r--target-ppc/mem_helper.c2
-rw-r--r--target-ppc/misc_helper.c1
-rw-r--r--target-ppc/mmu-hash32.c3
-rw-r--r--target-ppc/mmu-hash32.h2
-rw-r--r--target-ppc/mmu-hash64.c3
-rw-r--r--target-ppc/mmu-hash64.h2
-rw-r--r--target-ppc/mmu_helper.c1
-rw-r--r--target-ppc/timebase_helper.c1
-rw-r--r--target-ppc/translate.c1
-rw-r--r--target-ppc/translate_init.c92
18 files changed, 222 insertions, 231 deletions
diff --git a/target-ppc/cpu-qom.h b/target-ppc/cpu-qom.h
index 7d5e2b36a9..07358aadf3 100644
--- a/target-ppc/cpu-qom.h
+++ b/target-ppc/cpu-qom.h
@@ -21,7 +21,6 @@
#define QEMU_PPC_CPU_QOM_H
#include "qom/cpu.h"
-#include "cpu.h"
#ifdef TARGET_PPC64
#define TYPE_POWERPC_CPU "powerpc64-cpu"
@@ -39,6 +38,115 @@
OBJECT_GET_CLASS(PowerPCCPUClass, (obj), TYPE_POWERPC_CPU)
typedef struct PowerPCCPU PowerPCCPU;
+typedef struct CPUPPCState CPUPPCState;
+typedef struct ppc_tb_t ppc_tb_t;
+typedef struct ppc_dcr_t ppc_dcr_t;
+
+/*****************************************************************************/
+/* MMU model */
+typedef enum powerpc_mmu_t powerpc_mmu_t;
+enum powerpc_mmu_t {
+ POWERPC_MMU_UNKNOWN = 0x00000000,
+ /* Standard 32 bits PowerPC MMU */
+ POWERPC_MMU_32B = 0x00000001,
+ /* PowerPC 6xx MMU with software TLB */
+ POWERPC_MMU_SOFT_6xx = 0x00000002,
+ /* PowerPC 74xx MMU with software TLB */
+ POWERPC_MMU_SOFT_74xx = 0x00000003,
+ /* PowerPC 4xx MMU with software TLB */
+ POWERPC_MMU_SOFT_4xx = 0x00000004,
+ /* PowerPC 4xx MMU with software TLB and zones protections */
+ POWERPC_MMU_SOFT_4xx_Z = 0x00000005,
+ /* PowerPC MMU in real mode only */
+ POWERPC_MMU_REAL = 0x00000006,
+ /* Freescale MPC8xx MMU model */
+ POWERPC_MMU_MPC8xx = 0x00000007,
+ /* BookE MMU model */
+ POWERPC_MMU_BOOKE = 0x00000008,
+ /* BookE 2.06 MMU model */
+ POWERPC_MMU_BOOKE206 = 0x00000009,
+ /* PowerPC 601 MMU model (specific BATs format) */
+ POWERPC_MMU_601 = 0x0000000A,
+#define POWERPC_MMU_64 0x00010000
+#define POWERPC_MMU_1TSEG 0x00020000
+#define POWERPC_MMU_AMR 0x00040000
+ /* 64 bits PowerPC MMU */
+ POWERPC_MMU_64B = POWERPC_MMU_64 | 0x00000001,
+ /* Architecture 2.03 and later (has LPCR) */
+ POWERPC_MMU_2_03 = POWERPC_MMU_64 | 0x00000002,
+ /* Architecture 2.06 variant */
+ POWERPC_MMU_2_06 = POWERPC_MMU_64 | POWERPC_MMU_1TSEG
+ | POWERPC_MMU_AMR | 0x00000003,
+ /* Architecture 2.06 "degraded" (no 1T segments) */
+ POWERPC_MMU_2_06a = POWERPC_MMU_64 | POWERPC_MMU_AMR
+ | 0x00000003,
+ /* Architecture 2.07 variant */
+ POWERPC_MMU_2_07 = POWERPC_MMU_64 | POWERPC_MMU_1TSEG
+ | POWERPC_MMU_AMR | 0x00000004,
+ /* Architecture 2.07 "degraded" (no 1T segments) */
+ POWERPC_MMU_2_07a = POWERPC_MMU_64 | POWERPC_MMU_AMR
+ | 0x00000004,
+};
+
+/*****************************************************************************/
+/* Exception model */
+typedef enum powerpc_excp_t powerpc_excp_t;
+enum powerpc_excp_t {
+ POWERPC_EXCP_UNKNOWN = 0,
+ /* Standard PowerPC exception model */
+ POWERPC_EXCP_STD,
+ /* PowerPC 40x exception model */
+ POWERPC_EXCP_40x,
+ /* PowerPC 601 exception model */
+ POWERPC_EXCP_601,
+ /* PowerPC 602 exception model */
+ POWERPC_EXCP_602,
+ /* PowerPC 603 exception model */
+ POWERPC_EXCP_603,
+ /* PowerPC 603e exception model */
+ POWERPC_EXCP_603E,
+ /* PowerPC G2 exception model */
+ POWERPC_EXCP_G2,
+ /* PowerPC 604 exception model */
+ POWERPC_EXCP_604,
+ /* PowerPC 7x0 exception model */
+ POWERPC_EXCP_7x0,
+ /* PowerPC 7x5 exception model */
+ POWERPC_EXCP_7x5,
+ /* PowerPC 74xx exception model */
+ POWERPC_EXCP_74xx,
+ /* BookE exception model */
+ POWERPC_EXCP_BOOKE,
+ /* PowerPC 970 exception model */
+ POWERPC_EXCP_970,
+ /* POWER7 exception model */
+ POWERPC_EXCP_POWER7,
+ /* POWER8 exception model */
+ POWERPC_EXCP_POWER8,
+};
+
+/*****************************************************************************/
+/* Input pins model */
+typedef enum powerpc_input_t powerpc_input_t;
+enum powerpc_input_t {
+ PPC_FLAGS_INPUT_UNKNOWN = 0,
+ /* PowerPC 6xx bus */
+ PPC_FLAGS_INPUT_6xx,
+ /* BookE bus */
+ PPC_FLAGS_INPUT_BookE,
+ /* PowerPC 405 bus */
+ PPC_FLAGS_INPUT_405,
+ /* PowerPC 970 bus */
+ PPC_FLAGS_INPUT_970,
+ /* PowerPC POWER7 bus */
+ PPC_FLAGS_INPUT_POWER7,
+ /* PowerPC 401 bus */
+ PPC_FLAGS_INPUT_401,
+ /* Freescale RCPU bus */
+ PPC_FLAGS_INPUT_RCPU,
+};
+
+struct ppc_segment_page_sizes;
/**
* PowerPCCPUClass:
@@ -68,69 +176,14 @@ typedef struct PowerPCCPUClass {
uint32_t flags;
int bfd_mach;
uint32_t l1_dcache_size, l1_icache_size;
-#if defined(TARGET_PPC64)
const struct ppc_segment_page_sizes *sps;
-#endif
void (*init_proc)(CPUPPCState *env);
int (*check_pow)(CPUPPCState *env);
-#if defined(CONFIG_SOFTMMU)
- int (*handle_mmu_fault)(PowerPCCPU *cpu, target_ulong eaddr, int rwx,
- int mmu_idx);
-#endif
+ int (*handle_mmu_fault)(PowerPCCPU *cpu, vaddr eaddr, int rwx, int mmu_idx);
bool (*interrupts_big_endian)(PowerPCCPU *cpu);
} PowerPCCPUClass;
-/**
- * PowerPCCPU:
- * @env: #CPUPPCState
- * @cpu_dt_id: CPU index used in the device tree. KVM uses this index too
- * @max_compat: Maximal supported logical PVR from the command line
- * @cpu_version: Current logical PVR, zero if in "raw" mode
- *
- * A PowerPC CPU.
- */
-struct PowerPCCPU {
- /*< private >*/
- CPUState parent_obj;
- /*< public >*/
-
- CPUPPCState env;
- int cpu_dt_id;
- uint32_t max_compat;
- uint32_t cpu_version;
-};
-
-static inline PowerPCCPU *ppc_env_get_cpu(CPUPPCState *env)
-{
- return container_of(env, PowerPCCPU, env);
-}
-
-#define ENV_GET_CPU(e) CPU(ppc_env_get_cpu(e))
-
-#define ENV_OFFSET offsetof(PowerPCCPU, env)
-
-PowerPCCPUClass *ppc_cpu_class_by_pvr(uint32_t pvr);
-PowerPCCPUClass *ppc_cpu_class_by_pvr_mask(uint32_t pvr);
-
-void ppc_cpu_do_interrupt(CPUState *cpu);
-bool ppc_cpu_exec_interrupt(CPUState *cpu, int int_req);
-void ppc_cpu_dump_state(CPUState *cpu, FILE *f, fprintf_function cpu_fprintf,
- int flags);
-void ppc_cpu_dump_statistics(CPUState *cpu, FILE *f,
- fprintf_function cpu_fprintf, int flags);
-int ppc_cpu_get_monitor_def(CPUState *cs, const char *name,
- uint64_t *pval);
-hwaddr ppc_cpu_get_phys_page_debug(CPUState *cpu, vaddr addr);
-int ppc_cpu_gdb_read_register(CPUState *cpu, uint8_t *buf, int reg);
-int ppc_cpu_gdb_read_register_apple(CPUState *cpu, uint8_t *buf, int reg);
-int ppc_cpu_gdb_write_register(CPUState *cpu, uint8_t *buf, int reg);
-int ppc_cpu_gdb_write_register_apple(CPUState *cpu, uint8_t *buf, int reg);
-int ppc64_cpu_write_elf64_note(WriteCoreDumpFunction f, CPUState *cs,
- int cpuid, void *opaque);
#ifndef CONFIG_USER_ONLY
-void ppc_cpu_do_system_reset(CPUState *cs);
-extern const struct VMStateDescription vmstate_ppc_cpu;
-
typedef struct PPCTimebase {
uint64_t guest_timebase;
int64_t time_of_the_day_ns;
diff --git a/target-ppc/cpu.h b/target-ppc/cpu.h
index 508f03b74d..cd33539d1c 100644
--- a/target-ppc/cpu.h
+++ b/target-ppc/cpu.h
@@ -76,7 +76,7 @@
#define CPUArchState struct CPUPPCState
#include "exec/cpu-defs.h"
-
+#include "cpu-qom.h"
#include "fpu/softfloat.h"
#if defined (TARGET_PPC64)
@@ -86,93 +86,6 @@
#endif
/*****************************************************************************/
-/* MMU model */
-typedef enum powerpc_mmu_t powerpc_mmu_t;
-enum powerpc_mmu_t {
- POWERPC_MMU_UNKNOWN = 0x00000000,
- /* Standard 32 bits PowerPC MMU */
- POWERPC_MMU_32B = 0x00000001,
- /* PowerPC 6xx MMU with software TLB */
- POWERPC_MMU_SOFT_6xx = 0x00000002,
- /* PowerPC 74xx MMU with software TLB */
- POWERPC_MMU_SOFT_74xx = 0x00000003,
- /* PowerPC 4xx MMU with software TLB */
- POWERPC_MMU_SOFT_4xx = 0x00000004,
- /* PowerPC 4xx MMU with software TLB and zones protections */
- POWERPC_MMU_SOFT_4xx_Z = 0x00000005,
- /* PowerPC MMU in real mode only */
- POWERPC_MMU_REAL = 0x00000006,
- /* Freescale MPC8xx MMU model */
- POWERPC_MMU_MPC8xx = 0x00000007,
- /* BookE MMU model */
- POWERPC_MMU_BOOKE = 0x00000008,
- /* BookE 2.06 MMU model */
- POWERPC_MMU_BOOKE206 = 0x00000009,
- /* PowerPC 601 MMU model (specific BATs format) */
- POWERPC_MMU_601 = 0x0000000A,
-#if defined(TARGET_PPC64)
-#define POWERPC_MMU_64 0x00010000
-#define POWERPC_MMU_1TSEG 0x00020000
-#define POWERPC_MMU_AMR 0x00040000
- /* 64 bits PowerPC MMU */
- POWERPC_MMU_64B = POWERPC_MMU_64 | 0x00000001,
- /* Architecture 2.03 and later (has LPCR) */
- POWERPC_MMU_2_03 = POWERPC_MMU_64 | 0x00000002,
- /* Architecture 2.06 variant */
- POWERPC_MMU_2_06 = POWERPC_MMU_64 | POWERPC_MMU_1TSEG
- | POWERPC_MMU_AMR | 0x00000003,
- /* Architecture 2.06 "degraded" (no 1T segments) */
- POWERPC_MMU_2_06a = POWERPC_MMU_64 | POWERPC_MMU_AMR
- | 0x00000003,
- /* Architecture 2.07 variant */
- POWERPC_MMU_2_07 = POWERPC_MMU_64 | POWERPC_MMU_1TSEG
- | POWERPC_MMU_AMR | 0x00000004,
- /* Architecture 2.07 "degraded" (no 1T segments) */
- POWERPC_MMU_2_07a = POWERPC_MMU_64 | POWERPC_MMU_AMR
- | 0x00000004,
-#endif /* defined(TARGET_PPC64) */
-};
-
-/*****************************************************************************/
-/* Exception model */
-typedef enum powerpc_excp_t powerpc_excp_t;
-enum powerpc_excp_t {
- POWERPC_EXCP_UNKNOWN = 0,
- /* Standard PowerPC exception model */
- POWERPC_EXCP_STD,
- /* PowerPC 40x exception model */
- POWERPC_EXCP_40x,
- /* PowerPC 601 exception model */
- POWERPC_EXCP_601,
- /* PowerPC 602 exception model */
- POWERPC_EXCP_602,
- /* PowerPC 603 exception model */
- POWERPC_EXCP_603,
- /* PowerPC 603e exception model */
- POWERPC_EXCP_603E,
- /* PowerPC G2 exception model */
- POWERPC_EXCP_G2,
- /* PowerPC 604 exception model */
- POWERPC_EXCP_604,
- /* PowerPC 7x0 exception model */
- POWERPC_EXCP_7x0,
- /* PowerPC 7x5 exception model */
- POWERPC_EXCP_7x5,
- /* PowerPC 74xx exception model */
- POWERPC_EXCP_74xx,
- /* BookE exception model */
- POWERPC_EXCP_BOOKE,
-#if defined(TARGET_PPC64)
- /* PowerPC 970 exception model */
- POWERPC_EXCP_970,
- /* POWER7 exception model */
- POWERPC_EXCP_POWER7,
- /* POWER8 exception model */
- POWERPC_EXCP_POWER8,
-#endif /* defined(TARGET_PPC64) */
-};
-
-/*****************************************************************************/
/* Exception vectors definitions */
enum {
POWERPC_EXCP_NONE = -1,
@@ -297,27 +210,6 @@ enum {
POWERPC_EXCP_TRAP = 0x40,
};
-/*****************************************************************************/
-/* Input pins model */
-typedef enum powerpc_input_t powerpc_input_t;
-enum powerpc_input_t {
- PPC_FLAGS_INPUT_UNKNOWN = 0,
- /* PowerPC 6xx bus */
- PPC_FLAGS_INPUT_6xx,
- /* BookE bus */
- PPC_FLAGS_INPUT_BookE,
- /* PowerPC 405 bus */
- PPC_FLAGS_INPUT_405,
- /* PowerPC 970 bus */
- PPC_FLAGS_INPUT_970,
- /* PowerPC POWER7 bus */
- PPC_FLAGS_INPUT_POWER7,
- /* PowerPC 401 bus */
- PPC_FLAGS_INPUT_401,
- /* Freescale RCPU bus */
- PPC_FLAGS_INPUT_RCPU,
-};
-
#define PPC_INPUT(env) (env->bus_model)
/*****************************************************************************/
@@ -325,11 +217,8 @@ typedef struct opc_handler_t opc_handler_t;
/*****************************************************************************/
/* Types used to describe some PowerPC registers */
-typedef struct CPUPPCState CPUPPCState;
typedef struct DisasContext DisasContext;
-typedef struct ppc_tb_t ppc_tb_t;
typedef struct ppc_spr_t ppc_spr_t;
-typedef struct ppc_dcr_t ppc_dcr_t;
typedef union ppc_avr_t ppc_avr_t;
typedef union ppc_tlb_t ppc_tlb_t;
@@ -1215,7 +1104,57 @@ do { \
env->wdt_period[3] = (d_); \
} while (0)
-#include "cpu-qom.h"
+/**
+ * PowerPCCPU:
+ * @env: #CPUPPCState
+ * @cpu_dt_id: CPU index used in the device tree. KVM uses this index too
+ * @max_compat: Maximal supported logical PVR from the command line
+ * @cpu_version: Current logical PVR, zero if in "raw" mode
+ *
+ * A PowerPC CPU.
+ */
+struct PowerPCCPU {
+ /*< private >*/
+ CPUState parent_obj;
+ /*< public >*/
+
+ CPUPPCState env;
+ int cpu_dt_id;
+ uint32_t max_compat;
+ uint32_t cpu_version;
+};
+
+static inline PowerPCCPU *ppc_env_get_cpu(CPUPPCState *env)
+{
+ return container_of(env, PowerPCCPU, env);
+}
+
+#define ENV_GET_CPU(e) CPU(ppc_env_get_cpu(e))
+
+#define ENV_OFFSET offsetof(PowerPCCPU, env)
+
+PowerPCCPUClass *ppc_cpu_class_by_pvr(uint32_t pvr);
+PowerPCCPUClass *ppc_cpu_class_by_pvr_mask(uint32_t pvr);
+
+void ppc_cpu_do_interrupt(CPUState *cpu);
+bool ppc_cpu_exec_interrupt(CPUState *cpu, int int_req);
+void ppc_cpu_dump_state(CPUState *cpu, FILE *f, fprintf_function cpu_fprintf,
+ int flags);
+void ppc_cpu_dump_statistics(CPUState *cpu, FILE *f,
+ fprintf_function cpu_fprintf, int flags);
+int ppc_cpu_get_monitor_def(CPUState *cs, const char *name,
+ uint64_t *pval);
+hwaddr ppc_cpu_get_phys_page_debug(CPUState *cpu, vaddr addr);
+int ppc_cpu_gdb_read_register(CPUState *cpu, uint8_t *buf, int reg);
+int ppc_cpu_gdb_read_register_apple(CPUState *cpu, uint8_t *buf, int reg);
+int ppc_cpu_gdb_write_register(CPUState *cpu, uint8_t *buf, int reg);
+int ppc_cpu_gdb_write_register_apple(CPUState *cpu, uint8_t *buf, int reg);
+int ppc64_cpu_write_elf64_note(WriteCoreDumpFunction f, CPUState *cs,
+ int cpuid, void *opaque);
+#ifndef CONFIG_USER_ONLY
+void ppc_cpu_do_system_reset(CPUState *cs);
+extern const struct VMStateDescription vmstate_ppc_cpu;
+#endif
/*****************************************************************************/
PowerPCCPU *cpu_ppc_init(const char *cpu_model);
@@ -2427,8 +2366,6 @@ static inline bool lsw_reg_in_range(int start, int nregs, int rx)
extern void (*cpu_ppc_hypercall)(PowerPCCPU *);
-#include "exec/exec-all.h"
-
void dump_mmu(FILE *f, fprintf_function cpu_fprintf, CPUPPCState *env);
/**
diff --git a/target-ppc/excp_helper.c b/target-ppc/excp_helper.c
index ca4ffe8ad6..288903ee1d 100644
--- a/target-ppc/excp_helper.c
+++ b/target-ppc/excp_helper.c
@@ -19,6 +19,7 @@
#include "qemu/osdep.h"
#include "cpu.h"
#include "exec/helper-proto.h"
+#include "exec/exec-all.h"
#include "exec/cpu_ldst.h"
#include "helper_regs.h"
diff --git a/target-ppc/gdbstub.c b/target-ppc/gdbstub.c
index 569c380cfa..7a338136a8 100644
--- a/target-ppc/gdbstub.c
+++ b/target-ppc/gdbstub.c
@@ -19,6 +19,7 @@
*/
#include "qemu/osdep.h"
#include "qemu-common.h"
+#include "cpu.h"
#include "exec/gdbstub.h"
static int ppc_gdb_register_len_apple(int n)
diff --git a/target-ppc/int_helper.c b/target-ppc/int_helper.c
index 27b0258d31..74453763d6 100644
--- a/target-ppc/int_helper.c
+++ b/target-ppc/int_helper.c
@@ -18,6 +18,7 @@
*/
#include "qemu/osdep.h"
#include "cpu.h"
+#include "exec/exec-all.h"
#include "qemu/host-utils.h"
#include "exec/helper-proto.h"
#include "crypto/aes.h"
diff --git a/target-ppc/kvm-stub.c b/target-ppc/kvm-stub.c
index 627bcb4322..efeafca1df 100644
--- a/target-ppc/kvm-stub.c
+++ b/target-ppc/kvm-stub.c
@@ -11,6 +11,7 @@
*/
#include "qemu/osdep.h"
#include "qemu-common.h"
+#include "cpu.h"
#include "hw/ppc/openpic.h"
int kvm_openpic_connect_vcpu(DeviceState *d, CPUState *cs)
diff --git a/target-ppc/kvm.c b/target-ppc/kvm.c
index c4c81467e4..24d6032007 100644
--- a/target-ppc/kvm.c
+++ b/target-ppc/kvm.c
@@ -24,11 +24,11 @@
#include "qemu-common.h"
#include "qemu/error-report.h"
+#include "cpu.h"
#include "qemu/timer.h"
#include "sysemu/sysemu.h"
#include "sysemu/kvm.h"
#include "kvm_ppc.h"
-#include "cpu.h"
#include "sysemu/cpus.h"
#include "sysemu/device_tree.h"
#include "mmu-hash64.h"
diff --git a/target-ppc/machine.c b/target-ppc/machine.c
index 46684fb933..f6c7256974 100644
--- a/target-ppc/machine.c
+++ b/target-ppc/machine.c
@@ -1,9 +1,14 @@
#include "qemu/osdep.h"
+#include "qemu-common.h"
+#include "cpu.h"
+#include "exec/exec-all.h"
#include "hw/hw.h"
#include "hw/boards.h"
#include "sysemu/kvm.h"
#include "helper_regs.h"
#include "mmu-hash64.h"
+#include "migration/cpu.h"
+#include "exec/exec-all.h"
static int cpu_load_old(QEMUFile *f, void *opaque, int version_id)
{
diff --git a/target-ppc/mem_helper.c b/target-ppc/mem_helper.c
index 6d584c9126..e4de86bc5e 100644
--- a/target-ppc/mem_helper.c
+++ b/target-ppc/mem_helper.c
@@ -18,10 +18,12 @@
*/
#include "qemu/osdep.h"
#include "cpu.h"
+#include "exec/exec-all.h"
#include "qemu/host-utils.h"
#include "exec/helper-proto.h"
#include "helper_regs.h"
+#include "exec/exec-all.h"
#include "exec/cpu_ldst.h"
//#define DEBUG_OP
diff --git a/target-ppc/misc_helper.c b/target-ppc/misc_helper.c
index 73e3b05833..7d41b017c8 100644
--- a/target-ppc/misc_helper.c
+++ b/target-ppc/misc_helper.c
@@ -18,6 +18,7 @@
*/
#include "qemu/osdep.h"
#include "cpu.h"
+#include "exec/exec-all.h"
#include "exec/helper-proto.h"
#include "helper_regs.h"
diff --git a/target-ppc/mmu-hash32.c b/target-ppc/mmu-hash32.c
index 39abb2fd39..29bace622a 100644
--- a/target-ppc/mmu-hash32.c
+++ b/target-ppc/mmu-hash32.c
@@ -20,6 +20,7 @@
#include "qemu/osdep.h"
#include "cpu.h"
+#include "exec/exec-all.h"
#include "exec/helper-proto.h"
#include "sysemu/kvm.h"
#include "kvm_ppc.h"
@@ -383,7 +384,7 @@ static hwaddr ppc_hash32_pte_raddr(target_ulong sr, ppc_hash_pte32_t pte,
return (rpn & ~mask) | (eaddr & mask);
}
-int ppc_hash32_handle_mmu_fault(PowerPCCPU *cpu, target_ulong eaddr, int rwx,
+int ppc_hash32_handle_mmu_fault(PowerPCCPU *cpu, vaddr eaddr, int rwx,
int mmu_idx)
{
CPUState *cs = CPU(cpu);
diff --git a/target-ppc/mmu-hash32.h b/target-ppc/mmu-hash32.h
index afbb9dd3d1..aaceacd4d7 100644
--- a/target-ppc/mmu-hash32.h
+++ b/target-ppc/mmu-hash32.h
@@ -5,7 +5,7 @@
hwaddr get_pteg_offset32(PowerPCCPU *cpu, hwaddr hash);
hwaddr ppc_hash32_get_phys_page_debug(PowerPCCPU *cpu, target_ulong addr);
-int ppc_hash32_handle_mmu_fault(PowerPCCPU *cpu, target_ulong address, int rw,
+int ppc_hash32_handle_mmu_fault(PowerPCCPU *cpu, vaddr address, int rw,
int mmu_idx);
/*
diff --git a/target-ppc/mmu-hash64.c b/target-ppc/mmu-hash64.c
index 72c4ab5d75..04e6932fa0 100644
--- a/target-ppc/mmu-hash64.c
+++ b/target-ppc/mmu-hash64.c
@@ -20,6 +20,7 @@
#include "qemu/osdep.h"
#include "qapi/error.h"
#include "cpu.h"
+#include "exec/exec-all.h"
#include "exec/helper-proto.h"
#include "qemu/error-report.h"
#include "sysemu/kvm.h"
@@ -589,7 +590,7 @@ unsigned ppc_hash64_hpte_page_shift_noslb(PowerPCCPU *cpu,
return 0;
}
-int ppc_hash64_handle_mmu_fault(PowerPCCPU *cpu, target_ulong eaddr,
+int ppc_hash64_handle_mmu_fault(PowerPCCPU *cpu, vaddr eaddr,
int rwx, int mmu_idx)
{
CPUState *cs = CPU(cpu);
diff --git a/target-ppc/mmu-hash64.h b/target-ppc/mmu-hash64.h
index 9bf8b9b267..6423b9f791 100644
--- a/target-ppc/mmu-hash64.h
+++ b/target-ppc/mmu-hash64.h
@@ -9,7 +9,7 @@ void dump_slb(FILE *f, fprintf_function cpu_fprintf, PowerPCCPU *cpu);
int ppc_store_slb(PowerPCCPU *cpu, target_ulong slot,
target_ulong esid, target_ulong vsid);
hwaddr ppc_hash64_get_phys_page_debug(PowerPCCPU *cpu, target_ulong addr);
-int ppc_hash64_handle_mmu_fault(PowerPCCPU *cpu, target_ulong address, int rw,
+int ppc_hash64_handle_mmu_fault(PowerPCCPU *cpu, vaddr address, int rw,
int mmu_idx);
void ppc_hash64_store_hpte(PowerPCCPU *cpu, target_ulong index,
target_ulong pte0, target_ulong pte1);
diff --git a/target-ppc/mmu_helper.c b/target-ppc/mmu_helper.c
index ff217941b5..2e0e3ca92c 100644
--- a/target-ppc/mmu_helper.c
+++ b/target-ppc/mmu_helper.c
@@ -24,6 +24,7 @@
#include "kvm_ppc.h"
#include "mmu-hash64.h"
#include "mmu-hash32.h"
+#include "exec/exec-all.h"
#include "exec/cpu_ldst.h"
#include "exec/log.h"
diff --git a/target-ppc/timebase_helper.c b/target-ppc/timebase_helper.c
index 3b340d70d1..66de3137e4 100644
--- a/target-ppc/timebase_helper.c
+++ b/target-ppc/timebase_helper.c
@@ -19,6 +19,7 @@
#include "qemu/osdep.h"
#include "cpu.h"
#include "exec/helper-proto.h"
+#include "qemu/log.h"
/*****************************************************************************/
/* SPR accesses */
diff --git a/target-ppc/translate.c b/target-ppc/translate.c
index d485d7c7cb..745f4de98f 100644
--- a/target-ppc/translate.c
+++ b/target-ppc/translate.c
@@ -21,6 +21,7 @@
#include "qemu/osdep.h"
#include "cpu.h"
#include "disas/disas.h"
+#include "exec/exec-all.h"
#include "tcg-op.h"
#include "qemu/host-utils.h"
#include "exec/cpu_ldst.h"
diff --git a/target-ppc/translate_init.c b/target-ppc/translate_init.c
index f51572552b..954195f5e4 100644
--- a/target-ppc/translate_init.c
+++ b/target-ppc/translate_init.c
@@ -31,29 +31,13 @@
#include "qemu/error-report.h"
#include "qapi/visitor.h"
#include "hw/qdev-properties.h"
+#include "hw/ppc/ppc.h"
//#define PPC_DUMP_CPU
//#define PPC_DEBUG_SPR
//#define PPC_DUMP_SPR_ACCESSES
/* #define USE_APPLE_GDB */
-/* For user-mode emulation, we don't emulate any IRQ controller */
-#if defined(CONFIG_USER_ONLY)
-#define PPC_IRQ_INIT_FN(name) \
-static inline void glue(glue(ppc, name),_irq_init) (CPUPPCState *env) \
-{ \
-}
-#else
-#define PPC_IRQ_INIT_FN(name) \
-void glue(glue(ppc, name),_irq_init) (CPUPPCState *env);
-#endif
-
-PPC_IRQ_INIT_FN(40x);
-PPC_IRQ_INIT_FN(6xx);
-PPC_IRQ_INIT_FN(970);
-PPC_IRQ_INIT_FN(POWER7);
-PPC_IRQ_INIT_FN(e500);
-
/* Generic callbacks:
* do nothing but store/retrieve spr value
*/
@@ -3275,7 +3259,7 @@ static void init_proc_401 (CPUPPCState *env)
env->dcache_line_size = 32;
env->icache_line_size = 32;
/* Allocate hardware IRQ controller */
- ppc40x_irq_init(env);
+ ppc40x_irq_init(ppc_env_get_cpu(env));
SET_FIT_PERIOD(12, 16, 20, 24);
SET_WDT_PERIOD(16, 20, 24, 28);
@@ -3329,7 +3313,7 @@ static void init_proc_401x2 (CPUPPCState *env)
env->dcache_line_size = 32;
env->icache_line_size = 32;
/* Allocate hardware IRQ controller */
- ppc40x_irq_init(env);
+ ppc40x_irq_init(ppc_env_get_cpu(env));
SET_FIT_PERIOD(12, 16, 20, 24);
SET_WDT_PERIOD(16, 20, 24, 28);
@@ -3381,7 +3365,7 @@ static void init_proc_401x3 (CPUPPCState *env)
env->dcache_line_size = 32;
env->icache_line_size = 32;
/* Allocate hardware IRQ controller */
- ppc40x_irq_init(env);
+ ppc40x_irq_init(ppc_env_get_cpu(env));
SET_FIT_PERIOD(12, 16, 20, 24);
SET_WDT_PERIOD(16, 20, 24, 28);
@@ -3440,7 +3424,7 @@ static void init_proc_IOP480 (CPUPPCState *env)
env->dcache_line_size = 32;
env->icache_line_size = 32;
/* Allocate hardware IRQ controller */
- ppc40x_irq_init(env);
+ ppc40x_irq_init(ppc_env_get_cpu(env));
SET_FIT_PERIOD(8, 12, 16, 20);
SET_WDT_PERIOD(16, 20, 24, 28);
@@ -3491,7 +3475,7 @@ static void init_proc_403 (CPUPPCState *env)
env->dcache_line_size = 32;
env->icache_line_size = 32;
/* Allocate hardware IRQ controller */
- ppc40x_irq_init(env);
+ ppc40x_irq_init(ppc_env_get_cpu(env));
SET_FIT_PERIOD(8, 12, 16, 20);
SET_WDT_PERIOD(16, 20, 24, 28);
@@ -3557,7 +3541,7 @@ static void init_proc_403GCX (CPUPPCState *env)
env->dcache_line_size = 32;
env->icache_line_size = 32;
/* Allocate hardware IRQ controller */
- ppc40x_irq_init(env);
+ ppc40x_irq_init(ppc_env_get_cpu(env));
SET_FIT_PERIOD(8, 12, 16, 20);
SET_WDT_PERIOD(16, 20, 24, 28);
@@ -3623,7 +3607,7 @@ static void init_proc_405 (CPUPPCState *env)
env->dcache_line_size = 32;
env->icache_line_size = 32;
/* Allocate hardware IRQ controller */
- ppc40x_irq_init(env);
+ ppc40x_irq_init(ppc_env_get_cpu(env));
SET_FIT_PERIOD(8, 12, 16, 20);
SET_WDT_PERIOD(16, 20, 24, 28);
@@ -3721,7 +3705,7 @@ static void init_proc_440EP (CPUPPCState *env)
init_excp_BookE(env);
env->dcache_line_size = 32;
env->icache_line_size = 32;
- ppc40x_irq_init(env);
+ ppc40x_irq_init(ppc_env_get_cpu(env));
SET_FIT_PERIOD(12, 16, 20, 24);
SET_WDT_PERIOD(20, 24, 28, 32);
@@ -3991,7 +3975,7 @@ static void init_proc_440x5 (CPUPPCState *env)
init_excp_BookE(env);
env->dcache_line_size = 32;
env->icache_line_size = 32;
- ppc40x_irq_init(env);
+ ppc40x_irq_init(ppc_env_get_cpu(env));
SET_FIT_PERIOD(12, 16, 20, 24);
SET_WDT_PERIOD(20, 24, 28, 32);
@@ -4413,7 +4397,7 @@ static void init_proc_G2 (CPUPPCState *env)
env->dcache_line_size = 32;
env->icache_line_size = 32;
/* Allocate hardware IRQ controller */
- ppc6xx_irq_init(env);
+ ppc6xx_irq_init(ppc_env_get_cpu(env));
}
POWERPC_FAMILY(G2)(ObjectClass *oc, void *data)
@@ -4492,7 +4476,7 @@ static void init_proc_G2LE (CPUPPCState *env)
env->dcache_line_size = 32;
env->icache_line_size = 32;
/* Allocate hardware IRQ controller */
- ppc6xx_irq_init(env);
+ ppc6xx_irq_init(ppc_env_get_cpu(env));
}
POWERPC_FAMILY(G2LE)(ObjectClass *oc, void *data)
@@ -4745,7 +4729,7 @@ static void init_proc_e300 (CPUPPCState *env)
env->dcache_line_size = 32;
env->icache_line_size = 32;
/* Allocate hardware IRQ controller */
- ppc6xx_irq_init(env);
+ ppc6xx_irq_init(ppc_env_get_cpu(env));
}
POWERPC_FAMILY(e300)(ObjectClass *oc, void *data)
@@ -5000,7 +4984,7 @@ static void init_proc_e500 (CPUPPCState *env, int version)
init_excp_e200(env, ivpr_mask);
/* Allocate hardware IRQ controller */
- ppce500_irq_init(env);
+ ppce500_irq_init(ppc_env_get_cpu(env));
}
static void init_proc_e500v1(CPUPPCState *env)
@@ -5244,7 +5228,7 @@ static void init_proc_601 (CPUPPCState *env)
env->dcache_line_size = 32;
env->icache_line_size = 64;
/* Allocate hardware IRQ controller */
- ppc6xx_irq_init(env);
+ ppc6xx_irq_init(ppc_env_get_cpu(env));
}
POWERPC_FAMILY(601)(ObjectClass *oc, void *data)
@@ -5348,7 +5332,7 @@ static void init_proc_602 (CPUPPCState *env)
env->dcache_line_size = 32;
env->icache_line_size = 32;
/* Allocate hardware IRQ controller */
- ppc6xx_irq_init(env);
+ ppc6xx_irq_init(ppc_env_get_cpu(env));
}
POWERPC_FAMILY(602)(ObjectClass *oc, void *data)
@@ -5417,7 +5401,7 @@ static void init_proc_603 (CPUPPCState *env)
env->dcache_line_size = 32;
env->icache_line_size = 32;
/* Allocate hardware IRQ controller */
- ppc6xx_irq_init(env);
+ ppc6xx_irq_init(ppc_env_get_cpu(env));
}
POWERPC_FAMILY(603)(ObjectClass *oc, void *data)
@@ -5483,7 +5467,7 @@ static void init_proc_603E (CPUPPCState *env)
env->dcache_line_size = 32;
env->icache_line_size = 32;
/* Allocate hardware IRQ controller */
- ppc6xx_irq_init(env);
+ ppc6xx_irq_init(ppc_env_get_cpu(env));
}
POWERPC_FAMILY(603E)(ObjectClass *oc, void *data)
@@ -5543,7 +5527,7 @@ static void init_proc_604 (CPUPPCState *env)
env->dcache_line_size = 32;
env->icache_line_size = 32;
/* Allocate hardware IRQ controller */
- ppc6xx_irq_init(env);
+ ppc6xx_irq_init(ppc_env_get_cpu(env));
}
POWERPC_FAMILY(604)(ObjectClass *oc, void *data)
@@ -5626,7 +5610,7 @@ static void init_proc_604E (CPUPPCState *env)
env->dcache_line_size = 32;
env->icache_line_size = 32;
/* Allocate hardware IRQ controller */
- ppc6xx_irq_init(env);
+ ppc6xx_irq_init(ppc_env_get_cpu(env));
}
POWERPC_FAMILY(604E)(ObjectClass *oc, void *data)
@@ -5696,7 +5680,7 @@ static void init_proc_740 (CPUPPCState *env)
env->dcache_line_size = 32;
env->icache_line_size = 32;
/* Allocate hardware IRQ controller */
- ppc6xx_irq_init(env);
+ ppc6xx_irq_init(ppc_env_get_cpu(env));
}
POWERPC_FAMILY(740)(ObjectClass *oc, void *data)
@@ -5774,7 +5758,7 @@ static void init_proc_750 (CPUPPCState *env)
env->dcache_line_size = 32;
env->icache_line_size = 32;
/* Allocate hardware IRQ controller */
- ppc6xx_irq_init(env);
+ ppc6xx_irq_init(ppc_env_get_cpu(env));
}
POWERPC_FAMILY(750)(ObjectClass *oc, void *data)
@@ -5937,7 +5921,7 @@ static void init_proc_750cl (CPUPPCState *env)
env->dcache_line_size = 32;
env->icache_line_size = 32;
/* Allocate hardware IRQ controller */
- ppc6xx_irq_init(env);
+ ppc6xx_irq_init(ppc_env_get_cpu(env));
}
POWERPC_FAMILY(750cl)(ObjectClass *oc, void *data)
@@ -6057,7 +6041,7 @@ static void init_proc_750cx (CPUPPCState *env)
env->dcache_line_size = 32;
env->icache_line_size = 32;
/* Allocate hardware IRQ controller */
- ppc6xx_irq_init(env);
+ ppc6xx_irq_init(ppc_env_get_cpu(env));
}
POWERPC_FAMILY(750cx)(ObjectClass *oc, void *data)
@@ -6144,7 +6128,7 @@ static void init_proc_750fx (CPUPPCState *env)
env->dcache_line_size = 32;
env->icache_line_size = 32;
/* Allocate hardware IRQ controller */
- ppc6xx_irq_init(env);
+ ppc6xx_irq_init(ppc_env_get_cpu(env));
}
POWERPC_FAMILY(750fx)(ObjectClass *oc, void *data)
@@ -6231,7 +6215,7 @@ static void init_proc_750gx (CPUPPCState *env)
env->dcache_line_size = 32;
env->icache_line_size = 32;
/* Allocate hardware IRQ controller */
- ppc6xx_irq_init(env);
+ ppc6xx_irq_init(ppc_env_get_cpu(env));
}
POWERPC_FAMILY(750gx)(ObjectClass *oc, void *data)
@@ -6309,7 +6293,7 @@ static void init_proc_745 (CPUPPCState *env)
env->dcache_line_size = 32;
env->icache_line_size = 32;
/* Allocate hardware IRQ controller */
- ppc6xx_irq_init(env);
+ ppc6xx_irq_init(ppc_env_get_cpu(env));
}
POWERPC_FAMILY(745)(ObjectClass *oc, void *data)
@@ -6395,7 +6379,7 @@ static void init_proc_755 (CPUPPCState *env)
env->dcache_line_size = 32;
env->icache_line_size = 32;
/* Allocate hardware IRQ controller */
- ppc6xx_irq_init(env);
+ ppc6xx_irq_init(ppc_env_get_cpu(env));
}
POWERPC_FAMILY(755)(ObjectClass *oc, void *data)
@@ -6464,7 +6448,7 @@ static void init_proc_7400 (CPUPPCState *env)
env->dcache_line_size = 32;
env->icache_line_size = 32;
/* Allocate hardware IRQ controller */
- ppc6xx_irq_init(env);
+ ppc6xx_irq_init(ppc_env_get_cpu(env));
}
POWERPC_FAMILY(7400)(ObjectClass *oc, void *data)
@@ -6548,7 +6532,7 @@ static void init_proc_7410 (CPUPPCState *env)
env->dcache_line_size = 32;
env->icache_line_size = 32;
/* Allocate hardware IRQ controller */
- ppc6xx_irq_init(env);
+ ppc6xx_irq_init(ppc_env_get_cpu(env));
}
POWERPC_FAMILY(7410)(ObjectClass *oc, void *data)
@@ -6658,7 +6642,7 @@ static void init_proc_7440 (CPUPPCState *env)
env->dcache_line_size = 32;
env->icache_line_size = 32;
/* Allocate hardware IRQ controller */
- ppc6xx_irq_init(env);
+ ppc6xx_irq_init(ppc_env_get_cpu(env));
}
POWERPC_FAMILY(7440)(ObjectClass *oc, void *data)
@@ -6791,7 +6775,7 @@ static void init_proc_7450 (CPUPPCState *env)
env->dcache_line_size = 32;
env->icache_line_size = 32;
/* Allocate hardware IRQ controller */
- ppc6xx_irq_init(env);
+ ppc6xx_irq_init(ppc_env_get_cpu(env));
}
POWERPC_FAMILY(7450)(ObjectClass *oc, void *data)
@@ -6927,7 +6911,7 @@ static void init_proc_7445 (CPUPPCState *env)
env->dcache_line_size = 32;
env->icache_line_size = 32;
/* Allocate hardware IRQ controller */
- ppc6xx_irq_init(env);
+ ppc6xx_irq_init(ppc_env_get_cpu(env));
}
POWERPC_FAMILY(7445)(ObjectClass *oc, void *data)
@@ -7065,7 +7049,7 @@ static void init_proc_7455 (CPUPPCState *env)
env->dcache_line_size = 32;
env->icache_line_size = 32;
/* Allocate hardware IRQ controller */
- ppc6xx_irq_init(env);
+ ppc6xx_irq_init(ppc_env_get_cpu(env));
}
POWERPC_FAMILY(7455)(ObjectClass *oc, void *data)
@@ -7227,7 +7211,7 @@ static void init_proc_7457 (CPUPPCState *env)
env->dcache_line_size = 32;
env->icache_line_size = 32;
/* Allocate hardware IRQ controller */
- ppc6xx_irq_init(env);
+ ppc6xx_irq_init(ppc_env_get_cpu(env));
}
POWERPC_FAMILY(7457)(ObjectClass *oc, void *data)
@@ -7364,7 +7348,7 @@ static void init_proc_e600 (CPUPPCState *env)
env->dcache_line_size = 32;
env->icache_line_size = 32;
/* Allocate hardware IRQ controller */
- ppc6xx_irq_init(env);
+ ppc6xx_irq_init(ppc_env_get_cpu(env));
}
POWERPC_FAMILY(e600)(ObjectClass *oc, void *data)
@@ -8118,12 +8102,12 @@ static void init_proc_book3s_64(CPUPPCState *env, int version)
case BOOK3S_CPU_970:
case BOOK3S_CPU_POWER5PLUS:
init_excp_970(env);
- ppc970_irq_init(env);
+ ppc970_irq_init(ppc_env_get_cpu(env));
break;
case BOOK3S_CPU_POWER7:
case BOOK3S_CPU_POWER8:
init_excp_POWER7(env);
- ppcPOWER7_irq_init(env);
+ ppcPOWER7_irq_init(ppc_env_get_cpu(env));
break;
default:
g_assert_not_reached();
generated by cgit v1.2.3-55-g7522 (git 2.39.0) at 2025-04-26 07:45:07 +0200