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-rw-r--r--target-sparc/Makefile.objs8
-rw-r--r--target-sparc/cpu.c9
-rw-r--r--target-sparc/cpu.h17
-rw-r--r--target-sparc/ldst_helper.c80
4 files changed, 72 insertions, 42 deletions
diff --git a/target-sparc/Makefile.objs b/target-sparc/Makefile.objs
new file mode 100644
index 0000000000..a93e07deb1
--- /dev/null
+++ b/target-sparc/Makefile.objs
@@ -0,0 +1,8 @@
+obj-$(CONFIG_SOFTMMU) += machine.o
+obj-y += translate.o helper.o cpu.o
+obj-y += fop_helper.o cc_helper.o win_helper.o mmu_helper.o ldst_helper.o
+obj-$(TARGET_SPARC) += int32_helper.o
+obj-$(TARGET_SPARC64) += int64_helper.o
+obj-$(TARGET_SPARC64) += vis_helper.o
+
+$(obj)/op_helper.o: QEMU_CFLAGS += $(HELPER_CFLAGS)
diff --git a/target-sparc/cpu.c b/target-sparc/cpu.c
index 7ac6bdb058..f7c004c7d8 100644
--- a/target-sparc/cpu.c
+++ b/target-sparc/cpu.c
@@ -23,11 +23,6 @@
static int cpu_sparc_find_by_name(sparc_def_t *cpu_def, const char *cpu_model);
-void cpu_state_reset(CPUSPARCState *env)
-{
- cpu_reset(ENV_GET_CPU(env));
-}
-
/* CPUClass::reset() */
static void sparc_cpu_reset(CPUState *s)
{
@@ -111,7 +106,7 @@ static int cpu_sparc_register(CPUSPARCState *env, const char *cpu_model)
return 0;
}
-CPUSPARCState *cpu_sparc_init(const char *cpu_model)
+SPARCCPU *cpu_sparc_init(const char *cpu_model)
{
SPARCCPU *cpu;
CPUSPARCState *env;
@@ -129,7 +124,7 @@ CPUSPARCState *cpu_sparc_init(const char *cpu_model)
}
qemu_init_vcpu(env);
- return env;
+ return cpu;
}
void cpu_sparc_set_id(CPUSPARCState *env, unsigned int cpu)
diff --git a/target-sparc/cpu.h b/target-sparc/cpu.h
index 29c63c711f..e16b7b3515 100644
--- a/target-sparc/cpu.h
+++ b/target-sparc/cpu.h
@@ -511,9 +511,11 @@ struct CPUSPARCState {
uint32_t cache_control;
};
+#include "cpu-qom.h"
+
#ifndef NO_CPU_IO_DEFS
/* cpu_init.c */
-CPUSPARCState *cpu_sparc_init(const char *cpu_model);
+SPARCCPU *cpu_sparc_init(const char *cpu_model);
void cpu_sparc_set_id(CPUSPARCState *env, unsigned int cpu);
void sparc_cpu_list(FILE *f, fprintf_function cpu_fprintf);
/* mmu_helper.c */
@@ -590,7 +592,17 @@ target_phys_addr_t cpu_get_phys_page_nofault(CPUSPARCState *env, target_ulong ad
#endif
int cpu_sparc_signal_handler(int host_signum, void *pinfo, void *puc);
-#define cpu_init cpu_sparc_init
+#ifndef NO_CPU_IO_DEFS
+static inline CPUSPARCState *cpu_init(const char *cpu_model)
+{
+ SPARCCPU *cpu = cpu_sparc_init(cpu_model);
+ if (cpu == NULL) {
+ return NULL;
+ }
+ return &cpu->env;
+}
+#endif
+
#define cpu_exec cpu_sparc_exec
#define cpu_gen_code cpu_sparc_gen_code
#define cpu_signal_handler cpu_sparc_signal_handler
@@ -691,7 +703,6 @@ static inline void cpu_clone_regs(CPUSPARCState *env, target_ulong newsp)
#endif
#include "cpu-all.h"
-#include "cpu-qom.h"
#ifdef TARGET_SPARC64
/* sun4u.c */
diff --git a/target-sparc/ldst_helper.c b/target-sparc/ldst_helper.c
index efe5e704b5..9bec7a92f7 100644
--- a/target-sparc/ldst_helper.c
+++ b/target-sparc/ldst_helper.c
@@ -464,16 +464,18 @@ uint64_t helper_ld_asi(CPUSPARCState *env, target_ulong addr, int asi, int size,
if (size == 8) {
ret = env->mxccregs[3];
} else {
- DPRINTF_MXCC("%08x: unimplemented access size: %d\n", addr,
- size);
+ qemu_log_mask(LOG_UNIMP,
+ "%08x: unimplemented access size: %d\n", addr,
+ size);
}
break;
case 0x01c00a04: /* MXCC control register */
if (size == 4) {
ret = env->mxccregs[3];
} else {
- DPRINTF_MXCC("%08x: unimplemented access size: %d\n", addr,
- size);
+ qemu_log_mask(LOG_UNIMP,
+ "%08x: unimplemented access size: %d\n", addr,
+ size);
}
break;
case 0x01c00c00: /* Module reset register */
@@ -481,21 +483,24 @@ uint64_t helper_ld_asi(CPUSPARCState *env, target_ulong addr, int asi, int size,
ret = env->mxccregs[5];
/* should we do something here? */
} else {
- DPRINTF_MXCC("%08x: unimplemented access size: %d\n", addr,
- size);
+ qemu_log_mask(LOG_UNIMP,
+ "%08x: unimplemented access size: %d\n", addr,
+ size);
}
break;
case 0x01c00f00: /* MBus port address register */
if (size == 8) {
ret = env->mxccregs[7];
} else {
- DPRINTF_MXCC("%08x: unimplemented access size: %d\n", addr,
- size);
+ qemu_log_mask(LOG_UNIMP,
+ "%08x: unimplemented access size: %d\n", addr,
+ size);
}
break;
default:
- DPRINTF_MXCC("%08x: unimplemented address, size: %d\n", addr,
- size);
+ qemu_log_mask(LOG_UNIMP,
+ "%08x: unimplemented address, size: %d\n", addr,
+ size);
break;
}
DPRINTF_MXCC("asi = %d, size = %d, sign = %d, "
@@ -719,40 +724,45 @@ void helper_st_asi(CPUSPARCState *env, target_ulong addr, uint64_t val, int asi,
if (size == 8) {
env->mxccdata[0] = val;
} else {
- DPRINTF_MXCC("%08x: unimplemented access size: %d\n", addr,
- size);
+ qemu_log_mask(LOG_UNIMP,
+ "%08x: unimplemented access size: %d\n", addr,
+ size);
}
break;
case 0x01c00008: /* MXCC stream data register 1 */
if (size == 8) {
env->mxccdata[1] = val;
} else {
- DPRINTF_MXCC("%08x: unimplemented access size: %d\n", addr,
- size);
+ qemu_log_mask(LOG_UNIMP,
+ "%08x: unimplemented access size: %d\n", addr,
+ size);
}
break;
case 0x01c00010: /* MXCC stream data register 2 */
if (size == 8) {
env->mxccdata[2] = val;
} else {
- DPRINTF_MXCC("%08x: unimplemented access size: %d\n", addr,
- size);
+ qemu_log_mask(LOG_UNIMP,
+ "%08x: unimplemented access size: %d\n", addr,
+ size);
}
break;
case 0x01c00018: /* MXCC stream data register 3 */
if (size == 8) {
env->mxccdata[3] = val;
} else {
- DPRINTF_MXCC("%08x: unimplemented access size: %d\n", addr,
- size);
+ qemu_log_mask(LOG_UNIMP,
+ "%08x: unimplemented access size: %d\n", addr,
+ size);
}
break;
case 0x01c00100: /* MXCC stream source */
if (size == 8) {
env->mxccregs[0] = val;
} else {
- DPRINTF_MXCC("%08x: unimplemented access size: %d\n", addr,
- size);
+ qemu_log_mask(LOG_UNIMP,
+ "%08x: unimplemented access size: %d\n", addr,
+ size);
}
env->mxccdata[0] = ldq_phys((env->mxccregs[0] & 0xffffffffULL) +
0);
@@ -767,8 +777,9 @@ void helper_st_asi(CPUSPARCState *env, target_ulong addr, uint64_t val, int asi,
if (size == 8) {
env->mxccregs[1] = val;
} else {
- DPRINTF_MXCC("%08x: unimplemented access size: %d\n", addr,
- size);
+ qemu_log_mask(LOG_UNIMP,
+ "%08x: unimplemented access size: %d\n", addr,
+ size);
}
stq_phys((env->mxccregs[1] & 0xffffffffULL) + 0,
env->mxccdata[0]);
@@ -783,8 +794,9 @@ void helper_st_asi(CPUSPARCState *env, target_ulong addr, uint64_t val, int asi,
if (size == 8) {
env->mxccregs[3] = val;
} else {
- DPRINTF_MXCC("%08x: unimplemented access size: %d\n", addr,
- size);
+ qemu_log_mask(LOG_UNIMP,
+ "%08x: unimplemented access size: %d\n", addr,
+ size);
}
break;
case 0x01c00a04: /* MXCC control register */
@@ -792,8 +804,9 @@ void helper_st_asi(CPUSPARCState *env, target_ulong addr, uint64_t val, int asi,
env->mxccregs[3] = (env->mxccregs[3] & 0xffffffff00000000ULL)
| val;
} else {
- DPRINTF_MXCC("%08x: unimplemented access size: %d\n", addr,
- size);
+ qemu_log_mask(LOG_UNIMP,
+ "%08x: unimplemented access size: %d\n", addr,
+ size);
}
break;
case 0x01c00e00: /* MXCC error register */
@@ -801,21 +814,24 @@ void helper_st_asi(CPUSPARCState *env, target_ulong addr, uint64_t val, int asi,
if (size == 8) {
env->mxccregs[6] &= ~val;
} else {
- DPRINTF_MXCC("%08x: unimplemented access size: %d\n", addr,
- size);
+ qemu_log_mask(LOG_UNIMP,
+ "%08x: unimplemented access size: %d\n", addr,
+ size);
}
break;
case 0x01c00f00: /* MBus port address register */
if (size == 8) {
env->mxccregs[7] = val;
} else {
- DPRINTF_MXCC("%08x: unimplemented access size: %d\n", addr,
- size);
+ qemu_log_mask(LOG_UNIMP,
+ "%08x: unimplemented access size: %d\n", addr,
+ size);
}
break;
default:
- DPRINTF_MXCC("%08x: unimplemented address, size: %d\n", addr,
- size);
+ qemu_log_mask(LOG_UNIMP,
+ "%08x: unimplemented address, size: %d\n", addr,
+ size);
break;
}
DPRINTF_MXCC("asi = %d, size = %d, addr = %08x, val = %" PRIx64 "\n",
generated by cgit v1.2.3-55-g7522 (git 2.39.0) at 2025-04-25 04:58:57 +0200