summaryrefslogtreecommitdiffstats
path: root/target/arm
diff options
context:
space:
mode:
Diffstat (limited to 'target/arm')
-rw-r--r--target/arm/cpu.c2
-rw-r--r--target/arm/cpu.h8
2 files changed, 5 insertions, 5 deletions
diff --git a/target/arm/cpu.c b/target/arm/cpu.c
index 5d4ca7a227..0980d33901 100644
--- a/target/arm/cpu.c
+++ b/target/arm/cpu.c
@@ -812,7 +812,7 @@ static void arm_disas_set_info(CPUState *cpu, disassemble_info *info)
sctlr_b = arm_sctlr_b(env);
if (bswap_code(sctlr_b)) {
-#ifdef TARGET_WORDS_BIGENDIAN
+#if TARGET_BIG_ENDIAN
info->endian = BFD_ENDIAN_LITTLE;
#else
info->endian = BFD_ENDIAN_BIG;
diff --git a/target/arm/cpu.h b/target/arm/cpu.h
index 816aa0394e..ccf635ac5c 100644
--- a/target/arm/cpu.h
+++ b/target/arm/cpu.h
@@ -3549,12 +3549,12 @@ static inline int cpu_mmu_index(CPUARMState *env, bool ifetch)
static inline bool bswap_code(bool sctlr_b)
{
#ifdef CONFIG_USER_ONLY
- /* BE8 (SCTLR.B = 0, TARGET_WORDS_BIGENDIAN = 1) is mixed endian.
- * The invalid combination SCTLR.B=1/CPSR.E=1/TARGET_WORDS_BIGENDIAN=0
+ /* BE8 (SCTLR.B = 0, TARGET_BIG_ENDIAN = 1) is mixed endian.
+ * The invalid combination SCTLR.B=1/CPSR.E=1/TARGET_BIG_ENDIAN=0
* would also end up as a mixed-endian mode with BE code, LE data.
*/
return
-#ifdef TARGET_WORDS_BIGENDIAN
+#if TARGET_BIG_ENDIAN
1 ^
#endif
sctlr_b;
@@ -3570,7 +3570,7 @@ static inline bool bswap_code(bool sctlr_b)
static inline bool arm_cpu_bswap_data(CPUARMState *env)
{
return
-#ifdef TARGET_WORDS_BIGENDIAN
+#if TARGET_BIG_ENDIAN
1 ^
#endif
arm_cpu_data_is_big_endian(env);