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| * | | qemu-option: support accept-any QemuOptsList in qemu_opts_absorb_qdictPaolo Bonzini2021-05-121-1/+2
| | | | | | | | | | | | | | | | Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
| * | | main-loop: remove dead codePaolo Bonzini2021-05-112-79/+0Star
| | | | | | | | | | | | | | | | | | | | | | | | | | | | qemu_add_child_watch is not called anywhere since commit 2bdb920ece ("slirp: simplify fork_exec()", 2019-01-14), remove it. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
| * | | target/i386: use mmu_translate for NPT walkPaolo Bonzini2021-05-111-207/+36Star
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Unify the duplicate code between get_hphys and mmu_translate, by simply making get_hphys call mmu_translate. This also fixes the support for 5-level nested page tables. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
| * | | target/i386: allow customizing the next phase of the translationPaolo Bonzini2021-05-111-12/+18
| | | | | | | | | | | | | | | | Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
| * | | target/i386: extend pg_mode to more CR0 and CR4 bitsPaolo Bonzini2021-05-113-16/+39
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In order to unify the two stages of page table lookup, we need mmu_translate to use either the host CR0/EFER/CR4 or the guest's. To do so, make mmu_translate use the same pg_mode constants that were used for the NPT lookup. This also prepares for adding 5-level NPT support, which however does not work yet. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
| * | | target/i386: pass cr3 to mmu_translatePaolo Bonzini2021-05-111-6/+6
| | | | | | | | | | | | | | | | | | | | | | | | First step in unifying the nested and regular page table walk. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
| * | | target/i386: extract mmu_translatePaolo Bonzini2021-05-111-65/+86
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Extract the page table lookup out of handle_mmu_fault, which only has to invoke mmu_translate and either fill the TLB or deliver the page fault. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
| * | | target/i386: move paging mode constants from SVM to cpu.hPaolo Bonzini2021-05-114-21/+31
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We will reuse the page walker for both SVM and regular accesses. To do so we will build a function that receives the currently active paging mode; start by including in cpu.h the constants and the function to go from cr4/hflags/efer to the paging mode. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
| * | | target/i386: merge SVM_NPTEXIT_* with PF_ERROR_* constantsPaolo Bonzini2021-05-112-10/+5Star
| | | | | | | | | | | | | | | | | | | | | | | | They are the same value, and are so by design. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
| * | | accel: add init_accel_cpu for adapting accel behavior to CPU typeClaudio Fontana2021-05-103-1/+26
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | while on x86 all CPU classes can use the same set of TCGCPUOps, on ARM the right accel behavior depends on the type of the CPU. So we need a way to specialize the accel behavior according to the CPU. Therefore, add a second initialization, after the accel_cpu->cpu_class_init, that allows to do this. Signed-off-by: Claudio Fontana <cfontana@suse.de> Cc: Paolo Bonzini <pbonzini@redhat.com> Message-Id: <20210322132800.7470-24-cfontana@suse.de> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
| * | | accel: move call to accel_init_interfacesClaudio Fontana2021-05-104-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | move the call for sysemu specifically in machine_run_board_init, mirror the calling sequence for user mode too. Suggested-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Claudio Fontana <cfontana@suse.de> Message-Id: <20210322132800.7470-23-cfontana@suse.de> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
| * | | i386: make cpu_load_efer sysemu-onlyClaudio Fontana2021-05-102-15/+18
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | cpu_load_efer is now used only for sysemu code. Therefore, move this function implementation to sysemu-only section of helper.c Signed-off-by: Claudio Fontana <cfontana@suse.de> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20210322132800.7470-22-cfontana@suse.de> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
| * | | target/i386: gdbstub: only write CR0/CR2/CR3/EFER for sysemuClaudio Fontana2021-05-101-0/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Claudio Fontana <cfontana@suse.de> Cc: Paolo Bonzini <pbonzini@redhat.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20210322132800.7470-21-cfontana@suse.de> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
| * | | target/i386: gdbstub: introduce aux functions to read/write CS64 regsClaudio Fontana2021-05-101-104/+51Star
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | a number of registers are read as 64bit under the condition that (hflags & HF_CS64_MASK) || TARGET_X86_64) and a number of registers are written as 64bit under the condition that (hflags & HF_CS64_MASK). Provide some auxiliary functions that do that. Signed-off-by: Claudio Fontana <cfontana@suse.de> Cc: Paolo Bonzini <pbonzini@redhat.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20210322132800.7470-20-cfontana@suse.de> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
| * | | i386: split off sysemu part of cpu.cClaudio Fontana2021-05-104-379/+429
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Claudio Fontana <cfontana@suse.de> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20210322132800.7470-19-cfontana@suse.de> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
| * | | i386: split seg_helper into user-only and sysemu partsClaudio Fontana2021-05-107-229/+311
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Claudio Fontana <cfontana@suse.de> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> [claudio]: Rebased on commit 68775856 ("target/i386: svm: do not discard high 32 bits") Signed-off-by: Claudio Fontana <cfontana@suse.de> Message-Id: <20210322132800.7470-18-cfontana@suse.de> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
| * | | i386: split svm_helper into sysemu and stub-only userClaudio Fontana2021-05-105-61/+80
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | For now we just copy over the previous user stubs, but really, everything that requires s->cpl == 0 should be impossible to trigger from user-mode emulation. Later on we should add a check that asserts this easily f.e.: static bool check_cpl0(DisasContext *s) { int cpl = s->cpl; #ifdef CONFIG_USER_ONLY assert(cpl == 3); #endif if (cpl != 0) { gen_exception(s, EXCP0D_GPF, s->pc_start - s->cs_base); return false; } return true; } Signed-off-by: Claudio Fontana <cfontana@suse.de> Cc: Paolo Bonzini <pbonzini@redhat.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20210322132800.7470-17-cfontana@suse.de> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
| * | | i386: separate fpu_helper sysemu-only partsClaudio Fontana2021-05-104-39/+63
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | create a separate tcg/sysemu/fpu_helper.c for the sysemu-only parts. For user mode, some small #ifdefs remain in tcg/fpu_helper.c which do not seem worth splitting into their own user-mode module. Signed-off-by: Claudio Fontana <cfontana@suse.de> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20210322132800.7470-16-cfontana@suse.de> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
| * | | i386: split misc helper user stubs and sysemu partClaudio Fontana2021-05-105-467/+519
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Claudio Fontana <cfontana@suse.de> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> [claudio]: Rebased on da3f3b02("target/i386: fail if toggling LA57 in 64-bitmode") Signed-off-by: Claudio Fontana <cfontana@suse.de> Message-Id: <20210322132800.7470-15-cfontana@suse.de> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
| * | | i386: move TCG bpt_helper into sysemu/Claudio Fontana2021-05-106-277/+311
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | for user-mode, assert that the hidden IOBPT flags are not set while attempting to generate io_bpt helpers. Signed-off-by: Claudio Fontana <cfontana@suse.de> Cc: Paolo Bonzini <pbonzini@redhat.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20210322132800.7470-14-cfontana@suse.de> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
| * | | i386: split tcg excp_helper into sysemu and user partsClaudio Fontana2021-05-105-573/+623
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Claudio Fontana <cfontana@suse.de> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> [claudio]: Rebased on commit b8184135 ("target/i386: allow modifying TCG phys-addr-bits") Signed-off-by: Claudio Fontana <cfontana@suse.de> Message-Id: <20210322132800.7470-13-cfontana@suse.de> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
| * | | i386: split smm helper (sysemu)Claudio Fontana2021-05-106-18/+16Star
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | smm is only really useful for sysemu, split in two modules around the CONFIG_USER_ONLY, in order to remove the ifdef and use the build system instead. add cpu_abort() when detecting attempts to enter SMM mode via SMI interrupt in user-mode, and assert that the cpu is not in SMM mode while translating RSM instructions. Signed-off-by: Claudio Fontana <cfontana@suse.de> Cc: Paolo Bonzini <pbonzini@redhat.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20210322132800.7470-12-cfontana@suse.de> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
| * | | i386: split off sysemu-only functionality in tcg-cpuPaolo Bonzini2021-05-107-71/+121
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Claudio Fontana <cfontana@suse.de> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20210322132800.7470-11-cfontana@suse.de> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
| * | | accel-cpu: make cpu_realizefn return a boolClaudio Fontana2021-05-108-14/+18
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | overall, all devices' realize functions take an Error **errp, but return void. hw/core/qdev.c code, which realizes devices, therefore does: local_err = NULL; dc->realize(dev, &local_err); if (local_err != NULL) { goto fail; } However, we can improve at least accel_cpu to return a meaningful bool value. Signed-off-by: Claudio Fontana <cfontana@suse.de> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20210322132800.7470-9-cfontana@suse.de> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
| * | | target/i386: fix host_cpu_adjust_phys_bits error handlingClaudio Fontana2021-05-101-10/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | move the check for phys_bits outside of host_cpu_adjust_phys_bits, because otherwise it is impossible to return an error condition explicitly. Signed-off-by: Claudio Fontana <cfontana@suse.de> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20210322132800.7470-8-cfontana@suse.de> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
| * | | accel: introduce new accessor functionsClaudio Fontana2021-05-104-12/+35
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | avoid open coding the accesses to cpu->accel_cpu interfaces, and instead introduce: accel_cpu_instance_init, accel_cpu_realizefn to be used by the targets/ initfn code, and by cpu_exec_realizefn respectively. Signed-off-by: Claudio Fontana <cfontana@suse.de> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20210322132800.7470-7-cfontana@suse.de> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
| * | | cpu: call AccelCPUClass::cpu_realizefn in cpu_exec_realizefnClaudio Fontana2021-05-102-13/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | move the call to accel_cpu->cpu_realizefn to the general cpu_exec_realizefn from target/i386, so it does not need to be called for every target explicitly as we enable more targets. Signed-off-by: Claudio Fontana <cfontana@suse.de> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20210322132800.7470-6-cfontana@suse.de> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
| * | | i386: split cpu accelerators from cpu.c, using AccelCPUClassClaudio Fontana2021-05-1015-379/+652
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | i386 is the first user of AccelCPUClass, allowing to split cpu.c into: cpu.c cpuid and common x86 cpu functionality host-cpu.c host x86 cpu functions and "host" cpu type kvm/kvm-cpu.c KVM x86 AccelCPUClass hvf/hvf-cpu.c HVF x86 AccelCPUClass tcg/tcg-cpu.c TCG x86 AccelCPUClass Signed-off-by: Claudio Fontana <cfontana@suse.de> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> [claudio]: Rebased on commit b8184135 ("target/i386: allow modifying TCG phys-addr-bits") Signed-off-by: Claudio Fontana <cfontana@suse.de> Message-Id: <20210322132800.7470-5-cfontana@suse.de> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
| * | | target/i386: Split out do_fsave, do_frstor, do_fxsave, do_fxrstorRichard Henderson2021-05-101-16/+34
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The helper_* functions must use GETPC() to unwind from TCG. The cpu_x86_* functions cannot, and directly calling the helper_* functions is a bug. Split out new functions that perform the work and can be used by both. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Claudio Fontana <cfontana@suse.de> Tested-by: Claudio Fontana <cfontana@suse.de> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20210322132800.7470-4-cfontana@suse.de> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
| * | | target/i386: Rename helper_fldt, helper_fsttRichard Henderson2021-05-101-10/+9Star
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Change the prefix from "helper" to "do". The former should be reserved for those functions that are called from TCG; the latter is in use within the file already for those functions that are called from the helper functions, adding a "retaddr" argument. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Claudio Fontana <cfontana@suse.de> Tested-by: Claudio Fontana <cfontana@suse.de> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20210322132800.7470-3-cfontana@suse.de> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
* | | | Merge remote-tracking branch 'remotes/kraxel/tags/vga-20210510-pull-request' ↵Peter Maydell2021-05-1215-228/+570
|\ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | into staging edid: display id support (for 5k+), bugfixes. virtio-gpu: iommu fix, device split. # gpg: Signature made Mon 10 May 2021 14:20:36 BST # gpg: using RSA key A0328CFFB93A17A79901FE7D4CB6D8EED3E87138 # gpg: Good signature from "Gerd Hoffmann (work) <kraxel@redhat.com>" [full] # gpg: aka "Gerd Hoffmann <gerd@kraxel.org>" [full] # gpg: aka "Gerd Hoffmann (private) <kraxel@gmail.com>" [full] # Primary key fingerprint: A032 8CFF B93A 17A7 9901 FE7D 4CB6 D8EE D3E8 7138 * remotes/kraxel/tags/vga-20210510-pull-request: (25 commits) virtio-gpu: add virtio-vga-gl modules: add have_vga virtio-gpu: add virtio-gpu-gl-pci virtio-gpu: move fields to struct VirtIOGPUGL virtio-gpu: drop use_virgl_renderer virtio-gpu: move virtio-gpu-gl-device to separate module virtio-gpu: drop VIRGL() macro virtio-gpu: move update_cursor_data virtio-gpu: move virgl process_cmd virtio-gpu: move virgl gl_flushed virtio-gpu: move virgl handle_ctrl virtio-gpu: use class function for ctrl queue handlers virtio-gpu: move virgl reset virtio-gpu: move virgl realize + properties virtio-gpu: add virtio-gpu-gl-device virtio-gpu: rename virgl source file. virtio-gpu: handle partial maps properly edid: add support for DisplayID extension (5k resolution) edid: allow arbitrary-length checksums edid: move timing generation into a separate function ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
| * | | | virtio-gpu: add virtio-vga-glGerd Hoffmann2021-05-103-0/+54
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add pci proxy for virtio-gpu-gl-device, with vga compatibility. Signed-off-by: Gerd Hoffmann <kraxel@redhat.com> Message-id: 20210430113547.1816178-1-kraxel@redhat.com Message-Id: <20210430113547.1816178-17-kraxel@redhat.com>
| * | | | modules: add have_vgaGerd Hoffmann2021-05-102-0/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Introduce a symbol which can be used to prevent display modules which need vga support being loaded into system emulators with CONFIG_VGA=n. Signed-off-by: Gerd Hoffmann <kraxel@redhat.com> Message-id: 20210430113547.1816178-1-kraxel@redhat.com Message-Id: <20210430113547.1816178-16-kraxel@redhat.com>
| * | | | virtio-gpu: add virtio-gpu-gl-pciGerd Hoffmann2021-05-103-0/+62
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add pci proxy for virtio-gpu-gl-device. Signed-off-by: Gerd Hoffmann <kraxel@redhat.com> Message-id: 20210430113547.1816178-1-kraxel@redhat.com Message-Id: <20210430113547.1816178-15-kraxel@redhat.com>
| * | | | virtio-gpu: move fields to struct VirtIOGPUGLGerd Hoffmann2021-05-102-8/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Move two virglrenderer state variables to struct VirtIOGPUGL. Signed-off-by: Gerd Hoffmann <kraxel@redhat.com> Message-id: 20210430113547.1816178-1-kraxel@redhat.com Message-Id: <20210430113547.1816178-14-kraxel@redhat.com>
| * | | | virtio-gpu: drop use_virgl_rendererGerd Hoffmann2021-05-103-37/+14Star
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Now that we have separated the gl and non-gl code flows to two different devices there is little reason turn on and off virglrenderer usage at runtime. The gl code can simply use virglrenderer unconditionally. So drop use_virgl_renderer field and just do that. Signed-off-by: Gerd Hoffmann <kraxel@redhat.com> Message-id: 20210430113547.1816178-1-kraxel@redhat.com Message-Id: <20210430113547.1816178-13-kraxel@redhat.com>
| * | | | virtio-gpu: move virtio-gpu-gl-device to separate moduleGerd Hoffmann2021-05-102-4/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Gerd Hoffmann <kraxel@redhat.com> Message-id: 20210430113547.1816178-1-kraxel@redhat.com Message-Id: <20210430113547.1816178-12-kraxel@redhat.com>
| * | | | virtio-gpu: drop VIRGL() macroGerd Hoffmann2021-05-101-17/+0Star
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Drops last virgl/opengl dependency from virtio-gpu-device. Signed-off-by: Gerd Hoffmann <kraxel@redhat.com> Message-id: 20210430113547.1816178-1-kraxel@redhat.com Message-Id: <20210430113547.1816178-11-kraxel@redhat.com>
| * | | | virtio-gpu: move update_cursor_dataGerd Hoffmann2021-05-103-32/+42
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Gerd Hoffmann <kraxel@redhat.com> Message-id: 20210430113547.1816178-1-kraxel@redhat.com Message-Id: <20210430113547.1816178-10-kraxel@redhat.com>
| * | | | virtio-gpu: move virgl process_cmdGerd Hoffmann2021-05-103-4/+18
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Gerd Hoffmann <kraxel@redhat.com> Message-id: 20210430113547.1816178-1-kraxel@redhat.com Message-Id: <20210430113547.1816178-9-kraxel@redhat.com>
| * | | | virtio-gpu: move virgl gl_flushedGerd Hoffmann2021-05-102-15/+13Star
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Gerd Hoffmann <kraxel@redhat.com> Message-id: 20210430113547.1816178-1-kraxel@redhat.com Message-Id: <20210430113547.1816178-8-kraxel@redhat.com>
| * | | | virtio-gpu: move virgl handle_ctrlGerd Hoffmann2021-05-102-13/+33
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Gerd Hoffmann <kraxel@redhat.com> Message-id: 20210430113547.1816178-1-kraxel@redhat.com Message-Id: <20210430113547.1816178-7-kraxel@redhat.com>
| * | | | virtio-gpu: use class function for ctrl queue handlersGerd Hoffmann2021-05-102-4/+16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Gerd Hoffmann <kraxel@redhat.com> Message-id: 20210430113547.1816178-1-kraxel@redhat.com Message-Id: <20210430113547.1816178-6-kraxel@redhat.com>
| * | | | virtio-gpu: move virgl resetGerd Hoffmann2021-05-103-18/+19
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Gerd Hoffmann <kraxel@redhat.com> Message-id: 20210430113547.1816178-1-kraxel@redhat.com Message-Id: <20210430113547.1816178-5-kraxel@redhat.com>
| * | | | virtio-gpu: move virgl realize + propertiesGerd Hoffmann2021-05-103-22/+35
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Move device init (realize) and properties. Drop the virgl property, the virtio-gpu-gl-device has virgl enabled no matter what. Just use virtio-gpu-device instead if you don't want enable virgl and opengl. This simplifies the logic and reduces the test matrix. Signed-off-by: Gerd Hoffmann <kraxel@redhat.com> Message-id: 20210430113547.1816178-1-kraxel@redhat.com Message-Id: <20210430113547.1816178-4-kraxel@redhat.com>
| * | | | virtio-gpu: add virtio-gpu-gl-deviceGerd Hoffmann2021-05-104-1/+50
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Just a skeleton for starters, following patches will add more code. Signed-off-by: Gerd Hoffmann <kraxel@redhat.com> Message-id: 20210430113547.1816178-1-kraxel@redhat.com Message-Id: <20210430113547.1816178-3-kraxel@redhat.com>
| * | | | virtio-gpu: rename virgl source file.Gerd Hoffmann2021-05-102-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | "3d" -> "virgl" as 3d is a rather broad term. Hopefully a bit less confusing. Signed-off-by: Gerd Hoffmann <kraxel@redhat.com> Message-id: 20210430113547.1816178-1-kraxel@redhat.com Message-Id: <20210430113547.1816178-2-kraxel@redhat.com>
| * | | | virtio-gpu: handle partial maps properlyGerd Hoffmann2021-05-103-34/+52
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | dma_memory_map() may map only a part of the request. Happens if the request can't be mapped in one go, for example due to a iommu creating a linear dma mapping for scattered physical pages. Should that be the case virtio-gpu must call dma_memory_map() again with the remaining range instead of simply throwing an error. Note that this change implies the number of iov entries may differ from the number of mapping entries sent by the guest. Therefore the iov_len bookkeeping needs some updates too, we have to explicitly pass around the iov length now. Reported-by: Auger Eric <eric.auger@redhat.com> Signed-off-by: Gerd Hoffmann <kraxel@redhat.com> Message-id: 20210506091001.1301250-1-kraxel@redhat.com Reviewed-by: Eric Auger <eric.auger@redhat.com> Tested-by: Eric Auger <eric.auger@redhat.com> Message-Id: <20210506091001.1301250-1-kraxel@redhat.com>
| * | | | edid: add support for DisplayID extension (5k resolution)Konstantin Nazarov2021-05-102-6/+74
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The Detailed Timing Descriptor has only 12 bits to store the resolution. This limits the guest to 4095 pixels. This patch adds support for the DisplayID extension, that has 2 full bytes for that purpose, thus allowing 5k resolutions and above. Based-on: <20210303152948.59943-2-akihiko.odaki@gmail.com> Signed-off-by: Konstantin Nazarov <mail@knazarov.com> Message-Id: <20210315114639.91953-3-mail@knazarov.com> [ kraxel: minor workflow tweaks ] Signed-off-by: Gerd Hoffmann <kraxel@redhat.com> Message-id: 20210427150824.638359-1-kraxel@redhat.com Message-Id: <20210427150824.638359-9-kraxel@redhat.com>
| * | | | edid: allow arbitrary-length checksumsKonstantin Nazarov2021-05-101-5/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Some of the EDID extensions like DisplayID do checksums of their subsections. Currently checksums can be only applied to the whole extension blocks which are 128 bytes. This patch allows to checksum arbitrary parts of EDID, and not only whole extension blocks. Based-on: <20210303152948.59943-2-akihiko.odaki@gmail.com> Signed-off-by: Konstantin Nazarov <mail@knazarov.com> Message-Id: <20210315114639.91953-2-mail@knazarov.com> Signed-off-by: Gerd Hoffmann <kraxel@redhat.com> Message-id: 20210427150824.638359-1-kraxel@redhat.com Message-Id: <20210427150824.638359-8-kraxel@redhat.com>