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* hw/mips/cps: enable ITU for multithreading processorsLeon Alrae2016-03-302-0/+34
| | | | | | | Make ITU available in the system if CPU supports multithreading and is part of CPS. Signed-off-by: Leon Alrae <leon.alrae@imgtec.com>
* target-mips: make ITC Configuration Tags accessible to the CPULeon Alrae2016-03-304-12/+100
| | | | | | | | | | | | | | Add CP0.ErrCtl register with WST, SPR and ITC bits. In 34K and interAptiv processors these bits are used to enable CACHE instruction access to different arrays. When WST=0, SPR=0 and ITC=1 the CACHE instruction will access ITC tag values. Generally we do not model caches and we have been treating the CACHE instruction as NOP. But since CACHE can operate on ITC Tags new MIPS_HFLAG_ITC_CACHE hflag is introduced to generate the helper only when CACHE is in the ITC Access mode. Signed-off-by: Leon Alrae <leon.alrae@imgtec.com>
* target-mips: check CP0 enabled for CACHE instruction also in R6Leon Alrae2016-03-301-0/+1
| | | | Signed-off-by: Leon Alrae <leon.alrae@imgtec.com>
* hw/mips: implement ITC Storage - Bypass ViewLeon Alrae2016-03-301-0/+27
| | | | | | | | | | Bypass View does not cause issuing thread to block and does not affect any of the cells state bit. Read from a FIFO cell returns the value of the oldest entry. Store to a FIFO cell changes the value of the newest entry. Signed-off-by: Leon Alrae <leon.alrae@imgtec.com>
* hw/mips: implement ITC Storage - P/V Sync and Try ViewsLeon Alrae2016-03-301-0/+68
| | | | | | | | | | | | | | | | P/V Synchronized and Try Views can be used to access Semaphore cells. Load returns current value and post-decrements the value in the cell (until it reaches zero). Stores increment the value (until it saturates at 0xFFFF). P/V Synchronized View causes the issuing thread to block on read if value is 0. P/V Try View does not block the thread, it returns 0 in this case. Cell's Empty and Full bits are not modified. Trap bit (i.e. Gating Storage exceptions) not implemented. Signed-off-by: Leon Alrae <leon.alrae@imgtec.com>
* hw/mips: implement ITC Storage - Empty/Full Sync and Try ViewsLeon Alrae2016-03-301-0/+113
| | | | | | | | | | | | | | | | | | | | Empty/Full Synchronized and Try views can be used to access FIFO cells. Store to the FIFO cell pushes the value into the queue, load pops the oldest element from the queue. Cell's Full and Empty bits are automatically updated to reflect new state of the cell. Empty/Full Synchronized View causes the issuing thread to block when FIFO is empty while thread is performing a read, or FIFO is full while thread is performing a write. Empty/Full Try View never blocks the thread. If cell is full then write is ignored, if cell is empty then load returns 0. Trap bit (i.e. Gating Storage exceptions) not implemented. Store Conditional support for E/F Try View (i.e. indicate failure if FIFO is full) not implemented. Signed-off-by: Leon Alrae <leon.alrae@imgtec.com>
* hw/mips: implement ITC Storage - Control ViewLeon Alrae2016-03-301-0/+104
| | | | | | | | | Control view is used to access the ITC Storage Cell Tags. It never causes the issuing thread to block. Guest can empty the FIFO cell by setting Empty bit to 1. Signed-off-by: Leon Alrae <leon.alrae@imgtec.com>
* hw/mips: implement ITC Configuration Tags and Storage CellsLeon Alrae2016-03-305-0/+289
| | | | | | | | | | | | | | | | | | | | | | Implement ITC as a single object consisting of two memory regions: 1) tag_io: ITC Configuration Tags (i.e. ITCAddressMap{0,1} registers) which are accessible by the CPU via CACHE instruction. Also adding MemoryRegion *itc_tag to the CPUMIPSState so that CACHE instruction will dispatch reads/writes directly. 2) storage_io: memory-mapped ITC Storage whose address space is configurable (i.e. enabled/remapped/resized) by writing to ITCAddressMap{0,1} registers. ITC Storage contains FIFO and Semaphore cells. Read-only FIFO bit in the ITC cell tag indicates the type of the cell. If the ITC Storage contains both types of cells then FIFOs are located before Semaphores. Since issuing thread can get blocked on the access to a cell (in E/F Synchronized and P/V Synchronized Views) each cell has a bitmap to track which threads are currently blocked. Signed-off-by: Leon Alrae <leon.alrae@imgtec.com>
* target-mips: enable CM GCR in MIPS64R6-generic CPULeon Alrae2016-03-301-1/+2
| | | | | | | Indicate that in the MIPS64R6-generic CPU the memory-mapped Global Configuration Register Space is implemented. Signed-off-by: Leon Alrae <leon.alrae@imgtec.com>
* hw/mips_malta: add CPS to Malta boardLeon Alrae2016-03-303-11/+60
| | | | | | | | | | If the user specifies smp > 1 and the CPU with CM GCR support, then create Coherent Processing System (which takes care of instantiating CPUs) rather than CPUs directly and connect i8259 and cbus to the pins exposed by CPS. However, there is no GIC yet, thus CPS exposes CPU's IRQ pins so use the same pin numbers as before. Signed-off-by: Leon Alrae <leon.alrae@imgtec.com>
* hw/mips_malta: move CPU creation to a separate functionLeon Alrae2016-03-301-29/+39
| | | | Signed-off-by: Leon Alrae <leon.alrae@imgtec.com>
* hw/mips_malta: remove redundant irq and clock initLeon Alrae2016-03-301-4/+0Star
| | | | | | | | | | | Global smp_cpus is never zero (even if user provides -smp 0), thus clocks and irqs are always initialized for each created CPU in the loop at the beginning of mips_malta_init. These two lines cause a leak of already allocated timer and irqs for the first CPU - remove them. Signed-off-by: Leon Alrae <leon.alrae@imgtec.com>
* hw/mips_malta: remove CPUMIPSState from the write_bootloader()Leon Alrae2016-03-301-4/+4
| | | | | | | Remove CPUMIPSState from the write_bootloader() argument list as it is not used in the function. Signed-off-by: Leon Alrae <leon.alrae@imgtec.com>
* hw/mips/cps: create CPC block inside CPSLeon Alrae2016-03-304-0/+81
| | | | | | | | | | | Create Cluster Power Controller and add a link to the CPC MemoryRegion in GCR. Guest can enable / map CPC to any physical address by writing to the memory-mapped GCR_CPC_BASE register. Set vp-start-reset property to 1 to allow only first VP to run from reset. Others are brought up by the guest via CPC memory-mapped registers. Signed-off-by: Leon Alrae <leon.alrae@imgtec.com>
* hw/mips: add initial Cluster Power Controller supportLeon Alrae2016-03-303-0/+225
| | | | | | | | | | | | | | Cluster Power Controller (CPC) is responsible for power management in multiprocessing system. It provides registers to control the power and the clock frequency of the individual elements in the system. This patch implements only three registers that are used to control the power state of each VP on a single core: * VP Run is a write-only register used to set each VP to the run state * VP Stop is a write-only register used to set each VP to the suspend state * VP Running is a read-only register indicating the run state of each VP Signed-off-by: Leon Alrae <leon.alrae@imgtec.com>
* hw/mips/cps: create GCR block inside CPSLeon Alrae2016-03-302-0/+25
| | | | Signed-off-by: Leon Alrae <leon.alrae@imgtec.com>
* hw/mips: add initial Global Config Register supportYongbok Kim2016-03-303-0/+157
| | | | | | | | | | | | | | Add initial GCR support to indicate number of VPs present in the system, L2 bypass mode and revision number. Signed-off-by: Yongbok Kim <yongbok.kim@imgtec.com> [leon.alrae@imgtec.com: * removed GIC part, * changed commit message, * replaced %lx format spec. with PRIx64, * renamed mips_gcr.{c,h} to mips_cmgcr.{c,h}, * replaced CONFIG_MIPS_GIC with CONFIG_MIPS_CPS] Signed-off-by: Leon Alrae <leon.alrae@imgtec.com>
* target-mips: add CMGCRBase registerYongbok Kim2016-03-302-1/+20
| | | | | | | | | | | Physical base address for the memory-mapped Coherency Manager Global Configuration Register space. The MIPS default location for the GCR_BASE address is 0x1FBF_8. This register only exists if Config3 CMGCR is set to one. Signed-off-by: Yongbok Kim <yongbok.kim@imgtec.com> [leon.alrae@imgtec.com: move CMGCR enabling to a separate patch] Signed-off-by: Leon Alrae <leon.alrae@imgtec.com>
* hw/mips: implement generic MIPS Coherent Processing System containerLeon Alrae2016-03-304-0/+151
| | | | | | | | | Implement generic MIPS Coherent Processing System (CPS) which in this commit just creates VPs, but it will serve as a container also for other components like Global Configuration Registers and Cluster Power Controller. Signed-off-by: Leon Alrae <leon.alrae@imgtec.com>
* Merge remote-tracking branch 'remotes/cody/tags/block-pull-request' into stagingPeter Maydell2016-03-293-8/+28
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | # gpg: Signature made Tue 29 Mar 2016 01:48:09 BST using RSA key ID C0DE3057 # gpg: Good signature from "Jeffrey Cody <jcody@redhat.com>" # gpg: aka "Jeffrey Cody <jeff@codyprime.org>" # gpg: aka "Jeffrey Cody <codyprime@gmail.com>" * remotes/cody/tags/block-pull-request: qemu-iotests: add no-op streaming test qemu-iotests: fix test_stream_partial() block: never cancel a streaming job without running stream_complete() Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
| * qemu-iotests: add no-op streaming testAlberto Garcia2016-03-282-2/+20
| | | | | | | | | | | | | | | | | | | | This patch tests that in a partial block-stream operation, no data is ever copied from the base image. Signed-off-by: Alberto Garcia <berto@igalia.com> Reviewed-by: Max Reitz <mreitz@redhat.com> Message-id: 5272a2aa57bc0b3f981f8b3e0c813e58a88c974b.1458566441.git.berto@igalia.com Signed-off-by: Jeff Cody <jcody@redhat.com>
| * qemu-iotests: fix test_stream_partial()Alberto Garcia2016-03-281-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This test is streaming to the top layer using the intermediate image as the base. This is a mistake since block-stream never copies data from the base image and its backing chain, so this is effectively a no-op. In addition to fixing the base parameter, this patch also writes some data to the intermediate image before the test, so there's something to copy and the test is meaningful. Signed-off-by: Alberto Garcia <berto@igalia.com> Reviewed-by: Max Reitz <mreitz@redhat.com> Message-id: 2efa304da38b32d47c120ce728568a589c5a3afc.1458566441.git.berto@igalia.com Signed-off-by: Jeff Cody <jcody@redhat.com>
| * block: never cancel a streaming job without running stream_complete()Alberto Garcia2016-03-281-5/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We need to call stream_complete() in order to do all the necessary clean-ups, even if there's an early failure. At the moment it's only useful to make sure that s->backing_file_str is not leaked, but it will become more important if we introduce support for streaming to any intermediate node. Signed-off-by: Alberto Garcia <berto@igalia.com> Reviewed-by: Max Reitz <mreitz@redhat.com> Reviewed-by: Fam Zheng <famz@redhat.com> Reviewed-by: Stefan Hajnoczi <stefanha@redhat.com> Message-id: 2abedf2debc65c250560237f31a8e6756883c8fc.1458566441.git.berto@igalia.com Signed-off-by: Jeff Cody <jcody@redhat.com>
* | Merge remote-tracking branch 'remotes/thibault/tags/samuel-thibault' into ↵Peter Maydell2016-03-2911-57/+67
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | staging slirp updates # gpg: Signature made Tue 29 Mar 2016 00:16:05 BST using RSA key ID FB6B2F1D # gpg: Good signature from "Samuel Thibault <samuel.thibault@gnu.org>" # gpg: aka "Samuel Thibault <sthibault@debian.org>" # gpg: aka "Samuel Thibault <samuel.thibault@inria.fr>" # gpg: aka "Samuel Thibault <samuel.thibault@labri.fr>" # gpg: aka "Samuel Thibault <samuel.thibault@ens-lyon.org>" # gpg: WARNING: This key is not certified with sufficiently trusted signatures! # gpg: It is not certain that the signature belongs to the owner. # Primary key fingerprint: 900C B024 B679 31D4 0F82 304B D017 8C76 7D06 9EE6 # Subkey fingerprint: F632 74CD C630 0873 CB3D 29D9 E3E5 1CE8 FB6B 2F1D * remotes/thibault/tags/samuel-thibault: Rework ipv6 options Use C99 flexible array instead of 1-byte trailing array Avoid embedding struct mbuf in other structures slirp: send icmp6 errors when UDP send failed slirp: Fix memory leak on small incoming ipv4 packet Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
| * | Rework ipv6 optionsSamuel Thibault2016-03-293-20/+29
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Rename the recently-added ip6-foo options into ipv6-foo options, to make them coherent with other ipv6 options. Also rework the documentation. Signed-off-by: Samuel Thibault <samuel.thibault@ens-lyon.org> Reviewed-by: Eric Blake <eblake@redhat.com>
| * | Use C99 flexible array instead of 1-byte trailing arrayPeter Maydell2016-03-291-4/+2Star
| | | | | | | | | | | | | | | Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Samuel Thibault <samuel.thibault@ens-lyon.org>
| * | Avoid embedding struct mbuf in other structuresSamuel Thibault2016-03-235-30/+34
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | struct mbuf uses a C99 open char array to allow inlining data. Inlining this in another structure is however a GNU extension. The inlines used so far in struct Slirp were actually only needed as head of struct mbuf lists. This replaces these inline with mere struct quehead, and use casts as appropriate. Signed-off-by: Samuel Thibault <samuel.thibault@ens-lyon.org> Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
| * | slirp: send icmp6 errors when UDP send failedSamuel Thibault2016-03-221-2/+1Star
| | | | | | | | | | | | | | | Signed-off-by: Samuel Thibault <samuel.thibault@ens-lyon.org> Reviewed-by: Thomas Huth <thuth@redhat.com>
| * | slirp: Fix memory leak on small incoming ipv4 packetSamuel Thibault2016-03-221-1/+1
| | | | | | | | | | | | | | | Signed-off-by: Samuel Thibault <samuel.thibault@ens-lyon.org> Reviewed-by: Thomas Huth <thuth@redhat.com>
* | | Merge remote-tracking branch 'remotes/awilliam/tags/vfio-update-20160328.0' ↵Peter Maydell2016-03-291-8/+11
|\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | into staging VFIO updates 2016-03-28 - Use 128bit math to avoid asserts with IOMMU regions (Bandan Das) # gpg: Signature made Mon 28 Mar 2016 23:16:52 BST using RSA key ID 3BB08B22 # gpg: Good signature from "Alex Williamson <alex.williamson@redhat.com>" # gpg: aka "Alex Williamson <alex@shazbot.org>" # gpg: aka "Alex Williamson <alwillia@redhat.com>" # gpg: aka "Alex Williamson <alex.l.williamson@gmail.com>" * remotes/awilliam/tags/vfio-update-20160328.0: vfio: convert to 128 bit arithmetic calculations when adding mem regions Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
| * | | vfio: convert to 128 bit arithmetic calculations when adding mem regionsBandan Das2016-03-281-8/+11
| | |/ | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | vfio_listener_region_add for a iommu mr results in an overflow assert since iommu memory region is initialized with UINT64_MAX. Convert calculations to 128 bit arithmetic for iommu memory regions and let int128_get64 assert for non iommu regions if there's an overflow. Suggested-by: Alex Williamson <alex.williamson@redhat.com> Signed-off-by: Bandan Das <bsd@redhat.com> [missed (end - 1) on 2nd trace call, move llsize closer to use] Signed-off-by: Alex Williamson <alex.williamson@redhat.com>
* | | Merge remote-tracking branch 'remotes/bonzini/tags/for-upstream' into stagingPeter Maydell2016-03-24620-755/+1774
|\ \ \ | |/ / |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * Log filtering from Alex and Peter * Chardev fix from Marc-André * config.status tweak from David * Header file tweaks from Markus, myself and Veronia (Outreachy candidate) * get_ticks_per_sec() removal from Rutuja (Outreachy candidate) * Coverity fix from myself * PKE implementation from myself, based on rth's XSAVE support # gpg: Signature made Thu 24 Mar 2016 20:15:11 GMT using RSA key ID 78C7AE83 # gpg: Good signature from "Paolo Bonzini <bonzini@gnu.org>" # gpg: aka "Paolo Bonzini <pbonzini@redhat.com>" * remotes/bonzini/tags/for-upstream: (28 commits) target-i386: implement PKE for TCG config.status: Pass extra parameters char: translate from QIOChannel error to errno exec: fix error handling in file_ram_alloc cputlb: modernise the debug support qemu-log: support simple pid substitution for logs target-arm: dfilter support for in_asm qemu-log: dfilter-ise exec, out_asm, op and opt_op qemu-log: new option -dfilter to limit output qemu-log: Improve the "exec" TB execution logging qemu-log: Avoid function call for disabled qemu_log_mask logging qemu-log: correct help text for -d cpu tcg: pass down TranslationBlock to tcg_code_gen util: move declarations out of qemu-common.h Replaced get_tick_per_sec() by NANOSECONDS_PER_SECOND hw: explicitly include qemu-common.h and cpu.h include/crypto: Include qapi-types.h or qemu/bswap.h instead of qemu-common.h isa: Move DMA_transfer_handler from qemu-common.h to hw/isa/isa.h Move ParallelIOArg from qemu-common.h to sysemu/char.h Move QEMU_ALIGN_*() from qemu-common.h to qemu/osdep.h ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Conflicts: scripts/clean-includes
| * | target-i386: implement PKE for TCGPaolo Bonzini2016-03-247-5/+110
| | | | | | | | | | | | | | | | | | Tested with kvm-unit-tests. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
| * | config.status: Pass extra parametersDr. David Alan Gilbert2016-03-241-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | This allows you to do: ./config.status --the-option-you-forgot Signed-off-by: Dr. David Alan Gilbert <dgilbert@redhat.com> Message-Id: <1452599928-7471-1-git-send-email-dgilbert@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
| * | char: translate from QIOChannel error to errnoMarc-André Lureau2016-03-221-0/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Caller of CharDriverState.chr* callback assume errno error conventions. Translate QIOChannel error to errno (this fixes potential EAGAIN regression, for ex if a vhost-user backend block, qemu_chr_fe_read_all() could get error -2 and not wait) Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Message-Id: <1457718924-19338-1-git-send-email-marcandre.lureau@redhat.com> Reviewed-by: Daniel P. Berrange <berrange@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
| * | exec: fix error handling in file_ram_allocPaolo Bonzini2016-03-221-3/+4
| | | | | | | | | | | | | | | | | | | | | | | | One instance of double closing, and invalid close(-1) in some cases of "goto error". Reviewed-by: Laszlo Ersek <lersek@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
| * | cputlb: modernise the debug supportAlex Bennée2016-03-221-44/+44
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | To avoid cluttering the code with #ifdef legs we wrap up the print statements into a tlb_debug() macro. As access to the virtual TLB can get quite heavy defining DEBUG_TLB_LOG will ensure all the logs go to the qemu_log target of CPU_LOG_MMU instead of stderr. This remains compile time optional as these debug statements haven't been considered for usefulness for user visible logging. I've also removed DEBUG_TLB_CHECK which wasn't used. Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Richard Henderson <rth@twiddle.net> Message-Id: <1458052224-9316-11-git-send-email-alex.bennee@linaro.org> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
| * | qemu-log: support simple pid substitution for logsAlex Bennée2016-03-222-3/+54
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When debugging stuff that occurs over several forks it would be useful not to keep overwriting the one logfile you've set-up. This allows a simple %d to be included once in the logfile parameter which is substituted with getpid(). As the test cases involve checking user output they need g_test_trap_subprocess() support. As a result they are currently skipped on Travis builds due to the older glib involved. Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Leandro Dorileo <l@dorileo.org> Reviewed-by: Aurelien Jarno <aurelien@aurel32.net> Reviewed-by: Richard Henderson <rth@twiddle.net> Message-Id: <1458052224-9316-10-git-send-email-alex.bennee@linaro.org> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
| * | target-arm: dfilter support for in_asmAlex Bennée2016-03-222-2/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Each individual architecture needs to use the qemu_log_in_addr_range() feature for enabling in_asm output as it is part of the frontend. Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Aurelien Jarno <aurelien@aurel32.net> Reviewed-by: Richard Henderson <rth@twiddle.net> Message-Id: <1458052224-9316-9-git-send-email-alex.bennee@linaro.org> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
| * | qemu-log: dfilter-ise exec, out_asm, op and opt_opAlex Bennée2016-03-225-12/+33
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This ensures the code generation debug code will honour -dfilter if set. For the "exec" tracing I've added a new inline macro for efficiency's sake. Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Aurelien Jarno <aurelien@aureL32.net> Reviewed-by: Richard Henderson <rth@twiddle.net> Message-Id: <1458052224-9316-8-git-send-email-alex.bennee@linaro.org> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
| * | qemu-log: new option -dfilter to limit outputAlex Bennée2016-03-226-0/+221
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When debugging big programs or system emulation sometimes you want both the verbosity of cpu,exec et all but don't want to generate lots of logs for unneeded stuff. This patch adds a new option -dfilter which allows you to specify interesting address ranges in the form: -dfilter 0x8000..0x8fff,0xffffffc000080000+0x200,... Then logging code can use the new qemu_log_in_addr_range() function to decide if it will output logging information for the given range. Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <1458052224-9316-7-git-send-email-alex.bennee@linaro.org> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
| * | qemu-log: Improve the "exec" TB execution loggingPeter Maydell2016-03-222-9/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Improve the TB execution logging so that it is easier to identify what is happening from trace logs: * move the "Trace" logging of executed TBs into cpu_tb_exec() so that it is emitted if and only if we actually execute a TB, and for consistency for the CPU state logging * log when we link two TBs together via tb_add_jump() * log when cpu_tb_exec() returns early from a chain of TBs The new style logging looks like this: Trace 0x7fb7cc822ca0 [ffffffc0000dce00] Linking TBs 0x7fb7cc822ca0 [ffffffc0000dce00] index 0 -> 0x7fb7cc823110 [ffffffc0000dce10] Trace 0x7fb7cc823110 [ffffffc0000dce10] Trace 0x7fb7cc823420 [ffffffc000302688] Trace 0x7fb7cc8234a0 [ffffffc000302698] Trace 0x7fb7cc823520 [ffffffc0003026a4] Trace 0x7fb7cc823560 [ffffffc0000dce44] Linking TBs 0x7fb7cc823560 [ffffffc0000dce44] index 1 -> 0x7fb7cc8235d0 [ffffffc0000dce70] Trace 0x7fb7cc8235d0 [ffffffc0000dce70] Stopped execution of TB chain before 0x7fb7cc8235d0 [ffffffc0000dce70] Trace 0x7fb7cc8235d0 [ffffffc0000dce70] Trace 0x7fb7cc822fd0 [ffffffc0000dd52c] Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> [AJB: reword patch title, Abandoned->Stopped] Reviewed-by: Aurelien Jarno <aurelien@aurel32.net> Reviewed-by: Richard Henderson <rth@twiddle.net> Message-Id: <1458052224-9316-6-git-send-email-alex.bennee@linaro.org> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
| * | qemu-log: Avoid function call for disabled qemu_log_mask loggingPeter Maydell2016-03-222-14/+10Star
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Make qemu_log_mask() a macro which only calls the function to do the actual work if the logging is enabled. This avoids making a function call in possible fast paths where logging is disabled. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
| * | qemu-log: correct help text for -d cpuAlex Bennée2016-03-221-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This doesn't just dump CPU state on translation but on every block entrance. Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Andreas Färber <afaerber@suse.de> Reviewed-by: Richard Henderson <rth@twiddle.net> Message-Id: <1458052224-9316-4-git-send-email-alex.bennee@linaro.org> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
| * | tcg: pass down TranslationBlock to tcg_code_genAlex Bennée2016-03-223-5/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | My later debugging patches need access to the origin PC which is held in the TranslationBlock structure. Pass down the whole structure as it also holds the information about the code start point. Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Richard Henderson <rth@twiddle.net> Message-Id: <1458052224-9316-3-git-send-email-alex.bennee@linaro.org> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
| * | util: move declarations out of qemu-common.hVeronia Bahaa2016-03-22149-300/+435
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Move declarations out of qemu-common.h for functions declared in utils/ files: e.g. include/qemu/path.h for utils/path.c. Move inline functions out of qemu-common.h and into new files (e.g. include/qemu/bcd.h) Signed-off-by: Veronia Bahaa <veroniabahaa@gmail.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
| * | Replaced get_tick_per_sec() by NANOSECONDS_PER_SECONDRutuja Shah2016-03-2253-134/+143
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch replaces get_ticks_per_sec() calls with the macro NANOSECONDS_PER_SECOND. Also, as there are no callers, get_ticks_per_sec() is then removed. This replacement improves the readability and understandability of code. For example, timer_mod(fdctrl->result_timer, qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) + (get_ticks_per_sec() / 50)); NANOSECONDS_PER_SECOND makes it obvious that qemu_clock_get_ns matches the unit of the expression on the right side of the plus. Signed-off-by: Rutuja Shah <rutu.shah.26@gmail.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
| * | hw: explicitly include qemu-common.h and cpu.hPaolo Bonzini2016-03-2285-1/+164
| | | | | | | | | | | | Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
| * | include/crypto: Include qapi-types.h or qemu/bswap.h instead of qemu-common.hMarkus Armbruster2016-03-229-6/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | qemu-common.h should only be included by .c files. Its file comment explains why: "No header file should depend on qemu-common.h, as this would easily lead to circular header dependencies." Several include/crypto/ headers include qemu-common.h, but either need just qapi-types.h from it, or qemu/bswap.h, or nothing at all. Replace or drop the include accordingly. tests/test-crypto-secret.c now misses qemu/module.h, so include it there. Signed-off-by: Markus Armbruster <armbru@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
| * | isa: Move DMA_transfer_handler from qemu-common.h to hw/isa/isa.hMarkus Armbruster2016-03-224-5/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | DMA_transfer_handler is actually an ISA thing, and as such has no business in qemu-common.h. Move it to hw/isa/isa.h, and rename it to IsaDmaTransferHandler. Signed-off-by: Markus Armbruster <armbru@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
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