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* target/riscv: Implement the stval/mtval illegal instructionAlistair Francis2022-01-083-0/+8
* target/riscv: Fixup setting GVAAlistair Francis2022-01-081-15/+6Star
* target/riscv: Set the opcode in DisasContextAlistair Francis2022-01-081-0/+2
* target/riscv: actual functions to realize crs 128-bit insnsFrédéric Pétrot2022-01-083-30/+175
* target/riscv: modification of the trans_csrxx for 128-bit supportFrédéric Pétrot2022-01-081-43/+158
* target/riscv: helper functions to wrap calls to 128-bit csr insnsFrédéric Pétrot2022-01-084-0/+69
* target/riscv: adding high part of some csrsFrédéric Pétrot2022-01-082-0/+6
* target/riscv: support for 128-bit M extensionFrédéric Pétrot2022-01-086-13/+295
* target/riscv: support for 128-bit arithmetic instructionsFrédéric Pétrot2022-01-085-49/+222
* target/riscv: support for 128-bit shift instructionsFrédéric Pétrot2022-01-084-44/+270
* target/riscv: support for 128-bit U-type instructionsFrédéric Pétrot2022-01-082-4/+25
* target/riscv: support for 128-bit bitwise instructionsFrédéric Pétrot2022-01-081-2/+19
* target/riscv: accessors to registers upper part and 128-bit load/storeFrédéric Pétrot2022-01-084-10/+163
* target/riscv: moving some insns close to similar insnsFrédéric Pétrot2022-01-081-17/+17
* target/riscv: setup everything for rv64 to support rv128 executionFrédéric Pétrot2022-01-085-0/+32
* target/riscv: array for the 64 upper bits of 128-bit registersFrédéric Pétrot2022-01-084-1/+35
* target/riscv: separation of bitwise logic and arithmetic helpersFrédéric Pétrot2022-01-083-9/+36
* target/riscv: additional macros to check instruction supportFrédéric Pétrot2022-01-081-4/+16
* qemu/int128: addition of div/rem 128-bit operationsFrédéric Pétrot2022-01-083-0/+175
* exec/memop: Adding signed quad and octo definesFrédéric Pétrot2022-01-081-0/+7
* exec/memop: Adding signedness to quad definitionsFrédéric Pétrot2022-01-0847-311/+311
* target/riscv: Fix position of 'experimental' commentPhilipp Tomsich2022-01-081-1/+2
* target/riscv: rvv-1.0: Call the correct RVF/RVD check function for narrowing ...Frank Chang2022-01-081-8/+24
* target/riscv: rvv-1.0: Call the correct RVF/RVD check function for widening f...Frank Chang2022-01-081-9/+25
* target/riscv: rvv-1.0: Call the correct RVF/RVD check function for widening f...Frank Chang2022-01-081-4/+8
* roms/opensbi: Upgrade from v0.9 to v1.0Bin Meng2022-01-085-0/+0
* hw/riscv: virt: Allow support for 32 coresAlistair Francis2022-01-081-1/+1
* hw/riscv: Use error_fatal for SoC realisationAlistair Francis2022-01-084-4/+4
* target/riscv: Enable the Hypervisor extension by defaultAlistair Francis2022-01-081-1/+1
* target/riscv: Mark the Hypervisor extension as non experimentalAlistair Francis2022-01-081-1/+1
* hw/intc: sifive_plic: Cleanup remaining functionsAlistair Francis2022-01-081-87/+22Star
* hw/intc: sifive_plic: Cleanup the read functionAlistair Francis2022-01-081-44/+11Star
* hw/intc: sifive_plic: Cleanup the write functionAlistair Francis2022-01-081-49/+27Star
* hw/intc: sifive_plic: Add a reset functionAlistair Francis2022-01-081-0/+18
* hw/dma: sifive_pdma: permit 4/8-byte access size of PDMA registersJim Shu2022-01-081-0/+4
* hw/dma: sifive_pdma: support high 32-bit access of 64-bit registerJim Shu2022-01-081-22/+155
* target/riscv/pmp: fix no pmp illegal intrsNikita Shubin2022-01-081-1/+2
* Merge tag 'for_upstream' of git://git.kernel.org/pub/scm/virt/kvm/mst/qemu in...Richard Henderson2022-01-0856-493/+1202
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| * tests: acpi: Add updated TPM related tablesStefan Berger2022-01-083-2/+0Star
| * acpi: tpm: Add missing device identification objectsStefan Berger2022-01-082-0/+8
| * tests: acpi: prepare for updated TPM related tablesStefan Berger2022-01-081-0/+2
| * virtio/vhost-vsock: don't double close vhostfd, remove redundant cleanupDaniil Tatianin2022-01-081-6/+5Star
| * hw/scsi/vhost-scsi: don't double close vhostfd on errorDaniil Tatianin2022-01-081-1/+8
| * hw/scsi/vhost-scsi: don't leak vqs on errorDaniil Tatianin2022-01-081-2/+4
| * docs: reSTify virtio-balloon-stats documentation and move to docs/interopThomas Huth2022-01-083-28/+32
| * hw/i386/pc: Add missing property descriptionsThomas Huth2022-01-081-0/+8
| * acpihp: simplify acpi_pcihp_disable_root_busAni Sinha2022-01-081-7/+2Star
| * tests: acpi: SLIC: update expected blobsIgor Mammedov2022-01-083-2/+0Star
| * tests: acpi: add SLIC table testIgor Mammedov2022-01-081-0/+15
| * tests: acpi: whitelist expected blobs before changing themIgor Mammedov2022-01-083-0/+2
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