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* qdev: Make bit_prop_set() get Object* argumentEduardo Habkost2020-12-151-4/+6
| | | | | | | | | Make the code more generic and not specific to TYPE_DEVICE. Signed-off-by: Eduardo Habkost <ehabkost@redhat.com> Reviewed-by: Marc-André Lureau <marcandre.lureau@redhat.com> Message-Id: <20201211220529.2290218-9-ehabkost@redhat.com> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
* qdev: Make PropertyInfo.print method get Object* argumentEduardo Habkost2020-12-153-4/+4
| | | | | | | | | Make the code more generic and not specific to TYPE_DEVICE. Signed-off-by: Eduardo Habkost <ehabkost@redhat.com> Reviewed-by: Marc-André Lureau <marcandre.lureau@redhat.com> Message-Id: <20201211220529.2290218-8-ehabkost@redhat.com> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
* qdev: Don't use dev->id on set_size32() error messageEduardo Habkost2020-12-151-1/+1
| | | | | | | | | | | All other qdev property error messages use "<type>.<property>" instead of "<id>.<property>". Change set_size32() for consistency, and to make the code not specific to TYPE_DEVICE. Signed-off-by: Eduardo Habkost <ehabkost@redhat.com> Reviewed-by: Marc-André Lureau <marcandre.lureau@redhat.com> Message-Id: <20201211220529.2290218-7-ehabkost@redhat.com> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
* sparc: Check dev->realized at sparc_set_nwindows()Eduardo Habkost2020-12-151-0/+6
| | | | | | | | | | | sparc_set_nwindows() is one of the very few property setters that don't check dev->realized, and there's no reason for it to be special. Check dev->realized like the other setters. Signed-off-by: Eduardo Habkost <ehabkost@redhat.com> Reviewed-by: Marc-André Lureau <marcandre.lureau@redhat.com> Message-Id: <20201211220529.2290218-6-ehabkost@redhat.com> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
* qdev: Check dev->realized at set_size()Eduardo Habkost2020-12-151-0/+5
| | | | | | | | | | | | This setter is one of the very few property setters that don't check dev->realized, and there's no reason to make size properties different from the rest. Add the missing check. Fixes: e8cd45c78f53 ("qdev: Add SIZE type to qdev properties") Signed-off-by: Eduardo Habkost <ehabkost@redhat.com> Reviewed-by: Marc-André Lureau <marcandre.lureau@redhat.com> Message-Id: <20201211220529.2290218-5-ehabkost@redhat.com> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
* qdev: Move property code to qdev-properties.[ch]Eduardo Habkost2020-12-155-157/+159
| | | | | | | | | | Move everything related to Property and PropertyInfo to qdev-properties.[ch] to make it easier to refactor that code. Signed-off-by: Eduardo Habkost <ehabkost@redhat.com> Reviewed-by: Marc-André Lureau <marcandre.lureau@redhat.com> Message-Id: <20201211220529.2290218-4-ehabkost@redhat.com> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
* cpu: Move cpu_common_props to hw/core/cpu.cEduardo Habkost2020-12-153-16/+15Star
| | | | | | | | | | | There's no reason to keep the property list separate from the CPU class code. Move the variable to hw/core/cpu.c and make it static. Signed-off-by: Eduardo Habkost <ehabkost@redhat.com> Reviewed-by: Marc-André Lureau <marcandre.lureau@redhat.com> Message-Id: <20201211220529.2290218-3-ehabkost@redhat.com> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
* cs4231: Get rid of empty property arrayEduardo Habkost2020-12-151-5/+0Star
| | | | | | | | | | An empty props array is unnecessary, we can just not call device_class_set_props(). Signed-off-by: Eduardo Habkost <ehabkost@redhat.com> Reviewed-by: Marc-André Lureau <marcandre.lureau@redhat.com> Message-Id: <20201211220529.2290218-2-ehabkost@redhat.com> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
* netfilter: Use class propertiesEduardo Habkost2020-12-155-42/+39Star
| | | | | | | | | Instance properties make introspection hard and are not shown by "-object ...,help". Convert them to class properties. Signed-off-by: Eduardo Habkost <ehabkost@redhat.com> Message-Id: <20201111183823.283752-12-ehabkost@redhat.com> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
* netfilter: Reorder functionsEduardo Habkost2020-12-152-28/+28
| | | | | | | | | Trivial code reordering in some filter backends, to make the next changes easier to review. Signed-off-by: Eduardo Habkost <ehabkost@redhat.com> Message-Id: <20201111183823.283752-11-ehabkost@redhat.com> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
* can_host: Use class propertiesEduardo Habkost2020-12-151-11/+5Star
| | | | | | | | | | Instance properties make introspection hard and are not shown by "-object ...,help". Convert them to class properties. Signed-off-by: Eduardo Habkost <ehabkost@redhat.com> Tested-by: Pavel Pisa <pisa@cmp.felk.cvut.cz> Message-Id: <20201111183823.283752-9-ehabkost@redhat.com> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
* arm/cpu64: Register "aarch64" as class propertyEduardo Habkost2020-12-151-10/+6Star
| | | | | | | | | | Class properties make QOM introspection simpler and easier, as they don't require an object to be instantiated. Signed-off-by: Eduardo Habkost <ehabkost@redhat.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-Id: <20201111183823.283752-8-ehabkost@redhat.com> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
* virt: Register "its" as class propertyEduardo Habkost2020-12-151-5/+7
| | | | | | | | | | | | | | | Class properties make QOM introspection simpler and easier, as they don't require an object to be instantiated. Note: "its" is currently registered conditionally, but this makes the feature be registered unconditionally. The only side effect is that it will be now possible to set its=on on virt-2.7 and older. Signed-off-by: Eduardo Habkost <ehabkost@redhat.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-Id: <20201111183823.283752-7-ehabkost@redhat.com> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
* arm/virt: Register most properties as class propertiesEduardo Habkost2020-12-151-35/+41
| | | | | | | | | | Class properties make QOM introspection simpler and easier, as they don't require an object to be instantiated. Signed-off-by: Eduardo Habkost <ehabkost@redhat.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-Id: <20201111183823.283752-6-ehabkost@redhat.com> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
* i386: Register feature bit properties as class propertiesEduardo Habkost2020-12-151-24/+16Star
| | | | | | | | | | | | | | Class properties make QOM introspection simpler and easier, as they don't require an object to be instantiated. Also, the hundreds of instance properties were having an impact on QMP commands that create temporary CPU objects. On my machine, run time of qmp_query_cpu_definitions() changed from ~200ms to ~16ms after applying this patch. Signed-off-by: Eduardo Habkost <ehabkost@redhat.com> Message-Id: <20201111183823.283752-5-ehabkost@redhat.com> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
* tmp421: Register properties as class propertiesEduardo Habkost2020-12-141-17/+13Star
| | | | | | | | | | Class properties make QOM introspection simpler and easier, as they don't require an object to be instantiated. Signed-off-by: Eduardo Habkost <ehabkost@redhat.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-Id: <20201111183823.283752-4-ehabkost@redhat.com> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
* vexpress-a15: Register "virtualization" as class propertyEduardo Habkost2020-12-141-6/+8
| | | | | | | | | | Class properties make QOM introspection simpler and easier, as they don't require an object to be instantiated. Signed-off-by: Eduardo Habkost <ehabkost@redhat.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-Id: <20201111183823.283752-3-ehabkost@redhat.com> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
* vexpress: Register "secure" as class propertyEduardo Habkost2020-12-141-5/+6
| | | | | | | | | | Class properties make QOM introspection simpler and easier, as they don't require an object to be instantiated. Signed-off-by: Eduardo Habkost <ehabkost@redhat.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-Id: <20201111183823.283752-2-ehabkost@redhat.com> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
* Merge remote-tracking branch 'remotes/dg-gitlab/tags/ppc-for-6.0-20201214' ↵Peter Maydell2020-12-1430-342/+478
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | into staging ppc patch queue 2020-12-14 Here's my first pull request for qemu-6.0, with a bunch of things queued over the freeze. Highlights are: * A bunch of cleanups to hotplug error paths from Greg Kurz * A number of TCG fixes from new contributor Giuseppe Musacchio * Added Greg Kurz as co-maintainer * Assorted other bugfixes and cleanups This supersedes ppc-for-6.0-20201211, the only change are some patch authors to better match qemu conventions. # gpg: Signature made Mon 14 Dec 2020 04:57:09 GMT # gpg: using RSA key 75F46586AE61A66CC44E87DC6C38CACA20D9B392 # gpg: Good signature from "David Gibson <david@gibson.dropbear.id.au>" [full] # gpg: aka "David Gibson (Red Hat) <dgibson@redhat.com>" [full] # gpg: aka "David Gibson (ozlabs.org) <dgibson@ozlabs.org>" [full] # gpg: aka "David Gibson (kernel.org) <dwg@kernel.org>" [unknown] # Primary key fingerprint: 75F4 6586 AE61 A66C C44E 87DC 6C38 CACA 20D9 B392 * remotes/dg-gitlab/tags/ppc-for-6.0-20201214: (30 commits) spapr.c: set a 'kvm-type' default value instead of relying on NULL spapr: Pass sPAPR machine state to some RTAS events handling functions spapr: Don't use qdev_get_machine() in spapr_msi_write() spapr: Pass sPAPR machine state down to spapr_pci_switch_vga() target/ppc: Introduce an mmu_is_64bit() helper ppc/translate: Use POWERPC_MMU_64 to detect 64-bit MMU models ppc/e500: Free irqs array to avoid memleak MAINTAINERS: Add Greg Kurz as co-maintainer for ppc hw/ppc: Do not re-read the clock on pre_save if doing savevm target/ppc: Remove "compat" property of server class POWER CPUs spapr: spapr_drc_attach() cannot fail spapr: Simplify error path of spapr_core_plug() spapr: Abort if ppc_set_compat() fails for hot-plugged CPUs spapr: Fix pre-2.10 dummy ICP hack xive: Add trace events hw/ppc/spapr_tpm_proxy: Fix hexadecimal format string specifier ppc/translate: Rewrite gen_lxvdsx to use gvec primitives ppc/translate: Raise exceptions after setting the cc ppc/translate: Delay NaN checking after comparison ppc/translate: Turn the helper macros into functions ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
| * spapr.c: set a 'kvm-type' default value instead of relying on NULLDaniel Henrique Barboza2020-12-141-4/+17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | spapr_kvm_type() is considering 'vm_type=NULL' as a valid input, where the function returns 0. This is relying on the current QEMU machine options handling logic, where the absence of the 'kvm-type' option will be reflected as 'vm_type=NULL' in this function. This is not robust, and will break if QEMU options code decides to propagate something else in the case mentioned above (e.g. an empty string instead of NULL). Let's avoid this entirely by setting a non-NULL default value in case of no user input for 'kvm-type'. spapr_kvm_type() was changed to handle 3 fixed values of kvm-type: "auto", "hv", and "pr", with "auto" being the default if no kvm-type was set by the user. This allows us to always be predictable regardless of any enhancements/changes made in QEMU options mechanics. While we're at it, let's also document in 'kvm-type' description the already existing default mode, now named 'auto'. The information provided about it is based on how the pseries kernel handles the KVM_CREATE_VM ioctl(), where the default value '0' makes the kernel choose an available KVM module to use, giving precedence to kvm_hv. This logic is described in the kernel source file arch/powerpc/kvm/powerpc.c, function kvm_arch_init_vm(). Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com> Message-Id: <20201210145517.1532269-2-danielhb413@gmail.com> Signed-off-by: David Gibson <david@gibson.dropbear.id.au> Reviewed-by: Greg Kurz <groug@kaod.org>
| * spapr: Pass sPAPR machine state to some RTAS events handling functionsGreg Kurz2020-12-141-11/+10Star
| | | | | | | | | | | | | | | | | | | | Some functions in hw/ppc/spapr_events.c get a pointer to the machine state using qdev_get_machine(). Convert them to get it from their caller when possible. Signed-off-by: Greg Kurz <groug@kaod.org> Message-Id: <20201209170052.1431440-6-groug@kaod.org> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
| * spapr: Don't use qdev_get_machine() in spapr_msi_write()Greg Kurz2020-12-141-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | spapr_phb_realize() passes the sPAPR machine state as opaque data for the I/O callbacks: memory_region_init_io(&sphb->msiwindow, OBJECT(sphb), &spapr_msi_ops, spapr, ^^^^^ "msi", msi_window_size); Signed-off-by: Greg Kurz <groug@kaod.org> Message-Id: <20201209170052.1431440-5-groug@kaod.org> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
| * spapr: Pass sPAPR machine state down to spapr_pci_switch_vga()Greg Kurz2020-12-143-6/+6
| | | | | | | | | | | | | | | | This allows to drop a user of qdev_get_machine(). Signed-off-by: Greg Kurz <groug@kaod.org> Message-Id: <20201209170052.1431440-4-groug@kaod.org> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
| * target/ppc: Introduce an mmu_is_64bit() helperGreg Kurz2020-12-147-12/+17
| | | | | | | | | | | | | | | | | | Callers don't really need to know how 64-bit MMU model enums are computed. Hide this in a helper. Signed-off-by: Greg Kurz <groug@kaod.org> Message-Id: <20201209173536.1437351-3-groug@kaod.org> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
| * ppc/translate: Use POWERPC_MMU_64 to detect 64-bit MMU modelsStephane Duverger2020-12-141-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The ppc_tr_init_disas_context() function currently checks whether the MMU is 64-bit by ANDing its model type with POWERPC_MMU_64B. This is wrong : POWERPC_MMU_64B isn't a mask, it is the generic MMU model for pre-PowerISA-2.03 64-bit CPUs (ie. PowerPC 970 in QEMU). Use POWERPC_MMU_64 instead of POWERPC_MMU_64B. This should fix a potential bug with some 32-bit CPUs for which 'need_access_type' was mis-computed because (POWERPC_MMU_32B & POWERPC_MMU_64B) happens to be equal to 1. The end result being a crash in ppc_hash32_direct_store() because the access type isn't set: cpu_abort(cs, "ERROR: instruction should not need " "address translation\n"); This doesn't change anything for 'lazy_tlb_flush' since POWERPC_MMU_32B is checked first. Fixes: 5f2a6254522b ("ppc: Don't set access_type on all load/stores on hash64") Signed-off-by: Stephane Duverger <stephane.duverger@free.fr> [groug: - extended patch to address another misuse of POWERPC_MMU_64B - updated title and changelog accordingly] Signed-off-by: Greg Kurz <groug@kaod.org> Message-Id: <20201209173536.1437351-2-groug@kaod.org> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
| * ppc/e500: Free irqs array to avoid memleakGan Qixin2020-12-141-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When running qom-test, a memory leak occurred in the ppce500_init function, this patch free irqs array to fix it. ASAN shows memory leak stack: Direct leak of 40 byte(s) in 1 object(s) allocated from: #0 0xfffc5ceee1f0 in __interceptor_calloc (/lib64/libasan.so.5+0xee1f0) #1 0xfffc5c806800 in g_malloc0 (/lib64/libglib-2.0.so.0+0x56800) #2 0xaaacf9999244 in ppce500_init qemu/hw/ppc/e500.c:859 #3 0xaaacf97434e8 in machine_run_board_init qemu/hw/core/machine.c:1134 #4 0xaaacf9c9475c in qemu_init qemu/softmmu/vl.c:4369 #5 0xaaacf94785a0 in main qemu/softmmu/main.c:49 Reported-by: Euler Robot <euler.robot@huawei.com> Signed-off-by: Gan Qixin <ganqixin@huawei.com> Message-Id: <20201204075822.359832-1-ganqixin@huawei.com> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
| * MAINTAINERS: Add Greg Kurz as co-maintainer for ppcDavid Gibson2020-12-141-1/+16
| | | | | | | | | | | | | | | | | | Greg has agreed to be co-maintainer of the ppc target and machines. This should avoid repeats of the problem we had in qemu-5.2 where a last minute fix was needed while I was on holiday. Signed-off-by: David Gibson <david@gibson.dropbear.id.au> Acked-by: Greg Kurz <groug@kaod.org>
| * hw/ppc: Do not re-read the clock on pre_save if doing savevmGreg Kurz2020-12-141-2/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | A guest with enough RAM, eg. 128G, is likely to detect savevm downtime and to complain about stalled CPUs. This happens because we re-read the timebase just before migrating it and we thus don't account for all the time between VM stop and pre-save. A very similar situation was already addressed for live migration of paused guests (commit d14f33976282). Extend the logic to do the same with savevm. Fixes: https://bugzilla.redhat.com/show_bug.cgi?id=1893787 Signed-off-by: Greg Kurz <groug@kaod.org> Message-Id: <160693010619.1111945.632640981169395440.stgit@bahia.lan> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
| * target/ppc: Remove "compat" property of server class POWER CPUsGreg Kurz2020-12-142-66/+0Star
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This property has been deprecated since QEMU 5.0 by commit 22062e54bb68. We only kept a legacy hack that internally converts "compat" into the official "max-cpu-compat" property of the pseries machine type. According to our deprecation policy, we could have removed it for QEMU 5.2 already. Do it now ; since ppc_cpu_parse_featurestr() now just calls the generic parent_parse_features handler, drop it as well. Users are supposed to use the "max-cpu-compat" property of the pseries machine type instead. Signed-off-by: Greg Kurz <groug@kaod.org> Message-Id: <20201201131103.897430-1-groug@kaod.org> Reviewed-by: Ján Tomko <jtomko@redhat.com> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
| * spapr: spapr_drc_attach() cannot failGreg Kurz2020-12-145-12/+14
| | | | | | | | | | | | | | | | | | | | All users are passing &error_abort already. Document the fact that spapr_drc_attach() should only be passed a free DRC, which is supposedly the case if appropriate checking is done earlier. Signed-off-by: Greg Kurz <groug@kaod.org> Message-Id: <20201201113728.885700-5-groug@kaod.org> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
| * spapr: Simplify error path of spapr_core_plug()Greg Kurz2020-12-141-11/+10Star
| | | | | | | | | | | | | | | | | | | | | | | | | | | | spapr_core_pre_plug() already guarantees that the slot for the given core ID is available. It is thus safe to assume that spapr_find_cpu_slot() returns a slot during plug. Turn the error path into an assertion. It is also safe to assume that no device is attached to the corresponding DRC and that spapr_drc_attach() shouldn't fail. Pass &error_abort to spapr_drc_attach() and simplify error handling. Signed-off-by: Greg Kurz <groug@kaod.org> Message-Id: <20201201113728.885700-4-groug@kaod.org> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
| * spapr: Abort if ppc_set_compat() fails for hot-plugged CPUsGreg Kurz2020-12-141-6/+4Star
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When a CPU is hot-plugged, we set its compat mode to match the boot CPU, which was either set by machine reset or by CAS. This is currently handled in the plug handler after the core got realized. Potential errors of ppc_set_compat() are propagated to the hot-plug logic. Handling errors this late in the hot-plug sequence is generally frown upon. Ideally, we should do sanity checks in a pre-plug handler and pass &error_abort to ppc_set_compat() in the plug handler. We can filter out some error cases of ppc_set_compat() by calling ppc_check_compat() at pre-plug. But ppc_set_compat() also sets the compat register in KVM, and KVM doesn't provide any API that would allow to check valid compat mode settings beforehand. However, at this point we know that the compat mode was already successfully set for the boot CPU. Since this all boils down to setting a register with the very same value that was valid for the boot CPU, it should definitely not fail for hot-plugged CPUS. Pass &error_abort to ppc_set_compat(). Signed-off-by: Greg Kurz <groug@kaod.org> Message-Id: <20201201113728.885700-3-groug@kaod.org> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
| * spapr: Fix pre-2.10 dummy ICP hackGreg Kurz2020-12-141-7/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This hack registers dummy VMState entries of ICPs in order to support migration of old pseries machine types that used to create all smp.max_cpus possible ICPs at machine init. Part of the work is to unregister the dummy entries when plugging an actual vCPU core, and to register them back when unplugging the core. The code that unregisters the dummy ICPs in spapr_core_plug() is misplaced: if ppc_set_compat() fails afterwards, the hotplug operation will be cancelled and the dummy ICPs won't be registered back since the unplug handler isn't called. Unregister the dummy ICPs at the end of spapr_core_plug(). Signed-off-by: Greg Kurz <groug@kaod.org> Message-Id: <20201201113728.885700-2-groug@kaod.org> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
| * xive: Add trace eventsCédric Le Goater2020-12-144-3/+108
| | | | | | | | | | | | | | | | | | | | | | I have been keeping those logging messages in an ugly form for while. Make them clean ! Beware not to activate all of them, this is really verbose. Signed-off-by: Cédric Le Goater <clg@kaod.org> Message-Id: <20201123163717.1368450-1-clg@kaod.org> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
| * hw/ppc/spapr_tpm_proxy: Fix hexadecimal format string specifierPhilippe Mathieu-Daudé2020-12-141-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | The '%u' conversion specifier is for decimal notation. When prefixing a format with '0x', we want the hexadecimal specifier ('%x'). Inspired-by: Dov Murik <dovmurik@linux.vnet.ibm.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com> Message-Id: <20201103112558.2554390-4-philmd@redhat.com> Reviewed-by: Greg Kurz <groug@kaod.org> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
| * ppc/translate: Rewrite gen_lxvdsx to use gvec primitivesGiuseppe Musacchio2020-12-141-23/+23
| | | | | | | | | | | | | | | | | | | | | | | | | | Make the implementation match the lxvwsx one. The code is now shorter smaller and potentially faster as the translation will use the host SIMD capabilities if available. No functional change. Signed-off-by: Giuseppe Musacchio <thatlemon@gmail.com> Message-Id: <a463dea379da4cb3a22de49c678932f74fb15dd7.1604912739.git.thatlemon@gmail.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
| * ppc/translate: Raise exceptions after setting the ccGiuseppe Musacchio2020-12-141-14/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | The PowerISA reference states that the comparison operators update the FPCC, CR and FPSCR and, if VE=1, jump to the exception handler. Moving the exception-triggering code after the CC update sequence solves the problem. Signed-off-by: Giuseppe Musacchio <thatlemon@gmail.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20201112230130.65262-5-thatlemon@gmail.com> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
| * ppc/translate: Delay NaN checking after comparisonGiuseppe Musacchio2020-12-141-38/+42
| | | | | | | | | | | | | | | | | | | | | | Since we always perform a comparison between the two operands avoid checking for NaN unless the result states they're unordered. Suggested-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Giuseppe Musacchio <thatlemon@gmail.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20201112230130.65262-4-thatlemon@gmail.com> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
| * ppc/translate: Turn the helper macros into functionsGiuseppe Musacchio2020-12-141-105/+123
| | | | | | | | | | | | | | | | Suggested-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Giuseppe Musacchio <thatlemon@gmail.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20201112230130.65262-3-thatlemon@gmail.com> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
| * ppc/translate: Fix unordered f64/f128 comparisonsGiuseppe Musacchio2020-12-141-10/+22
| | | | | | | | | | | | | | | | | | | | | | | | | | | | According to the PowerISA v3.1 reference, Table 68 "Actions for xscmpudp - Part 1: Compare Unordered", whenever one of the two operands is a NaN the SO bit is set while the other three bits are cleared. Apply the same change to xscmpuqp. The respective ordered counterparts are unaffected. Signed-off-by: Giuseppe Musacchio <thatlemon@gmail.com> Message-Id: <20201112230130.65262-2-thatlemon@gmail.com> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
| * ppc: Add a missing break for PPC6xx_INPUT_TBENChen Qun2020-12-141-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When using -Wimplicit-fallthrough in our CFLAGS, the compiler showed warning: hw/ppc/ppc.c: In function ‘ppc6xx_set_irq’: hw/ppc/ppc.c:118:16: warning: this statement may fall through [-Wimplicit-fallthrough=] 118 | if (level) { | ^ hw/ppc/ppc.c:123:9: note: here 123 | case PPC6xx_INPUT_INT: | ^~~~ According to the discussion, a break statement needs to be added here. Reported-by: Euler Robot <euler.robot@huawei.com> Signed-off-by: Chen Qun <kuhn.chenqun@huawei.com> Reviewed-by: Thomas Huth <thuth@redhat.com> Acked-by: David Gibson <david@gibson.dropbear.id.au> Message-Id: <20201116024810.2415819-7-kuhn.chenqun@huawei.com> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
| * target/ppc: replaced the TODO with LOG_UNIMP and add break for silence warningsChen Qun2020-12-141-2/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When using -Wimplicit-fallthrough in our CFLAGS, the compiler showed warning: target/ppc/mmu_helper.c: In function ‘dump_mmu’: target/ppc/mmu_helper.c:1351:12: warning: this statement may fall through [-Wimplicit-fallthrough=] 1351 | if (ppc64_v3_radix(env_archcpu(env))) { | ^ target/ppc/mmu_helper.c:1358:5: note: here 1358 | default: | ^~~~~~~ Use "qemu_log_mask(LOG_UNIMP**)" instead of the TODO comment. And add the break statement to fix it. Reported-by: Euler Robot <euler.robot@huawei.com> Signed-off-by: Chen Qun <kuhn.chenqun@huawei.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Thomas Huth <thuth@redhat.com> Acked-by: David Gibson <david@gibson.dropbear.id.au> Message-Id: <20201116024810.2415819-8-kuhn.chenqun@huawei.com> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
| * spapr: Do TPM proxy hotplug sanity checks at pre-plugGreg Kurz2020-12-141-5/+18
| | | | | | | | | | | | | | | | | | | | | | | | There can be only one TPM proxy at a time. This is currently checked at plug time. But this can be detected at pre-plug in order to error out earlier. This allows to get rid of error handling in the plug handler. Signed-off-by: Greg Kurz <groug@kaod.org> Message-Id: <20201120234208.683521-9-groug@kaod.org> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
| * spapr: Do PHB hoplug sanity check at pre-plugGreg Kurz2020-12-141-6/+11
| | | | | | | | | | | | | | | | | | | | | | | | We currently detect that a PHB index is already in use at plug time. But this can be decteted at pre-plug in order to error out earlier. This allows to pass &error_abort to spapr_drc_attach() and to end up with a plug handler that doesn't need to report errors anymore. Signed-off-by: Greg Kurz <groug@kaod.org> Message-Id: <20201120234208.683521-8-groug@kaod.org> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
| * spapr: Make PHB placement functions and spapr_pre_plug_phb() return statusGreg Kurz2020-12-142-18/+24
| | | | | | | | | | | | | | | | | | | | Read documentation in "qapi/error.h" and changelog of commit e3fe3988d785 ("error: Document Error API usage rules") for rationale. Signed-off-by: Greg Kurz <groug@kaod.org> Message-Id: <20201120234208.683521-7-groug@kaod.org> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
| * spapr: Do NVDIMM/PC-DIMM device hotplug sanity checks at pre-plug onlyGreg Kurz2020-12-143-33/+20Star
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Pre-plug of a memory device, be it an NVDIMM or a PC-DIMM, ensures that the memory slot is available and that addresses don't overlap with existing memory regions. The corresponding DRCs in the LMB and PMEM namespaces are thus necessarily attachable at plug time. Pass &error_abort to spapr_drc_attach() in spapr_add_lmbs() and spapr_add_nvdimm(). This allows to greatly simplify error handling on the plug path. Signed-off-by: Greg Kurz <groug@kaod.org> Message-Id: <20201120234208.683521-3-groug@kaod.org> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
| * spapr: Do PCI device hotplug sanity checks at pre-plug onlyGreg Kurz2020-12-141-10/+33
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The PHB acts as the hotplug handler for PCI devices. It does some sanity checks on DR enablement, PCI bridge chassis numbers and multifunction. These checks are currently performed at plug time, but they would best sit in a pre-plug handler in order to error out as early as possible. Create a spapr_pci_pre_plug() handler and move all the checking there. Add a check that the associated DRC doesn't already have an attached device. This is equivalent to the slot availability check performed by do_pci_register_device() upon realization of the PCI device. This allows to pass &error_abort to spapr_drc_attach() and to end up with a plug handler that doesn't need to report errors anymore. Signed-off-by: Greg Kurz <groug@kaod.org> Message-Id: <20201120234208.683521-2-groug@kaod.org> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
| * spapr/xics: Drop unused argument to xics_kvm_has_broken_disconnect()Greg Kurz2020-12-143-3/+3
| | | | | | | | | | | | | | | | | | Never used from the start. Signed-off-by: Greg Kurz <groug@kaod.org> Message-Id: <20201120174646.619395-6-groug@kaod.org> Reviewed-by: Cédric Le Goater <clg@kaod.org> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
| * spapr/xive: Turn some sanity checks into assertionsGreg Kurz2020-12-141-10/+4Star
| | | | | | | | | | | | | | | | | | | | | | | | | | | | The sPAPR XIVE device is created by the machine in spapr_irq_init(). The latter overrides any value provided by the user with -global for the "nr-irqs" and "nr-ends" properties with strictly positive values. It seems reasonable to assume these properties should never be 0, which wouldn't make much sense by the way. Signed-off-by: Greg Kurz <groug@kaod.org> Message-Id: <20201120174646.619395-2-groug@kaod.org> Reviewed-by: Cédric Le Goater <clg@kaod.org> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
* | tests/tcg/multiarch/Makefile.target: Disable run-gdbstub-sha1 testPeter Maydell2020-12-141-1/+3
|/ | | | | | | | | | | | | | | | | | | | | | Disable the run-gdbstub-sha1 test: it provokes an internal error assertion failure in Ubuntu gdb 8.1.1-0ubuntu1 (Ubuntu gdb 8.1-0ubuntu3.2 also has this assert but we were previously skipping this test because it doesn't support connection over local domain sockets) : timeout 60 /home/petmay01/linaro/qemu-for-merges/tests/guest-debug/run-test.py --gdb /usr/bin/gdb-multiar /build/gdb-veKdC1/gdb-8.1.1/gdb/regcache.c:122: internal-error: void* init_regcache_descr(gdbarch*): Asser A problem internal to GDB has been detected, further debugging may prove unreliable. This is a bug, please report it. For instructions, see: <http://www.gnu.org/software/gdb/bugs/>. Aborted (core dumped) /home/petmay01/linaro/qemu-for-merges/tests/tcg/multiarch/Makefile.target:51: recipe for target 'run-gdbst Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 20201214133702.24088-1-peter.maydell@linaro.org
generated by cgit v1.2.3-55-g7522 (git 2.39.0) at 2024-12-22 15:59:22 +0100