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* vl: smp_parse: fix regressionAndrew Jones2016-06-291-0/+2
| | | | | | | | | | | | | | Commit 0544edd88a "vl: smp_parse: cleanups" regressed any -smp config that left either cores or threads unspecified, and specified a topology supporting more cpus than the given online cpus. The correct way to calculate the missing parameter would be to use maxcpus, but it's too late to change that now. Restore the old way, which is to calculate it with the online cpus (as is still done), but then, if the result is zero, just set it to one. Signed-off-by: Andrew Jones <drjones@redhat.com> Message-Id: <1466526844-29245-1-git-send-email-drjones@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
* ich9: implement SCI_IRQ_SEL registerPaolo Bonzini2016-06-292-10/+19
| | | | Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
* ich9: implement ACPI_EN registerPaolo Bonzini2016-06-291-3/+12
| | | | Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
* serial: reinstate watch after migrationPaolo Bonzini2016-06-291-2/+23
| | | | | | | | | Otherwise, a serial port can get stuck if it is migrated while flow control is in effect. Tested-by: Bret Ketchum <bcketchum@gmail.com> Reviewed-by: Dr. David Alan Gilbert <dgilbert@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
* serial: remove watch on resetPaolo Bonzini2016-06-292-4/+13
| | | | | | | | | | Otherwise, this can cause serial_xmit to be entered with LSR.TEMT=0, which is invalid and causes an assertion failure. Reported-by: Bret Ketchum <bcketchum@gmail.com> Tested-by: Bret Ketchum <bcketchum@gmail.com> Reviewed-by: Dr. David Alan Gilbert <dgilbert@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
* char: change qemu_chr_fe_add_watch to return unsignedPaolo Bonzini2016-06-294-10/+25
| | | | | | | | | | | | | | | g_source_attach can return any value between 1 and UINT_MAX if you let QEMU run long enough. However, qemu_chr_fe_add_watch can also return a negative errno value when the device is disconnected or does not support chr_add_watch. Change it to return zero to avoid overloading these values. Fix the cadence_uart which asserts in this case (easily obtained with "-serial pty"). Tested-by: Bret Ketchum <bcketchum@gmail.com> Reviewed-by: Dr. David Alan Gilbert <dgilbert@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
* serial: separate serial_xmit and serial_watch_cbPaolo Bonzini2016-06-291-7/+11
| | | | | | | | | | serial_xmit starts transmission of whatever is in the transmitter register, THR or FIFO; serial_watch_cb is a wrapper around it and is only used as a qemu_chr_fe_add_watch callback. Tested-by: Bret Ketchum <bcketchum@gmail.com> Reviewed-by: Dr. David Alan Gilbert <dgilbert@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
* serial: simplify tsr_retry resetPaolo Bonzini2016-06-291-3/+1Star
| | | | | | | | | | Move common code outside the if, and reset tsr_retry even in loopback mode. Right now it cannot become non-zero, but it will be possible as soon as we start respecting the baud rate. Tested-by: Bret Ketchum <bcketchum@gmail.com> Reviewed-by: Dr. David Alan Gilbert <dgilbert@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
* serial: make tsr_retry unsignedPaolo Bonzini2016-06-292-5/+9
| | | | | | | | | It can never become negative; reflect this in the type of the field and simplify the conditions. Tested-by: Bret Ketchum <bcketchum@gmail.com> Reviewed-by: Dr. David Alan Gilbert <dgilbert@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
* iscsi: fix assertion in is_sector_request_lun_alignedPeter Lieven2016-06-291-2/+3
| | | | | | | | | | | | | | Commit 94d047a added an assertion the the request alignment check. This introduced 2 issues: a) A off-by-one error since a request of BDRV_REQUEST_MAX_SECTORS is actually allowed. b) The bdrv_get_block_status call in the read path to check the allocation status requests up to INT_MAX sectors which triggers the assertion. Fixes: 94d047a35bf663e28f8fef137544d8ea78165add Signed-off-by: Peter Lieven <pl@kamp.de> Message-Id: <1466414680-18383-1-git-send-email-pl@kamp.de> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
* target-*: Don't redefine cpu_exec()Peter Crosthwaite2016-06-2920-53/+18Star
| | | | | | | | | | | | This function needs to be converted to QOM hook and virtualised for multi-arch. This rename interferes, as cpu-qom will not have access to the renaming causing name divergence. This rename doesn't really do anything anyway so just delete it. Signed-off-by: Peter Crosthwaite <crosthwaite.peter@gmail.com> Message-Id: <69bd25a8678b8b31b91cd9760c777bed1aafb44e.1437212383.git.crosthwaite.peter@gmail.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Peter Crosthwaite <crosthwaitepeter@gmail.com>
* pci-assign: Move "Invalid ROM" error message to pci-assign-load-rom.cLin Ma2016-06-292-4/+3Star
| | | | | | | | | | | | | | In function pci_assign_dev_load_option_rom, For those pci devices don't have 'rom' file under sysfs or if loading ROM from external file, The function returns NULL, and won't set the passed 'size' variable. In these 2 cases, qemu still reports "Invalid ROM" error message, Users may be confused by it. Signed-off-by: Lin Ma <lma@suse.com> Message-Id: <1466010327-22368-1-git-send-email-lma@suse.com> Cc: qemu-stable@nongnu.org Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
* vnc: generalize "VNC server running on ..." messagePaolo Bonzini2016-06-293-25/+12Star
| | | | | | | The message is useful whenever the user specifies "-vnc to=XX". Move it to ui/vnc.c. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
* scsi: esp: fix migrationPaolo Bonzini2016-06-292-3/+7
| | | | | | | | Commit 926cde5 ("scsi: esp: make cmdbuf big enough for maximum CDB size", 2016-06-16) changed the size of a migrated field. Split it in two parts, and only migrate the second part in a new vmstate version. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
* MC146818 RTC: add GPIO access to output IRQEfimov Vasily2016-06-291-2/+4
| | | | | | | | | | | The MC146818 RTC device has output IRQ line. Currently the corresponding field is only accessible through direct access. Such access violates Qemu model. The patch makes the field accessible through GPIO. It also updates the setting of the IRQ during initialization. Signed-off-by: Efimov Vasily <real@ispras.ru> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
* isa: introduce wrapper isa_connect_gpio_outEfimov Vasily2016-06-292-0/+8
| | | | | | | | | | | Currently a direct access to the device structure field is used to connect ISA device IRQ to the bus. GPIO access should be used instead if possible. The patch adds wrapper isa_connect_gpio_out. The function connects specified output GPIO to specified ISA IRQ. Signed-off-by: Efimov Vasily <real@ispras.ru> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
* ICH9 LPC: move call of isa_bus_irqs to 'realize' methodEfimov Vasily2016-06-292-3/+2Star
| | | | | | | | | | | | | | | | | | | | The isa_bus_irqs function initializes ISA bus IRQ array pointer with specified value. Previously the ICH9 LPC bridge model did not have its own IRQs but only IRQ pointer cache. And same GSI were used for ISA bus and other sources behind the bridge (PCI, SCI). Hence, the pc_q35_init was only possible place to setup both ISA bus IRQs and the bridge IRQ cache. As a result, the call of isa_bus_irqs was made from pc_q35_init. Now the ICH9 LPC bridge has its own output IRQs which are connected to GSI. The output IRQs are already used to route IRQs from PCI and SCI. The patch makes the ICH9 LPC bridge output IRQs to used for ISA bus too. Signed-off-by: Efimov Vasily <real@ispras.ru> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
* ICH9 LPC: handle GSI as qdev GPIOEfimov Vasily2016-06-293-2/+11
| | | | | | | | | | | The ICH9 LPC bridge has 24 output IRQs connected to GSI. Currently the IRQs are referenced by pointers. The pointers are initialized at startup by direct access to the structure fields. This violates Qemu device model. The patch makes the IRQs handling to use GPIO model. Signed-off-by: Efimov Vasily <real@ispras.ru> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
* ich9: unify pic and ioapic IRQ vectorsPaolo Bonzini2016-06-293-6/+4Star
| | | | | | | | | | ich9->pic and ich9->ioapic differ for the first 16 GSIs (because ich9->pic is wired to 8259+IOAPIC but ich9->ioapic is wired to IOAPIC only). However, ich9->ioapic is never used for the first 16 GSIs, so the two vectors can be merged. Reviewed-by: Efimov Vasily <real@ispras.ru> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
* ich9: clean up ich9_lpc_update_pic/ich9_lpc_update_apic and callersPaolo Bonzini2016-06-291-23/+17Star
| | | | | | | | | Make ich9_lpc_update_pic take care only of GSIs 0-15, and ich9_lpc_update_apic take care only of GSIs 16-23. Assert that they are called with the correct GSI indices. Reviewed-by: Efimov Vasily <real@ispras.ru> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
* ich9: call ich9_lpc_update_pic for disabled pirqsPaolo Bonzini2016-06-291-3/+0Star
| | | | | | | | | An asserted pirq can be disabled and the corresponding GSIs should then go down to 0. However, because of the conditional in ich9_lpc_update_by_pirq, the legacy 8259 pin could remain stuck to 1. Reviewed-by: Efimov Vasily <real@ispras.ru> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
* ICH9 SMB: make TYPE_ICH9_SMB_DEVICE macro publicEfimov Vasily2016-06-292-1/+2
| | | | | | | | | | | | ICH9 SMB bridge can be created using qdev API despite existence of helper function. The type name is needed for such creation. Using a preprocessor alias instead the string type name itself is preferable. The patch makes the alias accessible through the header. Signed-off-by: Efimov Vasily <real@ispras.ru> Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
* port92: handle A20 IRQ as GPIOEfimov Vasily2016-06-292-5/+7
| | | | | | | | | | | The port92 device has outgouing IRQ line A20. Currently the IRQ is referenced by a pointer which normally is set during machine initialization. The pointer is never changed at runtime. Hence, common GPIO model can be applied to A20 IRQ line. Note that checking for IRQ to be connected as in previous version of code is not required qemu_set_irq will do it. Signed-off-by: Efimov Vasily <real@ispras.ru> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
* pckbd: handle A20 IRQ as GPIOEfimov Vasily2016-06-292-14/+8Star
| | | | | | | | | | | The i8042 device has outgouing IRQ line A20. Currently the IRQ is referenced by a pointer which normally is set during machine initialization. The pointer is never changed at runtime. So common GPIO model can be applied to A20 IRQ line. Note that checking for IRQ to be connected as in previous version of code is not required because qemu_set_irq will do it. Signed-off-by: Efimov Vasily <real@ispras.ru> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
* pc_q35: configure Q35 instance using propertiesEfimov Vasily2016-06-291-6/+12
| | | | | | | | | Currently, Q35 instance is configured using direct access to structure fields. The patch uses property interface to set the fields. Signed-off-by: Efimov Vasily <real@ispras.ru> Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
* Q35: implement property interfece to several parametersEfimov Vasily2016-06-293-2/+29
| | | | | | | | | | | | | | | | | | During creation of Q35 instance several parameters are set using direct access. It violates Qemu device model. Correctly, the parameters should be handled as object properties. The patch adds four link type properties for fields: mch.ram_memory mch.pci_address_space mch.system_memory mch.address_space_io And, it adds two size type properties for fields: mch.below_4g_mem_size mch.above_4g_mem_size Signed-off-by: Efimov Vasily <real@ispras.ru> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
* pflash: make TYPE_CFI_PFLASH0{1,2} macros publicEfimov Vasily2016-06-293-2/+3
| | | | | | | | | | | | qdev API can be used to create CFI pflash devices despite existance of helper functions. The type name is needed in course of such creation. Using the preprocessor alias instead of the string literal itself is preferable. The patch makes the aliases accessible through the header. Signed-off-by: Efimov Vasily <real@ispras.ru> Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
* vmport: identify vmport type by macro TYPE_VMPORTEfimov Vasily2016-06-292-2/+2
| | | | | | | | | Currently vmport device is identified by the string literal. Using a preprocessor alias instead is preferable. Signed-off-by: Efimov Vasily <real@ispras.ru> Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
* pcspk: convert "pit" property type from ptr to linkEfimov Vasily2016-06-292-3/+8
| | | | | | | | | The speaker device needs pointer to ISA PIT device to operate. But according to qdev-properties.h, properties of pointer type should be avoided. It seems a link type property is a good substitution. Signed-off-by: Efimov Vasily <real@ispras.ru> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
* ide: move headers to include folderEfimov Vasily2016-06-294-1/+1
| | | | | | | | The patch moves "hw/ide/achi.h", "hw/ide/pci.h" and "hw/ide/internal.h" headers to corresponding folders inside "include" folder alike other Qemu headers. Signed-off-by: Efimov Vasily <real@ispras.ru> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
* pc: acpi: drop intermediate PCMachineState.node_cpuIgor Mammedov2016-06-243-19/+9Star
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | PCMachineState.node_cpu was used for mapping APIC ID to numa node id as CPU entries in SRAT used to be built on sparse APIC ID bitmap (up to apic_id_limit). However since commit 5803fce pc: acpi: SRAT: create only valid processor lapic entries CPU entries in SRAT aren't build using apic bitmap but using 0..maxcpus index instead which is also used for creating numa_info[x].node_cpu map. So instead of doing useless intermediate conversion from 1. node by cpu index -> node by apic id i.e. numa_info[x].node_cpu -> PCMachineState.node_cpu 2. apic id -> srat entry PMX PCMachineState.node_cpu[apic id] -> PMX value use numa_info[x].node_cpu map directly like ARM does and do 1. numa_info[x].node_cpu -> PMX value using index in range 0..maxcpus and drop not necessary PCMachineState.node_cpu and related code. That also removes the last (not counting legacy hotplug) dependency of ACPI code on apic_id_limit and need to allocate huge sparse PCMachineState.node_cpu array in case of 32-bit APIC IDs. Signed-off-by: Igor Mammedov <imammedo@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
* acpi-test-data: update expectedMichael S. Tsirkin2016-06-246-0/+0
| | | | | | switched to new cpu hotplug interface, aml changed. Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
* pc: use new CPU hotplug interface since 2.7 machine typeIgor Mammedov2016-06-2410-2/+118
| | | | | | | | | | | | | | | | | | For compatibility reasons PC/Q35 will start with legacy CPU hotplug interface by default but with new CPU hotplug AML code since 2.7 machine type. That way legacy firmware that doesn't use QEMU generated ACPI tables will be able to continue using legacy CPU hotplug interface. While new machine type, with firmware supporting QEMU provided ACPI tables, will generate new CPU hotplug AML, which will switch to new CPU hotplug interface when guest OS executes its _INI method on ACPI tables loading. Signed-off-by: Igor Mammedov <imammedo@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
* acpi: cpuhp: add cpu._OST handlingIgor Mammedov2016-06-246-1/+96
| | | | | | | | | | | | it adds HW and AML parts for CPU_Device._OST method handling to allow OSPM reports status of hot-(un)plug operation. And extends QMP command query-acpi-ospm-status to report CPU's OST info along with already reported PC-DIMM devices. Signed-off-by: Igor Mammedov <imammedo@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
* acpi: cpuhp: implement hot-remove parts of CPU hotplug interfaceIgor Mammedov2016-06-246-5/+158
| | | | | | | | | | it adds hw registers needed for handling CPU hot-remove and corresponding AML methods to request and eject a CPU with necessary hotplug callbacks in pc,piix4,ich9 code. Signed-off-by: Igor Mammedov <imammedo@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
* acpi: cpuhp: implement hot-add parts of CPU hotplug interfaceIgor Mammedov2016-06-243-2/+157
| | | | | | | | | | it adds hw registers needed for handling CPU hot-add and corresponding AML methods to handle hot-add events on guest side. Signed-off-by: Igor Mammedov <imammedo@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
* pc: acpi: introduce AcpiDeviceIfClass.madt_cpu hookIgor Mammedov2016-06-247-18/+49
| | | | | | | | | | | | | | Add madt_cpu callback to AcpiDeviceIfClass and use it for generating LAPIC MADT entries for CPUs. Later it will be used for generating x2APIC entries in case of more than 255 CPUs and also would be reused by ARM target when ACPI CPU hotplug is introduced there. Signed-off-by: Igor Mammedov <imammedo@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
* acpi: cpuhp: add CPU devices AML with _STA methodIgor Mammedov2016-06-247-6/+313
| | | | | | | | | | | | | | it adds CPU objects to DSDT with _STA method and QEMU side of CPU hotplug interface initialization with registers sufficient to handle _STA requests, including necessary hotplug callbacks in piix4,ich9 code. Hot-(un)plug hw/acpi parts will be added by corresponding follow up patches. Signed-off-by: Igor Mammedov <imammedo@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
* pc: piix4/ich9: add 'cpu-hotplug-legacy' propertyIgor Mammedov2016-06-243-2/+46
| | | | | | | | | It will be used to select which hotplug call-back is called and for switching from legacy mode into new one. Signed-off-by: Igor Mammedov <imammedo@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
* docs: update ACPI CPU hotplug spec with new protocolIgor Mammedov2016-06-241-12/+82
| | | | | | | | | | | | | | | | | | | | Add description of new CPU hotplug interface. To switch from from legacy mode into new mode use fact that write accesses into CPU present bitmap were never used before and were ignored by QEMU. So use it to as a way to switch from legacy mode. That way pc/q35 machine starts in legacy mode and QEMU generated ACPI tables will switch to new CPU hotplug interface during runtime. In case QEMU is started with legacy BIOS (that doesn't support QEMU generated ACPI tables), legacy CPU hotplug will remain active and could be used by BIOS built in ACPI tables for CPU hotplug. Signed-off-by: Igor Mammedov <imammedo@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
* i386: pci-assign: Fix MSI-X table sizeIdo Yariv2016-06-241-7/+7
| | | | | | | | | | | | | | | | The current code creates a whole page mmio region for the MSI-X table size. However, the page containing the MSI-X table may contain other registers not related to MSI-X. Creating an mmio region for the whole page masks such registers and may break drivers in the guest OS. Since maximal number of entries is known, use that instead to deduce the table size when setting up the mmio region. Signed-off-by: Ido Yariv <ido@wizery.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
* docs: add NVDIMM ACPI documentationXiao Guangrong2016-06-241-0/+132
| | | | | | | | | | It describes the basic concepts of NVDIMM ACPI and the interfaces between QEMU and the ACPI BIOS Signed-off-by: Xiao Guangrong <guangrong.xiao@linux.intel.com> Reviewed-by: Stefan Hajnoczi <stefanha@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
* nvdimm acpi: support Set Namespace Label Data functionXiao Guangrong2016-06-241-1/+43
| | | | | | | | | | Function 6 is used to set Namespace Label Data Reviewed-by: Stefan Hajnoczi <stefanha@redhat.com> Signed-off-by: Xiao Guangrong <guangrong.xiao@linux.intel.com> Reviewed-by: Stefan Hajnoczi <stefanha@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
* nvdimm acpi: support Get Namespace Label Data functionXiao Guangrong2016-06-241-1/+82
| | | | | | | | | | Function 5 is used to get Namespace Label Data Reviewed-by: Stefan Hajnoczi <stefanha@redhat.com> Signed-off-by: Xiao Guangrong <guangrong.xiao@linux.intel.com> Reviewed-by: Stefan Hajnoczi <stefanha@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
* nvdimm acpi: support Get Namespace Label Size functionXiao Guangrong2016-06-241-3/+127
| | | | | | | | | | Function 4 is used to get Namespace label size Reviewed-by: Stefan Hajnoczi <stefanha@redhat.com> Signed-off-by: Xiao Guangrong <guangrong.xiao@linux.intel.com> Reviewed-by: Stefan Hajnoczi <stefanha@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
* nvdimm acpi: check revisionXiao Guangrong2016-06-241-0/+7
| | | | | | | | | Currently only revision 1 is supported Signed-off-by: Xiao Guangrong <guangrong.xiao@linux.intel.com> Reviewed-by: Stefan Hajnoczi <stefanha@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
* nvdimm acpi: abstract the operations for root & nvdimm devicesXiao Guangrong2016-06-241-18/+56
| | | | | | | | | | It separates the operations between root device and nvdimm devices in order to introducing label functions support for nvdimm device Signed-off-by: Xiao Guangrong <guangrong.xiao@linux.intel.com> Reviewed-by: Stefan Hajnoczi <stefanha@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
* nvdimm acpi: check UUIDXiao Guangrong2016-06-241-6/+26
| | | | | | | | | Check arg0 which indicates UUID to see if it is valid Signed-off-by: Xiao Guangrong <guangrong.xiao@linux.intel.com> Reviewed-by: Stefan Hajnoczi <stefanha@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
* nvdimm acpi: save arg3 of _DSM methodXiao Guangrong2016-06-241-0/+20
| | | | | | | | | | Check if the input Arg3 is valid then store it into ARG3 if it is needed Signed-off-by: Xiao Guangrong <guangrong.xiao@linux.intel.com> Reviewed-by: Stefan Hajnoczi <stefanha@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
* nvdimm acpi: set HDLE properlyXiao Guangrong2016-06-241-10/+12
| | | | | | | | | | Now we pass HDLE to Qemu properly, use 0 for root device and use the handle for nvdimm devices Signed-off-by: Xiao Guangrong <guangrong.xiao@linux.intel.com> Reviewed-by: Stefan Hajnoczi <stefanha@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
generated by cgit v1.2.3-55-g7522 (git 2.39.0) at 2024-07-13 03:27:55 +0200