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* tests/tcg/xtensa: add DFP0 arithmetic testsMax Filippov2020-08-211-0/+162
| | | | | | Add test for basic double precision opcode properties. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
* tests/tcg/xtensa: test double precision load/storeMax Filippov2020-08-211-0/+123
| | | | | | Add ldi[p]/sdi[p]/ldx[p]/sdx[p] opcode tests to test_lsc. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
* tests/tcg/xtensa: add fp0 div and sqrt testsMax Filippov2020-08-212-0/+158
| | | | | | Test exact division/sqrt DFPU sequences. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
* tests/tcg/xtensa: update test_lsc for DFPUMax Filippov2020-08-211-13/+34
| | | | | | | | DFPU doesn't have pre-increment FP load/store opcodes, it has post-increment opcodes instead. Test increment opcodes present in the current config. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
* tests/tcg/xtensa: update test_fp1 for DFPUMax Filippov2020-08-211-28/+34
| | | | | | | | DFPU sets Invalid flag in FSR when at least one argument of FP comparison opcodes is NaN, SNaN for most opcodes, any NaN for olt/ole. Add checks for FSR and expected FSR values. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
* tests/tcg/xtensa: update test_fp0_conv for DFPUMax Filippov2020-08-211-144/+155
| | | | | | | DFPU conversion opcodes update FSR flags. Add FSR parameters and expected FSR register values for the conversion tests. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
* tests/tcg/xtensa: expand madd testsMax Filippov2020-08-211-0/+104
| | | | | | | Test that madd doesn't do rounding after multiplication. Test NaN propagation rules for FPU2000 and DFPU madd opcode. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
* tests/tcg/xtensa: update test_fp0_arith for DFPUMax Filippov2020-08-212-97/+223
| | | | | | | DFPU arithmetic opcodes update FSR flags. Add FSR parameters and expected FSR register values for the arithmetic tests. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
* tests/tcg/xtensa: fix test execution on ISSMax Filippov2020-08-211-5/+5
| | | | | | | Space for test results may be allocated in IRAM which is only word-accessible. Use full 32-bit words to access test results. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
* target/xtensa: implement FPU division and square rootMax Filippov2020-08-213-0/+132
| | | | | | | | | | | This does not implement all opcodes related to div/sqrt as specified in the xtensa ISA, partly because the official specification is not complete and partly because precise implementation is unnecessarily complex. Instead instructions specific to the div/sqrt sequences are implemented differently, most of them as nops, but the results of div/sqrt sequences is preserved. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
* target/xtensa: add DFPU registers and opcodesMax Filippov2020-08-216-34/+1413
| | | | | | | | | | | | DFPU may be configured with 32-bit or with 64-bit registers. Xtensa ISA does not specify how single-precision values are stored in 64-bit registers. Existing implementations store them in the low half of the registers. Add value extraction and write back to single-precision opcodes. Add new double precision opcodes. Add 64-bit register file. Add 64-bit values dumping to the xtensa_cpu_dump_state. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
* target/xtensa: add DFPU optionMax Filippov2020-08-212-0/+25
| | | | | | | | | | | | | | Double precision floating point unit is a FPU implementation different from the FPU2000 in the following ways: - it may be configured with only single or with both single and double precision operations support; - it may be configured with division and square root opcodes; - FSR register accumulates inValid, division by Zero, Overflow, Underflow and Inexact result flags of operations; - QNaNs and SNaNs are handled properly; - NaN propagation rules are different. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
* target/xtensa: don't access BR regfile directlyMax Filippov2020-08-213-34/+42
| | | | | | | | | BR registers used in FPU comparison opcodes are available as opcode arguments for translators. Use them. This simplifies comparison helpers interface and makes them usable in FLIX bundles. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
* target/xtensa: move FSR/FCR register accessorsMax Filippov2020-08-211-32/+32
| | | | | | | | Move FSR/FCR register accessors from core opcodes to FPU2000 opcodes as they are FPU2000-specific. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
* target/xtensa: rename FPU2000 translators and helpersMax Filippov2020-08-213-55/+57
| | | | | | | | | | Add _s suffix to all FPU2000 opcode translators and helpers that also have double-precision variant to unify naming and allow adding DFPU implementations. Add _fpu2k_ to the names of helpers that will have different implementation for the DFPU . Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
* target/xtensa: support copying registers up to 64 bits wideMax Filippov2020-08-212-5/+22
| | | | | | | | | | FLIX dependency breaking code assumes that all registers are 32 bit wide. This may not always be correct. Extract actual register width from the associated register file and use it to create temporaries of correct width and generate correct data movement instructions. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
* target/xtensa: add geometry to xtensa_get_regfile_by_nameMax Filippov2020-08-213-10/+31
| | | | | | | | | Register file name may not uniquely identify a register file in the set of configurations. E.g. floating point registers may have different size in different configurations. Use register file geometry as additional identifier. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
* softfloat: add xtensa specialization for pickNaNMulAddMax Filippov2020-08-211-0/+26
| | | | | | | | | | | | | | pickNaNMulAdd logic on Xtensa is to apply pickNaN to the inputs of the expression (a * b) + c. However if default NaN is produces as a result of (a * b) calculation it is not considered when c is NaN. So with two pickNaN variants there must be two pickNaNMulAdd variants. In addition the invalid flag is always set when (a * b) produces NaN. Cc: Peter Maydell <peter.maydell@linaro.org> Cc: "Alex Bennée" <alex.bennee@linaro.org> Cc: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
* softfloat: pass float_status pointer to pickNaNMax Filippov2020-08-214-7/+31
| | | | | | | | | | | | | Pass float_status structure pointer to the pickNaN so that machine-specific settings are available to NaN selection code. Add use_first_nan property to float_status and use it in Xtensa-specific pickNaN. Cc: Peter Maydell <peter.maydell@linaro.org> Cc: "Alex Bennée" <alex.bennee@linaro.org> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
* softfloat: make NO_SIGNALING_NANS runtime propertyMax Filippov2020-08-213-113/+129
| | | | | | | | | | | | | | | | target/xtensa, the only user of NO_SIGNALING_NANS macro has FPU implementations with and without the corresponding property. With NO_SIGNALING_NANS being a macro they cannot be a part of the same QEMU executable. Replace macro with new property in float_status to allow cores with different FPU implementations coexist. Cc: Peter Maydell <peter.maydell@linaro.org> Cc: "Alex Bennée" <alex.bennee@linaro.org> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
* target/xtensa: implement NMI supportMax Filippov2020-08-214-10/+26
| | | | | | | | | | | | | When NMI is configured it is taken regardless of INTENABLE SR contents, PS.INTLEVEL or PS.EXCM. It is cleared automatically once it's taken. Add nmi_level to XtensaConfig, puth there NMI level from the overlay or XCHAL_NUM_INTLEVELS + 1 when NMI is not configured. Add NMI mask to INTENABLE SR and limit CINTLEVEL to nmi_level - 1 when determining pending IRQ level in check_interrupt(). Always take and clear pending interrupt at nmi_level in the handle_interrupt(). Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
* target/xtensa: make opcode properties more dynamicMax Filippov2020-08-212-265/+278
| | | | | | | | | | | There's XtensaOpcodeOps::test_ill that is used to check whether opcode generates illegal opcode exception or not. The illegal opcode exception is not special and so this callback can be generalized to provide any XTENSA_OP_* flags that are not completely static. Introduce XtensaOpcodeOps::test_exceptions and convert all test_ill users to test_exceptions. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
* Merge remote-tracking branch 'remotes/stefanha/tags/block-pull-request' into ↵Peter Maydell2020-08-212-35/+48
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | staging Pull request # gpg: Signature made Mon 17 Aug 2020 15:34:34 BST # gpg: using RSA key 8695A8BFD3F97CDAAC35775A9CA4ABB381AB73C8 # gpg: Good signature from "Stefan Hajnoczi <stefanha@redhat.com>" [full] # gpg: aka "Stefan Hajnoczi <stefanha@gmail.com>" [full] # Primary key fingerprint: 8695 A8BF D3F9 7CDA AC35 775A 9CA4 ABB3 81AB 73C8 * remotes/stefanha/tags/block-pull-request: aio-posix: keep aio_notify_me disabled during polling async: always set ctx->notified in aio_notify() async: rename event_notifier_dummy_cb/poll() Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
| * aio-posix: keep aio_notify_me disabled during pollingStefan Hajnoczi2020-08-131-22/+25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Polling only monitors the ctx->notified field and does not need the ctx->notifier EventNotifier to be signalled. Keep ctx->aio_notify_me disabled while polling to avoid unnecessary EventNotifier syscalls. This optimization improves virtio-blk 4KB random read performance by 18%. The following results are with an IOThread and the null-co block driver: Test IOPS Error Before 244518.62 ± 1.20% After 290706.11 ± 0.44% Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com> Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Message-id: 20200806131802.569478-4-stefanha@redhat.com Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
| * async: always set ctx->notified in aio_notify()Stefan Hajnoczi2020-08-131-11/+21
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | aio_notify() does not set ctx->notified when called with ctx->aio_notify_me disabled. Therefore aio_notify_me needs to be enabled during polling. This is suboptimal since expensive event_notifier_set(&ctx->notifier) and event_notifier_test_and_clear(&ctx->notifier) calls are required when ctx->aio_notify_me is enabled. Change aio_notify() so that aio->notified is always set, regardless of ctx->aio_notify_me. This will make polling cheaper since ctx->aio_notify_me can remain disabled. Move the event_notifier_test_and_clear() to the fd handler function (which is now no longer an empty function so "dummy" has been dropped from its name). The next patch takes advantage of this by optimizing polling in util/aio-posix.c. Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com> Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Message-id: 20200806131802.569478-3-stefanha@redhat.com [Paolo Bonzini pointed out that the smp_wmb() in aio_notify_accept() should be smp_wb() but the comment should be smp_wmb() instead of smp_wb(). Fixed. --Stefan] Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
| * async: rename event_notifier_dummy_cb/poll()Stefan Hajnoczi2020-08-131-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | The event_notifier_*() prefix can be confused with the EventNotifier APIs that are also called event_notifier_*(). Rename the functions to aio_context_notifier_*() to make it clear that they relate to the AioContext::notifier field. Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Message-id: 20200806131802.569478-2-stefanha@redhat.com Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
* | Merge remote-tracking branch ↵Peter Maydell2020-08-211-7/+6Star
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | 'remotes/philmd-gitlab/tags/acceptance-testing-20200812' into staging Acceptance tests patches - Use stable URLs for the Debian and Ubuntu installer (Ubuntu has been updated last Wednesday, August 5, 2020). CI jobs results: . https://cirrus-ci.com/build/6385815351721984 . https://gitlab.com/philmd/qemu/-/pipelines/177054604 # gpg: Signature made Wed 12 Aug 2020 14:17:09 BST # gpg: using RSA key FAABE75E12917221DCFD6BB2E3E32C2CDEADC0DE # gpg: Good signature from "Philippe Mathieu-Daudé (F4BUG) <f4bug@amsat.org>" [full] # Primary key fingerprint: FAAB E75E 1291 7221 DCFD 6BB2 E3E3 2C2C DEAD C0DE * remotes/philmd-gitlab/tags/acceptance-testing-20200812: acceptance: use stable URLs for the Debian and Ubuntu installer tests/acceptance/boot_linux: Extract common URL from xlnx-versal test Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
| * | acceptance: use stable URLs for the Debian and Ubuntu installerPaolo Bonzini2020-08-121-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The kernel and initrd hashes seem to have changed for the Bionic aarch64 installer, causing BootLinuxConsole.test_aarch64_xlnx_versal_virt to fail. Correct the paths to use the previous binaries instead of the latest. Do the same for the Lenny alpha installer for consistency, even though those are unlikely to change. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com> Message-Id: <20200810092941.154911-1-pbonzini@redhat.com>
| * | tests/acceptance/boot_linux: Extract common URL from xlnx-versal testPhilippe Mathieu-Daudé2020-08-121-6/+5Star
| |/ | | | | | | | | | | | | | | Both files refer to the same directory. Store the common part in a new variable. Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com> Message-Id: <20200810093050.28744-2-philmd@redhat.com>
* | Merge remote-tracking branch 'remotes/bonzini-gitlab/tags/for-upstream' into ↵Peter Maydell2020-08-21764-7631/+9192
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | staging New build system, with "fake in-tree builds" support. Missing: * converting configure tests * converting unit tests * converting some remaining parts of the installation # gpg: Signature made Fri 21 Aug 2020 11:33:35 BST # gpg: using RSA key F13338574B662389866C7682BFFBD25F78C7AE83 # gpg: issuer "pbonzini@redhat.com" # gpg: Good signature from "Paolo Bonzini <bonzini@gnu.org>" [full] # gpg: aka "Paolo Bonzini <pbonzini@redhat.com>" [full] # Primary key fingerprint: 46F5 9FBD 57D6 12E7 BFD4 E2F7 7E15 100C CD36 69B1 # Subkey fingerprint: F133 3857 4B66 2389 866C 7682 BFFB D25F 78C7 AE83 * remotes/bonzini-gitlab/tags/for-upstream: (152 commits) docs: convert build system documentation to rST meson: update build-system documentation meson: avoid unstable module warning with Meson 0.56.0 or newer meson: convert po/ meson: convert VNC and dependent libraries to meson meson: move SDL and SDL-image detection to meson meson: convert sample plugins meson: replace create-config with meson configure_file rules.mak: drop unneeded macros meson: convert check-block meson: build texi doc docs: automatically track manual dependencies meson: sphinx-build remove Makefile.target rules.mak: remove version.o meson: convert systemtap files configure: place compatibility symlinks in target directories meson: link emulators without Makefile.target meson: plugins meson: cpu-emu ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
| * | docs: convert build system documentation to rSTPaolo Bonzini2020-08-212-169/+142Star
| | | | | | | | | | | | Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
| * | meson: update build-system documentationPaolo Bonzini2020-08-211-228/+240
| | | | | | | | | | | | Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
| * | meson: avoid unstable module warning with Meson 0.56.0 or newerPaolo Bonzini2020-08-211-1/+5
| | | | | | | | | | | | Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
| * | meson: convert po/Marc-André Lureau2020-08-2112-131/+44Star
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Meson warns if xgettext is not found. In the future we may want to add a required argument to i18n.gettext(); in the meanwhile, I am adding a --enable-gettext/--disable-gettext option and feature detection in configure. This preserves QEMU's default behavior of detecting system features, without any warning, if neither --enable-* nor --disable-* is requested. Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
| * | meson: convert VNC and dependent libraries to mesonPaolo Bonzini2020-08-214-131/+45Star
| | | | | | | | | | | | Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
| * | meson: move SDL and SDL-image detection to mesonPaolo Bonzini2020-08-216-146/+37Star
| | | | | | | | | | | | Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
| * | meson: convert sample pluginsPaolo Bonzini2020-08-215-59/+10Star
| | | | | | | | | | | | Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
| * | meson: replace create-config with meson configure_filePaolo Bonzini2020-08-217-168/+81Star
| | | | | | | | | | | | | | | | | | | | | | | | Move the create-config logic to meson.build; create a configuration_data object and let meson handle the quoting and output. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
| * | rules.mak: drop unneeded macrosPaolo Bonzini2020-08-216-282/+23Star
| | | | | | | | | | | | Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
| * | meson: convert check-blockPaolo Bonzini2020-08-214-16/+18
| | | | | | | | | | | | Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
| * | meson: build texi docPaolo Bonzini2020-08-216-105/+104Star
| | | | | | | | | | | | | | | Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
| * | docs: automatically track manual dependenciesPaolo Bonzini2020-08-213-9/+65
| | | | | | | | | | | | Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
| * | meson: sphinx-buildPaolo Bonzini2020-08-216-186/+79Star
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | For now, sphinx is run on every invocation of make. The previous mechanism using $(wildcard) is not reproducible in Meson and was also brittle; for example some .rst.inc files were left out. The next patch will introduce a Sphinx extension to emit a depfile. Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
| * | remove Makefile.targetPaolo Bonzini2020-08-213-76/+4Star
| | | | | | | | | | | | | | | | | | Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
| * | rules.mak: remove version.oMarc-André Lureau2020-08-213-12/+1Star
| | | | | | | | | | | | | | | Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
| * | meson: convert systemtap filesMarc-André Lureau2020-08-214-93/+33Star
| | | | | | | | | | | | | | | Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
| * | configure: place compatibility symlinks in target directoriesPaolo Bonzini2020-08-211-0/+3
| | | | | | | | | | | | Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
| * | meson: link emulators without Makefile.targetPaolo Bonzini2020-08-2132-344/+181Star
| | | | | | | | | | | | | | | | | | | | | | | | The binaries move to the root directory, e.g. qemu-system-i386 or qemu-arm. This requires changes to qtests, CI, etc. Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
| * | meson: pluginsPaolo Bonzini2020-08-215-30/+21Star
| | | | | | | | | | | | | | | | | | | | | For now link arguments end up in Makefile.target, they will move to the right place soon. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
| * | meson: cpu-emuMarc-André Lureau2020-08-214-29/+54
| | | | | | | | | | | | | | | Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
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