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| * qapi: Add a 'coroutine' flag for commandsKevin Wolf2020-10-0915-14/+73
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds a new 'coroutine' flag to QMP command definitions that tells the QMP dispatcher that the command handler is safe to be run in a coroutine. The documentation of the new flag pretends that this flag is already used as intended, which it isn't yet after this patch. We'll implement this in another patch in this series. Signed-off-by: Kevin Wolf <kwolf@redhat.com> Message-Id: <20201005155855.256490-9-kwolf@redhat.com> Reviewed-by: Markus Armbruster <armbru@redhat.com> Reviewed-by: Stefan Hajnoczi <stefanha@redhat.com> Signed-off-by: Markus Armbruster <armbru@redhat.com>
| * monitor: Make current monitor a per-coroutine propertyKevin Wolf2020-10-095-13/+33
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This way, a monitor command handler will still be able to access the current monitor, but when it yields, all other code code will correctly get NULL from monitor_cur(). This uses a hash table to map the coroutine pointer to the current monitor of that coroutine. Outside of coroutine context, we associate the current monitor with the leader coroutine of the current thread. Approaches to implement some form of coroutine local storage directly in the coroutine core code have been considered and discarded because they didn't end up being much more generic than the hash table and their performance impact on coroutines not using coroutine local storage was unclear. As the block layer uses a coroutine per I/O request, this is a fast path and we have to be careful. It's safest to just stay out of this path with code only used by the monitor. Signed-off-by: Kevin Wolf <kwolf@redhat.com> Reviewed-by: Eric Blake <eblake@redhat.com> Message-Id: <20201005155855.256490-8-kwolf@redhat.com> Reviewed-by: Markus Armbruster <armbru@redhat.com> Reviewed-by: Stefan Hajnoczi <stefanha@redhat.com> Signed-off-by: Markus Armbruster <armbru@redhat.com>
| * qmp: Call monitor_set_cur() only in qmp_dispatch()Kevin Wolf2020-10-096-13/+20
| | | | | | | | | | | | | | | | | | | | | | | | The correct way to set the current monitor for a coroutine handler will be different than for a blocking handler, so monitor_set_cur() needs to be called in qmp_dispatch(). Signed-off-by: Kevin Wolf <kwolf@redhat.com> Message-Id: <20201005155855.256490-7-kwolf@redhat.com> Reviewed-by: Markus Armbruster <armbru@redhat.com> Reviewed-by: Stefan Hajnoczi <stefanha@redhat.com> Signed-off-by: Markus Armbruster <armbru@redhat.com>
| * qmp: Assert that no other monitor is activeKevin Wolf2020-10-091-1/+4
| | | | | | | | | | | | | | | | | | | | | | | | monitor_qmp_dispatch() is never supposed to be called in the context of another monitor, so assert that monitor_cur() is NULL instead of saving and restoring it. Signed-off-by: Kevin Wolf <kwolf@redhat.com> Message-Id: <20201005155855.256490-6-kwolf@redhat.com> Reviewed-by: Markus Armbruster <armbru@redhat.com> Reviewed-by: Stefan Hajnoczi <stefanha@redhat.com> Signed-off-by: Markus Armbruster <armbru@redhat.com>
| * hmp: Update current monitor only in handle_hmp_command()Kevin Wolf2020-10-092-10/+5Star
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The current monitor is updated relatively early in the command handling code even though only the command handler actually needs it. The current monitor will become coroutine-local later, so we can only update it when we know in which coroutine the command will be exectued. Move it to handle_hmp_command() where this information will be available. Signed-off-by: Kevin Wolf <kwolf@redhat.com> Reviewed-by: Eric Blake <eblake@redhat.com> Message-Id: <20201005155855.256490-5-kwolf@redhat.com> Reviewed-by: Markus Armbruster <armbru@redhat.com> Reviewed-by: Stefan Hajnoczi <stefanha@redhat.com> Signed-off-by: Markus Armbruster <armbru@redhat.com>
| * monitor: Use getter/setter functions for cur_monKevin Wolf2020-10-0921-46/+73
| | | | | | | | | | | | | | | | | | | | | | | | | | cur_mon really needs to be coroutine-local as soon as we move monitor command handlers to coroutines and let them yield. As a first step, just remove all direct accesses to cur_mon so that we can implement this in the getter function later. Signed-off-by: Kevin Wolf <kwolf@redhat.com> Message-Id: <20201005155855.256490-4-kwolf@redhat.com> Reviewed-by: Markus Armbruster <armbru@redhat.com> Reviewed-by: Stefan Hajnoczi <stefanha@redhat.com> Signed-off-by: Markus Armbruster <armbru@redhat.com>
| * monitor: Add Monitor parameter to monitor_get_cpu_index()Kevin Wolf2020-10-095-14/+14
| | | | | | | | | | | | | | | | | | | | | | Most callers actually don't have to rely on cur_mon, but already know for which monitor they call monitor_get_cpu_index(). Signed-off-by: Kevin Wolf <kwolf@redhat.com> Message-Id: <20201005155855.256490-3-kwolf@redhat.com> Reviewed-by: Markus Armbruster <armbru@redhat.com> Reviewed-by: Stefan Hajnoczi <stefanha@redhat.com> Signed-off-by: Markus Armbruster <armbru@redhat.com>
| * monitor: Add Monitor parameter to monitor_set_cpu()Kevin Wolf2020-10-093-7/+7
|/ | | | | | | | | | | | Most callers actually don't have to rely on cur_mon, but already know for which monitor they call monitor_set_cpu(). Signed-off-by: Kevin Wolf <kwolf@redhat.com> Reviewed-by: Eric Blake <eblake@redhat.com> Message-Id: <20201005155855.256490-2-kwolf@redhat.com> Reviewed-by: Markus Armbruster <armbru@redhat.com> Reviewed-by: Stefan Hajnoczi <stefanha@redhat.com> Signed-off-by: Markus Armbruster <armbru@redhat.com>
* Merge remote-tracking branch ↵Peter Maydell2020-10-0818-72/+304
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | 'remotes/pmaydell/tags/pull-target-arm-20201008-1' into staging target-arm queue: * hw/ssi/npcm7xx_fiu: Fix handling of unsigned integer * hw/arm/fsl-imx25: Fix a typo * hw/arm/sbsa-ref : Fix SMMUv3 Initialisation * hw/arm/sbsa-ref : allocate IRQs for SMMUv3 * hw/char/bcm2835_aux: Allow less than 32-bit accesses * hw/arm/virt: Implement kvm-steal-time * target/arm: Make '-cpu max' have a 48-bit PA # gpg: Signature made Thu 08 Oct 2020 21:40:31 BST # gpg: using RSA key E1A5C593CD419DE28E8315CF3C2525ED14360CDE # gpg: issuer "peter.maydell@linaro.org" # gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" [ultimate] # gpg: aka "Peter Maydell <pmaydell@gmail.com>" [ultimate] # gpg: aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>" [ultimate] # Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83 15CF 3C25 25ED 1436 0CDE * remotes/pmaydell/tags/pull-target-arm-20201008-1: target/arm: Make '-cpu max' have a 48-bit PA hw/arm/virt: Implement kvm-steal-time tests/qtest: Restore aarch64 arm-cpu-features test hw/arm/virt: Move kvm pmu setup to virt_cpu_post_init hw/arm/virt: Move post cpu realize check into its own function target/arm/kvm: Make uncalled stubs explicitly unreachable linux headers: sync to 5.9-rc7 hw/char/bcm2835_aux: Allow less than 32-bit accesses hw/arm/sbsa-ref : allocate IRQs for SMMUv3 hw/arm/sbsa-ref : Fix SMMUv3 Initialisation hw/arm/fsl-imx25: Fix a typo hw/ssi/npcm7xx_fiu: Fix handling of unsigned integer Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
| * target/arm: Make '-cpu max' have a 48-bit PAPeter Maydell2020-10-081-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | QEMU supports a 48-bit physical address range, but we don't currently expose it in the '-cpu max' ID registers (you get the same range as Cortex-A57, which is 44 bits). Set the ID_AA64MMFR0.PARange field to indicate 48 bits. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20201001160116.18095-1-peter.maydell@linaro.org
| * hw/arm/virt: Implement kvm-steal-timeAndrew Jones2020-10-0810-13/+209
| | | | | | | | | | | | | | | | | | | | | | We add the kvm-steal-time CPU property and implement it for machvirt. A tiny bit of refactoring was also done to allow pmu and pvtime to use the same vcpu device helper functions. Reviewed-by: Eric Auger <eric.auger@redhat.com> Signed-off-by: Andrew Jones <drjones@redhat.com> Message-id: 20201001061718.101915-7-drjones@redhat.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
| * tests/qtest: Restore aarch64 arm-cpu-features testAndrew Jones2020-10-081-1/+2
| | | | | | | | | | | | | | | | | | | | arm-cpu-features got dropped from the AArch64 tests during the meson conversion shuffle. Signed-off-by: Andrew Jones <drjones@redhat.com> Message-id: 20201001061718.101915-6-drjones@redhat.com Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
| * hw/arm/virt: Move kvm pmu setup to virt_cpu_post_initAndrew Jones2020-10-081-16/+18
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Move the KVM PMU setup part of fdt_add_pmu_nodes() to virt_cpu_post_init(), which is a more appropriate location. Now fdt_add_pmu_nodes() is also named more appropriately, because it no longer does anything but fdt node creation. No functional change intended. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Eric Auger <eric.auger@redhat.com> Signed-off-by: Andrew Jones <drjones@redhat.com> Message-id: 20201001061718.101915-5-drjones@redhat.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
| * hw/arm/virt: Move post cpu realize check into its own functionAndrew Jones2020-10-081-16/+27
| | | | | | | | | | | | | | | | | | | | | | | | | | We'll add more to this new function in coming patches so we also state the gic must be created and call it below create_gic(). No functional change intended. Reviewed-by: Eric Auger <eric.auger@redhat.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Andrew Jones <drjones@redhat.com> Message-id: 20201001061718.101915-4-drjones@redhat.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
| * target/arm/kvm: Make uncalled stubs explicitly unreachableAndrew Jones2020-10-081-19/+32
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When we compile without KVM support !defined(CONFIG_KVM) we generate stubs for functions that the linker will still encounter. Sometimes these stubs can be executed safely and are placed in paths where they get executed with or without KVM. Other functions should never be called without KVM. Those functions should be guarded by kvm_enabled(), but should also be robust to refactoring mistakes. Putting a g_assert_not_reached() in the function should help. Additionally, the g_assert_not_reached() calls may actually help the linker remove some code. We remove the stubs for kvm_arm_get/put_virtual_time(), as they aren't necessary at all - the only caller is in kvm.c Reviewed-by: Eric Auger <eric.auger@redhat.com> Signed-off-by: Andrew Jones <drjones@redhat.com> Message-id: 20201001061718.101915-3-drjones@redhat.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
| * linux headers: sync to 5.9-rc7Andrew Jones2020-10-081-2/+4
| | | | | | | | | | | | | | | | | | Update against Linux 5.9-rc7. Cc: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Andrew Jones <drjones@redhat.com> Message-id: 20201001061718.101915-2-drjones@redhat.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
| * hw/char/bcm2835_aux: Allow less than 32-bit accessesPhilippe Mathieu-Daudé2020-10-081-1/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The "BCM2835 ARM Peripherals" datasheet [*] chapter 2 ("Auxiliaries: UART1 & SPI1, SPI2"), list the register sizes as 3/8/16/32 bits. We assume this means this peripheral allows 8-bit accesses. This was not an issue until commit 5d971f9e67 which reverted ("memory: accept mismatching sizes in memory_region_access_valid"). The model is implemented as 32-bit accesses (see commit 97398d900c, all registers are 32-bit) so replace MemoryRegionOps.valid as MemoryRegionOps.impl, and re-introduce MemoryRegionOps.valid with a 8/32-bit range. [*] https://www.raspberrypi.org/app/uploads/2012/02/BCM2835-ARM-Peripherals.pdf Fixes: 97398d900c ("bcm2835_aux: add emulation of BCM2835 AUX (aka UART1) block") Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-id: 20201002181032.1899463-1-f4bug@amsat.org Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
| * hw/arm/sbsa-ref : allocate IRQs for SMMUv3Graeme Gregory2020-10-081-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Original commit did not allocate IRQs for the SMMUv3 in the irqmap effectively using irq 0->3 (shared with other devices). Assuming original intent was to allocate unique IRQs then add an allocation to the irqmap. Fixes: e9fdf453240 ("hw/arm: Add arm SBSA reference machine, devices part") Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: Graeme Gregory <graeme@nuviainc.com> Reviewed-by: Eric Auger <eric.auger@redhat.com> Message-id: 20201007100732.4103790-3-graeme@nuviainc.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
| * hw/arm/sbsa-ref : Fix SMMUv3 InitialisationGraeme Gregory2020-10-081-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | SMMUv3 has an error in a previous patch where an i was transposed to a 1 meaning interrupts would not have been correctly assigned to the SMMUv3 instance. Fixes: 48ba18e6d3f3 ("hw/arm/sbsa-ref: Simplify by moving the gic in the machine state") Signed-off-by: Graeme Gregory <graeme@nuviainc.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Eric Auger <eric.auger@redhat.com> Message-id: 20201007100732.4103790-2-graeme@nuviainc.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
| * hw/arm/fsl-imx25: Fix a typoPhilippe Mathieu-Daudé2020-10-081-1/+1
| | | | | | | | | | | | | | Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-id: 20201002080935.1660005-1-f4bug@amsat.org Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
| * hw/ssi/npcm7xx_fiu: Fix handling of unsigned integerPhilippe Mathieu-Daudé2020-10-082-7/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Fix integer handling issues handling issue reported by Coverity: hw/ssi/npcm7xx_fiu.c: 162 in npcm7xx_fiu_flash_read() >>> CID 1432730: Integer handling issues (NEGATIVE_RETURNS) >>> "npcm7xx_fiu_cs_index(fiu, f)" is passed to a parameter that cannot be negative. 162 npcm7xx_fiu_select(fiu, npcm7xx_fiu_cs_index(fiu, f)); hw/ssi/npcm7xx_fiu.c: 221 in npcm7xx_fiu_flash_write() 218 cs_id = npcm7xx_fiu_cs_index(fiu, f); 219 trace_npcm7xx_fiu_flash_write(DEVICE(fiu)->canonical_path, cs_id, addr, 220 size, v); >>> CID 1432729: Integer handling issues (NEGATIVE_RETURNS) >>> "cs_id" is passed to a parameter that cannot be negative. 221 npcm7xx_fiu_select(fiu, cs_id); Since the index of the flash can not be negative, return an unsigned type. Reported-by: Coverity (CID 1432729 & 1432730: NEGATIVE_RETURNS) Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Havard Skinnemoen <hskinnemoen@google.com> Message-id: 20200919132435.310527-1-f4bug@amsat.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
* | Merge remote-tracking branch 'remotes/rth/tags/pull-tcg-20201008' into stagingPeter Maydell2020-10-0819-216/+243
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Extend maximum gvec vector size Fix i386 avx2 dupi Fix mips host user-only write detection Misc cleanups. # gpg: Signature made Thu 08 Oct 2020 13:55:22 BST # gpg: using RSA key 7A481E78868B4DB6A85A05C064DF38E8AF7E215F # gpg: issuer "richard.henderson@linaro.org" # gpg: Good signature from "Richard Henderson <richard.henderson@linaro.org>" [full] # Primary key fingerprint: 7A48 1E78 868B 4DB6 A85A 05C0 64DF 38E8 AF7E 215F * remotes/rth/tags/pull-tcg-20201008: accel/tcg: Fix computing of is_write for MIPS tcg: Remove TCG_TARGET_HAS_cmp_vec tcg/optimize: Fold dup2_vec tcg: Fix generation of dupi_vec for 32-bit host tcg/i386: Fix dupi for avx2 32-bit hosts tcg: Remove TCGOpDef.used tcg: Move some TCG_CT_* bits to TCGArgConstraint bitfields tcg: Remove TCG_CT_REG tcg: Move sorted_args into TCGArgConstraint.sort_index tcg: Drop union from TCGArgConstraint tcg: Adjust simd_desc size encoding Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
| * | accel/tcg: Fix computing of is_write for MIPSKele Huang2020-10-081-4/+39
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Detect all MIPS store instructions in cpu_signal_handler for all available MIPS versions, and set is_write if encountering such store instructions. This fixed the error while dealing with self-modified code for MIPS. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Kele Huang <kele.hwang@gmail.com> Signed-off-by: Xu Zou <iwatchnima@gmail.com> Message-Id: <20201002081420.10814-1-kele.hwang@gmail.com> [rth: Use uintptr_t for pc to fix n32 build error.] Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
| * | tcg: Remove TCG_TARGET_HAS_cmp_vecRichard Henderson2020-10-083-3/+0Star
| | | | | | | | | | | | | | | | | | | | | The cmp_vec opcode is mandatory; this symbol is unused. Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
| * | tcg/optimize: Fold dup2_vecRichard Henderson2020-10-081-0/+15
| | | | | | | | | | | | | | | | | | | | | When the two arguments are identical, this can be reduced to dup_vec or to mov_vec from a tcg_constant_vec. Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
| * | tcg: Fix generation of dupi_vec for 32-bit hostRichard Henderson2020-10-081-4/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The definition of INDEX_op_dupi_vec is that it operates on units of tcg_target_ulong -- in this case 32 bits. It does not work to use this for a uint64_t value that happens to be small enough to fit in tcg_target_ulong. Fixes: d2fd745fe8b Fixes: db432672dc5 Cc: qemu-stable@nongnu.org Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
| * | tcg/i386: Fix dupi for avx2 32-bit hostsRichard Henderson2020-10-081-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The previous change wrongly stated that 32-bit avx2 should have used VPBROADCASTW. But that's a 16-bit broadcast and we want a 32-bit broadcast. Fixes: 7b60ef3264e Cc: qemu-stable@nongnu.org Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
| * | tcg: Remove TCGOpDef.usedRichard Henderson2020-10-081-3/+0Star
| | | | | | | | | | | | | | | | | | | | | The last user of this field disappeared in f69d277ece4. Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
| * | tcg: Move some TCG_CT_* bits to TCGArgConstraint bitfieldsRichard Henderson2020-10-082-23/+19Star
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | These are easier to set and test when they have their own fields. Reduce the size of alias_index and sort_index to 4 bits, which is sufficient for TCG_MAX_OP_ARGS. This leaves only the bits indicating constants within the ct field. Move all initialization to allocation time, rather than init individual fields in process_op_defs. Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
| * | tcg: Remove TCG_CT_REGRichard Henderson2020-10-0811-49/+4Star
| | | | | | | | | | | | | | | | | | | | | | | | This wasn't actually used for anything, really. All variable operands must accept registers, and which are indicated by the set in TCGArgConstraint.regs. Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
| * | tcg: Move sorted_args into TCGArgConstraint.sort_indexRichard Henderson2020-10-082-19/+18Star
| | | | | | | | | | | | | | | | | | | | | This uses an existing hole in the TCGArgConstraint structure and will be convenient for keeping the data in one place. Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
| * | tcg: Drop union from TCGArgConstraintRichard Henderson2020-10-0811-93/+91Star
| | | | | | | | | | | | | | | | | | | | | | | | The union is unused; let "regs" appear in the main structure without the "u.regs" wrapping. Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
| * | tcg: Adjust simd_desc size encodingRichard Henderson2020-10-082-20/+51
| |/ | | | | | | | | | | | | | | | | | | | | | | | | | | With larger vector sizes, it turns out oprsz == maxsz, and we only need to represent mismatch for oprsz <= 32. We do, however, need to represent larger oprsz and do so without reducing SIMD_DATA_BITS. Reduce the size of the oprsz field and increase the maxsz field. Steal the oprsz value of 24 to indicate equality with maxsz. Tested-by: Frank Chang <frank.chang@sifive.com> Reviewed-by: Frank Chang <frank.chang@sifive.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
* | Merge remote-tracking branch ↵Peter Maydell2020-10-0811-785/+831
|\ \ | |/ |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | 'remotes/ehabkost/tags/machine-next-pull-request' into staging machine + QOM queue, 2020-10-06 * QOM documentation fixes and cleanups (Eduardo Habkost) * user-mode: Prune build dependencies (Philippe Mathieu-Daudé) * qom: Improve error message (Philippe Mathieu-Daudé) * numa: hmat: require parent cache description before the next level one (Igor Mammedov) # gpg: Signature made Tue 06 Oct 2020 23:09:03 BST # gpg: using RSA key 5A322FD5ABC4D3DBACCFD1AA2807936F984DC5A6 # gpg: issuer "ehabkost@redhat.com" # gpg: Good signature from "Eduardo Habkost <ehabkost@redhat.com>" [full] # Primary key fingerprint: 5A32 2FD5 ABC4 D3DB ACCF D1AA 2807 936F 984D C5A6 * remotes/ehabkost/tags/machine-next-pull-request: (21 commits) numa: hmat: require parent cache description before the next level one kernel-doc: Remove $decl_type='type name' hack memory: Explicitly tag doc comments for structs qom: Explicitly tag doc comments for typedefs and structs kernel-doc: Handle function typedefs without asterisks kernel-doc: Handle function typedefs that return pointers docs/devel/qom: Avoid long lines docs/devel/qom: Remove usage of <code> docs/devel/qom: Use *emphasis* for emphasis docs/devel/qom: Fix indentation of code blocks docs/devel/qom: Fix indentation of bulleted list qom: Fix DECLARE_*CHECKER documentation qom: Improve error message displayed with missing object properties hw/core/cpu: Add missing 'exec/cpu-common.h' include hw/core/qdev-properties: Extract system-mode specific properties hw/core/qdev-properties: Export some integer-related functions hw/core/qdev-properties: Export qdev_prop_enum hw/core/qdev-properties: Export enum-related functions hw/core/qdev-properties: Fix code style hw/core/qdev-properties: Use qemu_strtoul() in set_pci_host_devaddr() ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
| * numa: hmat: require parent cache description before the next level oneIgor Mammedov2020-10-061-1/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Spec[1] defines 0 - 3 level memory side cache, however QEMU CLI allows to specify an intermediate cache level without specifying previous level. Such option(s) silently ignored when building HMAT table, which leads to incomplete cache information. Make sure that previous level exists and error out if it hasn't been provided. 1) ACPI 6.2A 5.2.27.5 Memory Side Cache Information Structure Fixes: https://bugzilla.redhat.com/show_bug.cgi?id=1842877 Signed-off-by: Igor Mammedov <imammedo@redhat.com> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com> Message-Id: <20201006150002.1601845-1-imammedo@redhat.com> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
| * kernel-doc: Remove $decl_type='type name' hackEduardo Habkost2020-10-061-11/+1Star
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The $decl_type='type name' hack makes it impossible to document macros with uppercase names (e.g. most of the macros in object.h). Now that we have explicitly tagged the struct and typedef doc comments in memory.h and object.h, we don't need that hack anymore. This will make the documentation for the macros in object.h finally be rendered as expected. Signed-off-by: Eduardo Habkost <ehabkost@redhat.com> Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Message-Id: <20201003024123.193840-6-ehabkost@redhat.com> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
| * memory: Explicitly tag doc comments for structsEduardo Habkost2020-10-061-3/+3
| | | | | | | | | | | | | | | | | | | | This will allow us to remove the QEMU-specific $decl_type='type name' hack from the kernel-doc script. Signed-off-by: Eduardo Habkost <ehabkost@redhat.com> Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Message-Id: <20201003024123.193840-5-ehabkost@redhat.com> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
| * qom: Explicitly tag doc comments for typedefs and structsEduardo Habkost2020-10-061-11/+11
| | | | | | | | | | | | | | | | | | | | | | If we explicitly indicate we are documenting a typedef or a struct, we'll be able to remove the $decl_type='type name' hack from kernel-doc. Signed-off-by: Eduardo Habkost <ehabkost@redhat.com> Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Message-Id: <20201003024123.193840-4-ehabkost@redhat.com> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
| * kernel-doc: Handle function typedefs without asterisksEduardo Habkost2020-10-061-1/+1
| | | | | | | | | | | | | | | | | | | | | | Example of typedef that was not parsed by kernel-doc: typedef void (ObjectUnparent)(Object *obj); Signed-off-by: Eduardo Habkost <ehabkost@redhat.com> Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Message-Id: <20201003024123.193840-3-ehabkost@redhat.com> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
| * kernel-doc: Handle function typedefs that return pointersEduardo Habkost2020-10-061-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | One example that was not being parsed correctly by kernel-doc is: typedef Object *(ObjectPropertyResolve)(Object *obj, void *opaque, const char *part); Signed-off-by: Eduardo Habkost <ehabkost@redhat.com> Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Message-Id: <20201003024123.193840-2-ehabkost@redhat.com> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
| * docs/devel/qom: Avoid long linesEduardo Habkost2020-10-061-3/+6
| | | | | | | | | | | | | | | | | | | | | | Long code lines don't look good in the rendered documents, make them shorter. Signed-off-by: Eduardo Habkost <ehabkost@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Message-Id: <20201003025424.199291-7-ehabkost@redhat.com> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
| * docs/devel/qom: Remove usage of <code>Eduardo Habkost2020-10-061-6/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | <code> is not valid reST syntax. Function @argument references don't need additional markup, so just remove <code></code>. Constants were changed to use reST ``code`` syntax Signed-off-by: Eduardo Habkost <ehabkost@redhat.com> Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Message-Id: <20201003025424.199291-6-ehabkost@redhat.com> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
| * docs/devel/qom: Use *emphasis* for emphasisEduardo Habkost2020-10-061-3/+3
| | | | | | | | | | | | | | | | | | | | <emphasis> is not valid reST syntax. Signed-off-by: Eduardo Habkost <ehabkost@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Message-Id: <20201003025424.199291-5-ehabkost@redhat.com> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
| * docs/devel/qom: Fix indentation of code blocksEduardo Habkost2020-10-061-38/+38
| | | | | | | | | | | | | | | | | | Some code blocks had one extra space, fix that. Signed-off-by: Eduardo Habkost <ehabkost@redhat.com> Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Message-Id: <20201003025424.199291-4-ehabkost@redhat.com> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
| * docs/devel/qom: Fix indentation of bulleted listEduardo Habkost2020-10-061-3/+3
| | | | | | | | | | | | | | | | | | | | The list was incorrectly parsed as a literal block due to indentation. Signed-off-by: Eduardo Habkost <ehabkost@redhat.com> Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Message-Id: <20201003025424.199291-3-ehabkost@redhat.com> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
| * qom: Fix DECLARE_*CHECKER documentationEduardo Habkost2020-10-061-2/+2
| | | | | | | | | | | | | | | | | | | | | | Correct copy/paste mistake in the DECLARE_INSTANCE_CHECKER and DECLARE_CLASS_CHECKERS documentation. Signed-off-by: Eduardo Habkost <ehabkost@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Message-Id: <20201003025424.199291-2-ehabkost@redhat.com> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
| * qom: Improve error message displayed with missing object propertiesPhilippe Mathieu-Daudé2020-10-061-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | Instead of only displaying the property missing, also display the object name. This help developer to quickly figure out the mistake without opening a debugger. Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com> Reviewed-by: Li Qiang <liq3ea@gmail.com> Acked-by: Paolo Bonzini <pbonzini@redhat.com> Message-Id: <20200920155340.401482-1-f4bug@amsat.org> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
| * hw/core/cpu: Add missing 'exec/cpu-common.h' includePhilippe Mathieu-Daudé2020-10-061-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | cpu_common_reset() uses tcg_flush_softmmu_tlb() which is declared in "exec/cpu-common.h". Add the missing header to avoid when refactoring other headers: hw/core/cpu.c: In function ‘cpu_common_reset’: hw/core/cpu.c:273:9: error: implicit declaration of function ‘tcg_flush_softmmu_tlb’ [-Werror=implicit-function-declaration] 273 | tcg_flush_softmmu_tlb(cpu); | ^~~~~~~~~~~~~~~~~~~~~ Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com> Message-Id: <20200908123433.105706-1-philmd@redhat.com> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
| * hw/core/qdev-properties: Extract system-mode specific propertiesPhilippe Mathieu-Daudé2020-10-062-682/+679Star
| | | | | | | | | | | | | | | | | | Move properties specific to machines into a separate file. Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20200930164949.1425294-9-philmd@redhat.com> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
| * hw/core/qdev-properties: Export some integer-related functionsPhilippe Mathieu-Daudé2020-10-062-22/+35
| | | | | | | | | | | | | | | | | | | | We are going to split this file and reuse these static functions. Declare them in the local "qdev-prop-internal.h" header. Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20200930164949.1425294-8-philmd@redhat.com> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
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