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* target/riscv: Emulate TIME CSRs for privileged modeAnup Patel2020-02-273-4/+92
* riscv: virt: Allow PCI address 0Bin Meng2020-02-271-0/+1
* target/riscv: Allow enabling the Hypervisor extensionAlistair Francis2020-02-272-0/+6
* target/riscv: Add the MSTATUS_MPV_ISSET helper macroAlistair Francis2020-02-274-4/+15
* target/riscv: Add support for the 32-bit MSTATUSH CSRAlistair Francis2020-02-276-0/+62
* target/riscv: Set htval and mtval2 on execptionsAlistair Francis2020-02-271-0/+10
* target/riscv: Raise the new execptions when 2nd stage translation failsAlistair Francis2020-02-271-6/+18
* target/riscv: Implement second stage MMUAlistair Francis2020-02-272-19/+175
* target/riscv: Allow specifying MMU stageAlistair Francis2020-02-271-9/+28
* target/riscv: Respect MPRV and SPRV for floating point opsAlistair Francis2020-02-271-1/+15
* target/riscv: Mark both sstatus and msstatus_hs as dirtyAlistair Francis2020-02-271-0/+13
* target/riscv: Disable guest FP support based on virtual statusAlistair Francis2020-02-271-0/+3
* target/riscv: Only set TB flags with FP status if enabledAlistair Francis2020-02-271-1/+4
* target/riscv: Remove the hret instructionAlistair Francis2020-02-272-6/+0Star
* target/riscv: Add hfence instructionsAlistair Francis2020-02-272-9/+54
* target/riscv: Add Hypervisor trap return supportAlistair Francis2020-02-271-10/+52
* target/riscv: Add hypvervisor trap supportAlistair Francis2020-02-271-10/+59
* target/riscv: Generate illegal instruction on WFI when V=1Alistair Francis2020-02-271-2/+3
* target/ricsv: Flush the TLB on virtulisation mode changesAlistair Francis2020-02-271-0/+5
* target/riscv: Add support for virtual interrupt settingAlistair Francis2020-02-271-5/+28
* target/riscv: Extend the SIP CSR to support virtulisationAlistair Francis2020-02-271-1/+12
* target/riscv: Extend the MIE CSR to support virtulisationAlistair Francis2020-02-271-4/+20
* target/riscv: Set VS bits in mideleg for Hyp extensionAlistair Francis2020-02-271-0/+3
* target/riscv: Add virtual register swapping functionAlistair Francis2020-02-273-0/+79
* target/riscv: Add Hypervisor machine CSRs accessesAlistair Francis2020-02-271-0/+27
* target/riscv: Add Hypervisor virtual CSRs accessesAlistair Francis2020-02-271-0/+116
* target/riscv: Add Hypervisor CSR access functionsAlistair Francis2020-02-271-2/+134
* target/riscv: Dump Hypervisor registers if enabledAlistair Francis2020-02-271-0/+33
* target/riscv: Print priv and virt in disas logAlistair Francis2020-02-271-0/+8
* target/riscv: Fix CSR perm checking for HS modeAlistair Francis2020-02-271-4/+14
* target/riscv: Add the force HS exception modeAlistair Francis2020-02-273-0/+26
* target/riscv: Add the virtulisation modeAlistair Francis2020-02-273-0/+25
* target/riscv: Rename the H irqs to VS irqsAlistair Francis2020-02-272-9/+9
* target/riscv: Add support for the new execption numbersAlistair Francis2020-02-274-20/+37
* target/riscv: Add the Hypervisor CSRs to CPUStateAlistair Francis2020-02-273-18/+48
* target/riscv: Add the Hypervisor extensionAlistair Francis2020-02-271-0/+1
* target/riscv: Convert MIP CSR to target_ulongAlistair Francis2020-02-272-2/+2
* Merge remote-tracking branch 'remotes/mst/tags/for_upstream' into stagingPeter Maydell2020-02-2728-83/+1562
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| * Fixed assert in vhost_user_set_mem_table_postcopyRaphael Norwitz2020-02-271-1/+1
| * vhost-user: only set slave channel for first vqAdrian Moreno2020-02-271-3/+5
| * acpi: cpuhp: document CPHP_GET_CPU_ID_CMD commandIgor Mammedov2020-02-271-0/+2
| * libvhost-user: implement in-band notificationsJohannes Berg2020-02-272-3/+114
| * docs: vhost-user: add in-band kick/call messagesJohannes Berg2020-02-271-18/+104
| * libvhost-user: handle NOFD flag in call/kick/err betterJohannes Berg2020-02-271-8/+16
| * libvhost-user-glib: use g_main_context_get_thread_default()Johannes Berg2020-02-271-1/+1
| * libvhost-user-glib: fix VugDev main fd cleanupJohannes Berg2020-02-273-7/+15
| * libvhost-user: implement VHOST_USER_PROTOCOL_F_REPLY_ACKJohannes Berg2020-02-271-2/+10
| * MAINTAINERS: add virtio-iommu related filesEric Auger2020-02-271-0/+6
| * hw/arm/virt: Add the virtio-iommu device tree mappingsEric Auger2020-02-272-7/+52
| * virtio-iommu-pci: Add virtio iommu pci supportEric Auger2020-02-275-0/+108
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