| Commit message (Expand) | Author | Age | Files | Lines |
... | |
| * | | target/mips: Document Loongson-3A CPU definitions | Philippe Mathieu-Daudé | 2021-08-25 | 1 | -2/+2 |
| * | | target/mips: Convert Vr54xx MSA* opcodes to decodetree | Philippe Mathieu-Daudé | 2021-08-25 | 3 | -53/+14 |
| * | | target/mips: Convert Vr54xx MUL* opcodes to decodetree | Philippe Mathieu-Daudé | 2021-08-25 | 3 | -24/+18 |
| * | | target/mips: Convert Vr54xx MACC* opcodes to decodetree | Philippe Mathieu-Daudé | 2021-08-25 | 3 | -16/+42 |
| * | | target/mips: Introduce decodetree structure for NEC Vr54xx extension | Philippe Mathieu-Daudé | 2021-08-25 | 5 | -0/+33 |
| * | | target/mips: Extract NEC Vr54xx helpers to vr54xx_helper.c | Philippe Mathieu-Daudé | 2021-08-25 | 3 | -118/+143 |
| * | | target/mips: Extract NEC Vr54xx helper definitions | Philippe Mathieu-Daudé | 2021-08-25 | 2 | -15/+27 |
| * | | target/mips: Introduce generic TRANS() macro for decodetree helpers | Philippe Mathieu-Daudé | 2021-08-25 | 1 | -0/+8 |
| * | | target/mips: Rename 'rtype' as 'r' | Philippe Mathieu-Daudé | 2021-08-25 | 6 | -46/+46 |
| * | | target/mips: Merge 32-bit/64-bit Release6 decodetree definitions | Philippe Mathieu-Daudé | 2021-08-25 | 4 | -40/+19 |
| * | | target/mips: Decode vendor extensions before MIPS ISAs | Philippe Mathieu-Daudé | 2021-08-25 | 1 | -3/+5 |
| * | | target/mips: Simplify PREF opcode | Philippe Mathieu-Daudé | 2021-08-25 | 1 | -6/+2 |
| * | | target/mips: Remove JR opcode unused arguments | Philippe Mathieu-Daudé | 2021-08-25 | 1 | -1/+1 |
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* | | Merge remote-tracking branch 'remotes/thuth-gitlab/tags/pull-request-2021-08-... | Peter Maydell | 2021-08-25 | 6 | -272/+259 |
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| * | | docs: make sphinx-build be quiet by default | Daniel P. Berrangé | 2021-08-25 | 1 | -1/+1 |
| * | | docs: split the CI docs into two files | Daniel P. Berrangé | 2021-08-25 | 3 | -157/+159 |
| * | | docs/about/removed-features: Move some CLI options to the right location | Thomas Huth | 2021-08-25 | 1 | -63/+61 |
| * | | docs/about: Add the missing release record in the subject | Yanan Wang | 2021-08-25 | 1 | -2/+2 |
| * | | docs/about: Unify the subject format | Yanan Wang | 2021-08-25 | 2 | -42/+42 |
| * | | docs/about: Remove the duplicated doc | Yanan Wang | 2021-08-25 | 1 | -13/+0 |
* | | | Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20210825'... | Peter Maydell | 2021-08-25 | 25 | -118/+2746 |
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| * | | docs: Document how to use gdb with unix sockets | Sebastian Meyer | 2021-08-25 | 1 | -1/+25 |
| * | | fsl-imx7: Instantiate SAI1/2/3 as unimplemented devices | Guenter Roeck | 2021-08-25 | 2 | -0/+12 |
| * | | sbsa-ref: Rename SBSA_GWDT enum value | Eduardo Habkost | 2021-08-25 | 1 | -3/+3 |
| * | | hw/dma/pl330: Add memory region to replace default | Wen, Jianxian | 2021-08-25 | 3 | -4/+28 |
| * | | fsl-imx6ul: Instantiate SAI1/2/3 and ASRC as unimplemented devices | Guenter Roeck | 2021-08-25 | 1 | -0/+12 |
| * | | hw/char/pl011: add support for sending break | Jan Luebbe | 2021-08-25 | 1 | -0/+6 |
| * | | target/arm: kvm: use RCU_READ_LOCK_GUARD() in kvm_arch_fixup_msi_route() | Hamza Mahfooz | 2021-08-25 | 1 | -9/+8 |
| * | | target/arm: Implement M-profile trapping on division by zero | Peter Maydell | 2021-08-25 | 5 | -6/+26 |
| * | | target/arm: Re-indent sdiv and udiv helpers | Peter Maydell | 2021-08-25 | 1 | -6/+9 |
| * | | target/arm: Implement MVE interleaving loads/stores | Peter Maydell | 2021-08-25 | 4 | -0/+495 |
| * | | target/arm: Implement MVE scatter-gather immediate forms | Peter Maydell | 2021-08-25 | 4 | -36/+150 |
| * | | target/arm: Implement MVE scatter-gather insns | Peter Maydell | 2021-08-25 | 4 | -0/+270 |
| * | | target/arm: Implement MVE VCTP | Peter Maydell | 2021-08-25 | 6 | -1/+58 |
| * | | target/arm: Implement MVE VPNOT | Peter Maydell | 2021-08-25 | 4 | -0/+38 |
| * | | target/arm: Implement MVE VMOV to/from 2 general-purpose registers | Peter Maydell | 2021-08-25 | 4 | -1/+91 |
| * | | target/arm: Implement MVE VMAXA, VMINA | Peter Maydell | 2021-08-25 | 4 | -0/+40 |
| * | | target/arm: Implement MVE VQABS, VQNEG | Peter Maydell | 2021-08-25 | 4 | -0/+50 |
| * | | target/arm: Implement MVE saturating doubling multiply accumulates | Peter Maydell | 2021-08-25 | 4 | -0/+120 |
| * | | target/arm: Implement MVE VMLA | Peter Maydell | 2021-08-25 | 4 | -0/+11 |
| * | | target/arm: Implement MVE VMLADAV and VMLSLDAV | Peter Maydell | 2021-08-25 | 4 | -5/+150 |
| * | | target/arm: Rename MVEGenDualAccOpFn to MVEGenLongDualAccOpFn | Peter Maydell | 2021-08-25 | 1 | -8/+8 |
| * | | target/arm: Implement MVE narrowing moves | Peter Maydell | 2021-08-25 | 4 | -0/+132 |
| * | | target/arm: Implement MVE VABAV | Peter Maydell | 2021-08-25 | 4 | -0/+82 |
| * | | target/arm: Implement MVE integer min/max across vector | Peter Maydell | 2021-08-25 | 4 | -2/+150 |
| * | | target/arm: Move 'x' and 'a' bit definitions into vmlaldav formats | Peter Maydell | 2021-08-25 | 1 | -8/+8 |
| * | | target/arm: Implement MVE shift-by-scalar | Peter Maydell | 2021-08-25 | 4 | -3/+76 |
| * | | target/arm: Implement MVE VMLAS | Peter Maydell | 2021-08-25 | 4 | -0/+34 |
| * | | target/arm: Implement MVE VPSEL | Peter Maydell | 2021-08-25 | 4 | -2/+28 |
| * | | target/arm: Implement MVE integer vector-vs-scalar comparisons | Peter Maydell | 2021-08-25 | 4 | -12/+127 |