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* MAINTAINERS: add vga entriesGerd Hoffmann2018-05-241-0/+21
| | | | | | | | | Add entries for standard vga, virtio-gpu and cirrus. Signed-off-by: Gerd Hoffmann <kraxel@redhat.com> Reviewed-by: Marc-André Lureau <marcandre.lureau@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-id: 20180522165058.15404-7-kraxel@redhat.com
* bochs-display: add pcie supportGerd Hoffmann2018-05-241-0/+8
| | | | | Signed-off-by: Gerd Hoffmann <kraxel@redhat.com> Message-id: 20180522165058.15404-6-kraxel@redhat.com
* bochs-display: add dirty tracking supportGerd Hoffmann2018-05-241-2/+32
| | | | | | Signed-off-by: Gerd Hoffmann <kraxel@redhat.com> Reviewed-by: Marc-André Lureau <marcandre.lureau@redhat.com> Message-id: 20180522165058.15404-5-kraxel@redhat.com
* hw/display: add new bochs-display deviceGerd Hoffmann2018-05-242-0/+326
| | | | | | | | | | | | | | | | | | | | | | | | | | | After writing up the virtual mdev device emulating a display supporting the bochs vbe dispi interface (mbochs.ko) and seeing how simple it actually is I've figured that would be useful for qemu too. So, here it is, -device bochs-display. It is basically -device VGA without legacy vga emulation. PCI bar 0 is the framebuffer, PCI bar 2 is mmio with the registers. The vga registers are simply not there though, neither in the legacy ioport location nor in the mmio bar. Consequently it is PCI class DISPLAY_OTHER not DISPLAY_VGA. So there is no text mode emulation, no weird video modes (planar, 256color palette), no memory window at 0xa0000. Just a linear framebuffer in the pci memory bar. And the amount of code to emulate this (and therefore the attack surface) is an order of magnitude smaller when compared to vga emulation. Compatibility wise it works with OVMF (latest git master). The bochs-drm.ko linux kernel module can handle it just fine too. So UEFI guests should not see any functional difference to VGA. Signed-off-by: Gerd Hoffmann <kraxel@redhat.com> Tested-by: Marc-André Lureau <marcandre.lureau@redhat.com> Reviewed-by: Marc-André Lureau <marcandre.lureau@redhat.com> Message-id: 20180522165058.15404-4-kraxel@redhat.com
* vga-pci: use PCI_VGA_MMIO_SIZEGerd Hoffmann2018-05-241-2/+4
| | | | | | | Signed-off-by: Gerd Hoffmann <kraxel@redhat.com> Reviewed-by: Marc-André Lureau <marcandre.lureau@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-id: 20180522165058.15404-3-kraxel@redhat.com
* vga: move bochs vbe defines to header fileGerd Hoffmann2018-05-243-46/+71
| | | | | | | | | | Create a new header file, move the bochs vbe dispi interface defines to it, so they can be used outside vga code. Signed-off-by: Gerd Hoffmann <kraxel@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Marc-André Lureau <marcandre.lureau@redhat.com> Message-id: 20180522165058.15404-2-kraxel@redhat.com
* vga: catch depth 0Gerd Hoffmann2018-05-241-5/+18
| | | | | | | | | | | | | | | | | depth == 0 is used to indicate 256 color modes. Our region calculation goes wrong in that case. So detect that and just take the safe code path we already have for the wraparound case. While being at it also catch depth == 15 (where our region size calculation goes wrong too). And make the comment more verbose, explaining what is going on here. Without this windows guest install might trigger an assert due to trying to check dirty bitmap outside the snapshot region. Fixes: https://bugzilla.redhat.com/show_bug.cgi?id=1575541 Signed-off-by: Gerd Hoffmann <kraxel@redhat.com> Message-id: 20180514103117.21059-1-kraxel@redhat.com
* Merge remote-tracking branch 'remotes/ehabkost/tags/x86-next-pull-request' ↵Peter Maydell2018-05-224-4/+39
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | into staging Speculative store buffer bypass mitigation (CVE-2018-3639) # gpg: Signature made Mon 21 May 2018 23:00:46 BST # gpg: using RSA key 2807936F984DC5A6 # gpg: Good signature from "Eduardo Habkost <ehabkost@redhat.com>" # Primary key fingerprint: 5A32 2FD5 ABC4 D3DB ACCF D1AA 2807 936F 984D C5A6 * remotes/ehabkost/tags/x86-next-pull-request: i386: define the AMD 'virt-ssbd' CPUID feature bit (CVE-2018-3639) i386: Define the Virt SSBD MSR and handling of it (CVE-2018-3639) i386: define the 'ssbd' CPUID feature bit (CVE-2018-3639) Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
| * i386: define the AMD 'virt-ssbd' CPUID feature bit (CVE-2018-3639)Konrad Rzeszutek Wilk2018-05-211-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | AMD Zen expose the Intel equivalant to Speculative Store Bypass Disable via the 0x80000008_EBX[25] CPUID feature bit. This needs to be exposed to guest OS to allow them to protect against CVE-2018-3639. Signed-off-by: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com> Reviewed-by: Daniel P. Berrangé <berrange@redhat.com> Signed-off-by: Daniel P. Berrangé <berrange@redhat.com> Message-Id: <20180521215424.13520-3-berrange@redhat.com> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
| * i386: Define the Virt SSBD MSR and handling of it (CVE-2018-3639)Konrad Rzeszutek Wilk2018-05-213-2/+36
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | "Some AMD processors only support a non-architectural means of enabling speculative store bypass disable (SSBD). To allow a simplified view of this to a guest, an architectural definition has been created through a new CPUID bit, 0x80000008_EBX[25], and a new MSR, 0xc001011f. With this, a hypervisor can virtualize the existence of this definition and provide an architectural method for using SSBD to a guest. Add the new CPUID feature, the new MSR and update the existing SSBD support to use this MSR when present." (from x86/speculation: Add virtualized speculative store bypass disable support in Linux). Signed-off-by: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com> Reviewed-by: Daniel P. Berrangé <berrange@redhat.com> Signed-off-by: Daniel P. Berrangé <berrange@redhat.com> Message-Id: <20180521215424.13520-4-berrange@redhat.com> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
| * i386: define the 'ssbd' CPUID feature bit (CVE-2018-3639)Daniel P. Berrangé2018-05-212-1/+2
|/ | | | | | | | | | | | New microcode introduces the "Speculative Store Bypass Disable" CPUID feature bit. This needs to be exposed to guest OS to allow them to protect against CVE-2018-3639. Signed-off-by: Daniel P. Berrangé <berrange@redhat.com> Reviewed-by: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com> Signed-off-by: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com> Message-Id: <20180521215424.13520-2-berrange@redhat.com> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
* Merge remote-tracking branch 'remotes/mjt/tags/trivial-patches-fetch' into ↵Peter Maydell2018-05-2148-348/+187Star
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | staging trivial patches for 2018-05-20 # gpg: Signature made Sun 20 May 2018 07:13:20 BST # gpg: using RSA key 701B4F6B1A693E59 # gpg: Good signature from "Michael Tokarev <mjt@tls.msk.ru>" # gpg: aka "Michael Tokarev <mjt@corpit.ru>" # gpg: aka "Michael Tokarev <mjt@debian.org>" # Primary key fingerprint: 6EE1 95D1 886E 8FFB 810D 4324 457C E0A0 8044 65C5 # Subkey fingerprint: 7B73 BAD6 8BE7 A2C2 8931 4B22 701B 4F6B 1A69 3E59 * remotes/mjt/tags/trivial-patches-fetch: (22 commits) acpi: fix a comment about aml_call0() qapi/net.json: Fix the version number of the "vlan" removal gdbstub: Handle errors in gdb_accept() gdbstub: Use qemu_set_cloexec() replace functions which are only available in glib-2.24 typedefs: Remove PcGuestInfo from qemu/typedefs.h qemu-options: Allow -no-user-config again hw/timer/mt48t59: Fix bit-rotten NVRAM_PRINTF format strings Remove unnecessary variables for function return value trivial: Do not include pci.h if it is not necessary tests: fix tpm-crb tpm-tis tests race hw/ide/ahci: Keep ALLWINNER_AHCI() macro internal qemu-img-cmds.hx: add passive-aggressive note qemu-img: Make documentation between .texi and .hx consistent qemu-img: remove references to GEN_DOCS qemu-img.texi: fix command ordering qemu-img-commands.hx: argument ordering fixups HACKING: document preference for g_new instead of g_malloc qemu-option-trace: -trace enable= is a pattern, not a file slirp/debug: Print IP addresses in human readable form ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
| * acpi: fix a comment about aml_call0()Marc-André Lureau2018-05-201-1/+1
| | | | | | | | | | | | Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
| * qapi/net.json: Fix the version number of the "vlan" removalThomas Huth2018-05-201-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | "vlan" will be dropped in 2.13, not in 2.12. And while we're at it, use the better wording "dropped in" instead of "removed with" (also for the "dump" removal). Reported-by: Stefan Hajnoczi <stefanha@redhat.com> Reported-by: Eric Blake <eblake@redhat.com> Signed-off-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Eric Blake <eblake@redhat.com> Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
| * gdbstub: Handle errors in gdb_accept()Peter Maydell2018-05-201-4/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | In gdb_accept(), we both fail to check all errors (notably that from socket_set_nodelay(), as Coverity notes in CID 1005666), and fail to return an error status back to our caller. Correct both of these things, so that errors in accept() result in our stopping with a useful error message rather than ignoring it. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Thomas Huth <thuth@redhat.com> Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
| * gdbstub: Use qemu_set_cloexec()Peter Maydell2018-05-201-6/+2Star
| | | | | | | | | | | | | | | | | | | | | | | | Use the utility routine qemu_set_cloexec() rather than manually calling fcntl(). This lets us drop the #ifndef _WIN32 guards and also means Coverity doesn't complain that we're ignoring the fcntl error return (CID 1005665, CID 1005667). Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Thomas Huth <thuth@redhat.com> Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
| * replace functions which are only available in glib-2.24Olaf Hering2018-05-201-4/+2Star
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently the minimal supported version of glib is 2.22. Since testing is done with a glib that claims to be 2.22, but in fact has APIs from newer version of glib, this bug was not caught during submit of the patch referenced below. Replace g_realloc_n, which is available only since 2.24, with g_renew. Fixes commit 418026ca43 ("util: Introduce vfio helpers") Signed-off-by: Olaf Hering <olaf@aepfle.de> Reviewed-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Cornelia Huck <cohuck@redhat.com> Signed-off-by: Michael Tokarev <mjt@tls.msk.ru> CC: qemu-stable@nongnu.org
| * typedefs: Remove PcGuestInfo from qemu/typedefs.hPhilippe Mathieu-Daudé2018-05-201-1/+0Star
| | | | | | | | | | | | | | | | It is long gone since e4e8ba04c2007 ... Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Thomas Huth <thuth@redhat.com> Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
| * qemu-options: Allow -no-user-config againMichal Privoznik2018-05-201-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | After 1217d6ca2bf28c0febe1bd7d5b3fa912bbf6af2a we error out explicitly if an unknown -option was passed on the command line. However, we are doing two pass command line option parsing. In the first pass we just look for -no-user-config or -nodefconfig being present which determines whether we load user config or not. Then in the second pass we finally parse everything else throwing an error if an unsupported -option was found. Problem is that in the second pass -no-user-config and -nodefconfig are not handled explicitly which makes us throw the unsupported option error. Signed-off-by: Michal Privoznik <mprivozn@redhat.com> Reviewed-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Marc-André Lureau <marcandre.lureau@redhat.com> Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
| * hw/timer/mt48t59: Fix bit-rotten NVRAM_PRINTF format stringsThomas Huth2018-05-202-8/+5Star
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When compiling with NVRAM_PRINTF enabled, gcc currently bails out with: CC hw/timer/m48t59.o CC hw/timer/m48t59-isa.o hw/timer/m48t59.c: In function ‘NVRAM_writeb’: hw/timer/m48t59.c:460:5: error: format ‘%x’ expects argument of type ‘unsigned int’, but argument 3 has type ‘hwaddr’ [-Werror=format=] NVRAM_PRINTF("%s: 0x%08x => 0x%08x\n", __func__, addr, val); ^ hw/timer/m48t59.c:460:5: error: format ‘%x’ expects argument of type ‘unsigned int’, but argument 4 has type ‘uint64_t’ [-Werror=format=] hw/timer/m48t59.c: In function ‘NVRAM_readb’: hw/timer/m48t59.c:492:5: error: format ‘%x’ expects argument of type ‘unsigned int’, but argument 3 has type ‘hwaddr’ [-Werror=format=] NVRAM_PRINTF("%s: 0x%08x <= 0x%08x\n", __func__, addr, retval); Fix it by using the correct format strings and while we're at it, also change the definition of NVRAM_PRINTF so that this can not bit-rot so easily again. Signed-off-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
| * Remove unnecessary variables for function return valueLaurent Vivier2018-05-2020-248/+79Star
| | | | | | | | | | | | | | | | | | Re-run Coccinelle script scripts/coccinelle/return_directly.cocci Signed-off-by: Laurent Vivier <lvivier@redhat.com> ppc part Acked-by: David Gibson <david@gibson.dropbear.id.au> Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
| * trivial: Do not include pci.h if it is not necessaryThomas Huth2018-05-203-4/+0Star
| | | | | | | | | | | | | | | | | | There is no need to include pci.h in these files. Signed-off-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
| * tests: fix tpm-crb tpm-tis tests raceMarc-André Lureau2018-05-201-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | No need to close the TPM data socket on the emulator end, qemu will close it after a SHUTDOWN. This avoids a race between close() and read() in the TPM data thread. Reported-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Signed-off-by: Stefan Berger <stefanb@linux.vnet.ibm.com> Reviewed-by: Daniel P. Berrangé <berrange@redhat.com> Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
| * hw/ide/ahci: Keep ALLWINNER_AHCI() macro internalPhilippe Mathieu-Daudé2018-05-202-3/+3
| | | | | | | | | | | | | | | | The ALLWINNER_AHCI() macro is only used in ahci-allwinner.c. Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: John Snow <jsnow@redhat.com> Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
| * qemu-img-cmds.hx: add passive-aggressive noteJohn Snow2018-05-201-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | I'm kidding. It's very easy to forget there are per-command sections in the texi, and insane that we don't autogenerate those, too. Until then, leave a little post-it note in this .hx file until I find a way to delete it. Signed-off-by: John Snow <jsnow@redhat.com> Reviewed-by: Jeff Cody <jcody@redhat.com> Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
| * qemu-img: Make documentation between .texi and .hx consistentJohn Snow2018-05-202-14/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | These are also different and out of order for whatever reason. I'd like to automate this in the future, but for now let's put on the band-aid. In the case of resize, there were options missing from all three docstrings; the new string is based on the code. Signed-off-by: John Snow <jsnow@redhat.com> Reviewed-by: Jeff Cody <jcody@redhat.com> Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
| * qemu-img: remove references to GEN_DOCSJohn Snow2018-05-202-3/+0Star
| | | | | | | | | | | | | | | | | | Nothing seemingly uses this. (jcody: commit 77bd1119ba even mentions that it appears unused) Signed-off-by: John Snow <jsnow@redhat.com> Reviewed-by: Jeff Cody <jcody@redhat.com> Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
| * qemu-img.texi: fix command orderingJohn Snow2018-05-201-28/+30
| | | | | | | | | | | | | | | | This should match the summary ordering, which is alphabetical. Signed-off-by: John Snow <jsnow@redhat.com> Reviewed-by: Jeff Cody <jcody@redhat.com> Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
| * qemu-img-commands.hx: argument ordering fixupsJohn Snow2018-05-201-3/+3
| | | | | | | | | | | | | | | | | | | | The TEXI and string versions are actually identical, except for markup. We can probably automate this... but make the ordering the same until then. Signed-off-by: John Snow <jsnow@redhat.com> Reviewed-by: Jeff Cody <jcody@redhat.com> Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
| * HACKING: document preference for g_new instead of g_mallocMurilo Opsfelder Araujo2018-05-201-0/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch documents the preference for g_new instead of g_malloc. The reasons were adapted from commit b45c03f585ea9bb1af76c73e82195418c294919d. Discussion in QEMU's mailing list: http://lists.nongnu.org/archive/html/qemu-devel/2018-05/msg03238.html Cc: qemu-devel@nongnu.org Cc: David Hildenbrand <david@redhat.com> Cc: Eduardo Habkost <ehabkost@redhat.com> Cc: Markus Armbruster <armbru@redhat.com> Cc: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Murilo Opsfelder Araujo <muriloo@linux.ibm.com> Reviewed-by: Eric Blake <eblake@redhat.com> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: David Hildenbrand <david@redhat.com> Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
| * qemu-option-trace: -trace enable= is a pattern, not a fileMichael Tokarev2018-05-201-3/+2Star
| | | | | | | | Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
| * slirp/debug: Print IP addresses in human readable formAlexey Kardashevskiy2018-05-203-8/+8
| | | | | | | | | | Signed-off-by: Alexey Kardashevskiy <aik@ozlabs.ru> Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
| * misc, ide: remove use of HWADDR_PRIx in trace eventsDaniel P. Berrangé2018-05-202-6/+6
| | | | | | | | | | | | | | | | | | | | The trace events all use a uint64_t data type, so should be using the corresponding PRIx64 format, not HWADDR_PRIx which is intended for use with the 'hwaddr' type. Signed-off-by: Daniel P. Berrangé <berrange@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
| * tcg: fix s/compliment/complement/ typosEmilio G. Cota2018-05-203-3/+3
| | | | | | | | | | Signed-off-by: Emilio G. Cota <cota@braap.org> Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
* | Merge remote-tracking branch 'remotes/rth/tags/pull-fpu-20180518' into stagingPeter Maydell2018-05-218-42/+57
|\ \ | |/ |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Honor CPU_DUMP_FPU # gpg: Signature made Fri 18 May 2018 22:56:12 BST # gpg: using RSA key 64DF38E8AF7E215F # gpg: Good signature from "Richard Henderson <richard.henderson@linaro.org>" # Primary key fingerprint: 7A48 1E78 868B 4DB6 A85A 05C0 64DF 38E8 AF7E 215F * remotes/rth/tags/pull-fpu-20180518: target/xtensa: Honor CPU_DUMP_FPU target/unicore32: Honor CPU_DUMP_FPU target/sparc: Honor CPU_DUMP_FPU target/s390x: Honor CPU_DUMP_FPU target/riscv: Honor CPU_DUMP_FPU target/ppc: Honor CPU_DUMP_FPU target/mips: Honor CPU_DUMP_FPU target/alpha: Honor CPU_DUMP_FPU Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
| * target/xtensa: Honor CPU_DUMP_FPURichard Henderson2018-05-181-1/+2
| | | | | | | | | | | | Acked-by: Max Filippov <jcmvbkbc@gmail.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
| * target/unicore32: Honor CPU_DUMP_FPURichard Henderson2018-05-181-1/+3
| | | | | | | | | | | | Cc: Guan Xuetao <gxt@mprc.pku.edu.cn> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
| * target/sparc: Honor CPU_DUMP_FPURichard Henderson2018-05-181-7/+10
| | | | | | | | | | | | | | Cc: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Cc: Artyom Tarasenko <atar4qemu@gmail.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
| * target/s390x: Honor CPU_DUMP_FPURichard Henderson2018-05-181-11/+12
| | | | | | | | | | | | | | | | | | Also do not dump both "fpu" and "vector" registers as the former overlaps the latter. Cc: Alexander Graf <agraf@suse.de> Reviewed-by: David Hildenbrand <david@redhat.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
| * target/riscv: Honor CPU_DUMP_FPURichard Henderson2018-05-181-5/+7
| | | | | | | | | | | | | | | | | | Cc: Palmer Dabbelt <palmer@sifive.com> Cc: Sagar Karandikar <sagark@eecs.berkeley.edu> Cc: Bastian Koppelmann <kbastian@mail.uni-paderborn.de> Reviewed-by: Michael Clark <mjc@sifive.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
| * target/ppc: Honor CPU_DUMP_FPURichard Henderson2018-05-181-7/+13
| | | | | | | | | | | | | | Cc: Alexander Graf <agraf@suse.de> Cc: David Gibson <david@gibson.dropbear.id.au> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
| * target/mips: Honor CPU_DUMP_FPURichard Henderson2018-05-181-1/+2
| | | | | | | | | | | | | | Cc: Aurelien Jarno <aurelien@aurel32.net> Cc: Yongbok Kim <yongbok.kim@mips.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
| * target/alpha: Honor CPU_DUMP_FPURichard Henderson2018-05-181-9/+8Star
|/ | | | | Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
* Merge remote-tracking branch ↵Peter Maydell2018-05-1822-116/+5778
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | 'remotes/pmaydell/tags/pull-target-arm-20180518' into staging target-arm queue: * Initial part of SVE implementation (currently disabled) * smmuv3: fix some minor Coverity issues * add model of Xilinx ZynqMP generic DMA controller * expose (most) Arm coprocessor/system registers to gdb via QEMU's gdbstub, for reads only # gpg: Signature made Fri 18 May 2018 18:18:27 BST # gpg: using RSA key 3C2525ED14360CDE # gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" # gpg: aka "Peter Maydell <pmaydell@gmail.com>" # gpg: aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>" # Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83 15CF 3C25 25ED 1436 0CDE * remotes/pmaydell/tags/pull-target-arm-20180518: (32 commits) target/arm: Implement SVE Permute - Extract Group target/arm: Implement SVE Integer Wide Immediate - Predicated Group target/arm: Implement SVE Bitwise Immediate Group target/arm: Implement SVE Element Count Group target/arm: Implement SVE floating-point trig select coefficient target/arm: Implement SVE floating-point exponential accelerator target/arm: Implement SVE Compute Vector Address Group target/arm: Implement SVE Bitwise Shift - Unpredicated Group target/arm: Implement SVE Stack Allocation Group target/arm: Implement SVE Index Generation Group target/arm: Implement SVE Integer Arithmetic - Unpredicated Group target/arm: Implement SVE Integer Multiply-Add Group target/arm: Implement SVE Integer Arithmetic - Unary Predicated Group target/arm: Implement SVE bitwise shift by wide elements (predicated) target/arm: Implement SVE bitwise shift by vector (predicated) target/arm: Implement SVE bitwise shift by immediate (predicated) target/arm: Implement SVE Integer Reduction Group target/arm: Implement SVE Integer Binary Arithmetic - Predicated Group target/arm: Implement SVE Predicate Misc Group target/arm: Implement SVE Predicate Logical Operations Group ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
| * target/arm: Implement SVE Permute - Extract GroupRichard Henderson2018-05-184-0/+124
| | | | | | | | | | | | | | Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20180516223007.10256-26-richard.henderson@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
| * target/arm: Implement SVE Integer Wide Immediate - Predicated GroupRichard Henderson2018-05-184-1/+224
| | | | | | | | | | | | | | Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20180516223007.10256-25-richard.henderson@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
| * target/arm: Implement SVE Bitwise Immediate GroupRichard Henderson2018-05-182-0/+66
| | | | | | | | | | | | | | Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20180516223007.10256-24-richard.henderson@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
| * target/arm: Implement SVE Element Count GroupRichard Henderson2018-05-184-1/+465
| | | | | | | | | | | | | | Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20180516223007.10256-23-richard.henderson@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
| * target/arm: Implement SVE floating-point trig select coefficientRichard Henderson2018-05-184-0/+72
| | | | | | | | | | | | | | Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20180516223007.10256-22-richard.henderson@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
| * target/arm: Implement SVE floating-point exponential acceleratorRichard Henderson2018-05-184-0/+125
| | | | | | | | | | | | | | Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20180516223007.10256-21-richard.henderson@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
generated by cgit v1.2.3-55-g7522 (git 2.39.0) at 2025-04-25 12:30:19 +0200