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| * target/arm: Set ISSIs16Bit in make_issinfoRichard Henderson2020-01-171-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | During the conversion to decodetree, the setting of ISSIs16Bit got lost. This causes the guest os to incorrectly adjust trapping memory operations. Cc: qemu-stable@nongnu.org Fixes: 46beb58efbb8a2a32 ("target/arm: Convert T16, load (literal)") Reported-by: Jeff Kubascik <jeff.kubascik@dornerworks.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20200117004618.2742-3-richard.henderson@linaro.org Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
| * target/arm: Return correct IL bit in merge_syn_data_abortJeff Kubascik2020-01-171-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The IL bit is set for 32-bit instructions, thus passing false with the is_16bit parameter to syn_data_abort_with_iss() makes a syn mask that always has the IL bit set. Pass is_16bit as true to make the initial syn mask have IL=0, so that the final IL value comes from or'ing template_syn. Cc: qemu-stable@nongnu.org Fixes: aaa1f954d4ca ("target-arm: A64: Create Instruction Syndromes for Data Aborts") Signed-off-by: Jeff Kubascik <jeff.kubascik@dornerworks.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20200117004618.2742-2-richard.henderson@linaro.org [rth: Extracted this as a self-contained bug fix from a larger patch] Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
| * arm/gicv3: update virtual irq state after IAR register readJeff Kubascik2020-01-171-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | The IAR0/IAR1 register is used to acknowledge an interrupt - a read of the register activates the highest priority pending interrupt and provides its interrupt ID. Activating an interrupt can change the CPU's virtual interrupt state - this change makes sure the virtual irq state is updated. Signed-off-by: Jeff Kubascik <jeff.kubascik@dornerworks.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Message-id: 20200113154607.97032-1-jeff.kubascik@dornerworks.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
| * target/arm: adjust program counter for wfi exception in AArch32Jeff Kubascik2020-01-171-1/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The wfi instruction can be configured to be trapped by a higher exception level, such as the EL2 hypervisor. When the instruction is trapped, the program counter should contain the address of the wfi instruction that caused the exception. The program counter is adjusted for this in the wfi op helper function. However, this correction is done to env->pc, which only applies to AArch64 mode. For AArch32, the program counter is stored in env->regs[15]. This adds an if-else statement to modify the correct program counter location based on the the current CPU mode. Signed-off-by: Jeff Kubascik <jeff.kubascik@dornerworks.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
| * i.MX: add an emulation for RNGCMartin Kaiser2020-01-175-0/+330
| | | | | | | | | | | | | | | | | | | | | | | | | | Add an emulation for the RNGC random number generator and the compatible RNGB variant. These peripherals are included (at least) in imx25 and imx35 chipsets. The emulation supports the initial self test, reseeding the prng and reading random numbers. Signed-off-by: Martin Kaiser <martin@kaiser.cx> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
| * target/arm/arm-semi: fix SYS_OPEN to return nonzero filehandleMasahiro Yamada2020-01-171-2/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | According to the specification "Semihosting for AArch32 and Aarch64", the SYS_OPEN operation should return: - A nonzero handle if the call is successful - -1 if the call is not successful So, it should never return 0. Prior to commit 35e9a0a8ce4b ("target/arm/arm-semi: Make semihosting code hand out its own file descriptors"), the guest fd matched to the host fd. It returned a nonzero handle on success since the fd 0 is already used for stdin. Now that the guest fd is the index of guestfd_array, it starts from 0. I noticed this issue particularly because Trusted Firmware-A built with PLAT=qemu is no longer working. Its io_semihosting driver only handles a positive return value as a valid filehandle. Basically, there are two ways to fix this: - Use (guestfd - 1) as the index of guestfs_arrary. We need to insert increment/decrement to convert the guestfd and the array index back and forth. - Keep using guestfd as the index of guestfs_array. The first entry of guestfs_array is left unused. I thought the latter is simpler. We end up with wasting a small piece of memory for the unused first entry of guestfd_array, but this is probably not a big deal. Fixes: 35e9a0a8ce4b ("target/arm/arm-semi: Make semihosting code hand out its own file descriptors") Cc: qemu-stable@nongnu.org Signed-off-by: Masahiro Yamada <masahiroy@kernel.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20200109041228.10131-1-masahiroy@kernel.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
| * hw/arm/allwinner-a10: Remove local qemu_irq variablesPhilippe Mathieu-Daudé2020-01-171-5/+4Star
| | | | | | | | | | | | | | | | | | | | We won't reuse the CPU IRQ/FIQ variables. Simplify by calling qdev_get_gpio_in() in place. Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-id: 20191230110953.25496-6-f4bug@amsat.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
| * hw/arm/allwinner-a10: Simplify by passing IRQs with qdev_pass_gpios()Philippe Mathieu-Daudé2020-01-172-14/+11Star
| | | | | | | | | | | | | | | | | | | | | | | | By calling qdev_pass_gpios() we don't need to hold a copy of the IRQs from the INTC into the SoC state. Instead of filling an array of qemu_irq and passing it around, we can now directly call qdev_get_gpio_in() on the SoC. Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-id: 20191230110953.25496-5-f4bug@amsat.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
| * hw/arm/allwinner-a10: Move SoC definitions out of headerPhilippe Mathieu-Daudé2020-01-172-6/+6
| | | | | | | | | | | | | | | | | | | | These definitions are specific to the A10 SoC and don't need to be exported to the different Allwinner peripherals. Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-id: 20191230110953.25496-4-f4bug@amsat.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
| * tests/boot_linux_console: Add a SD card test for the CubieBoardPhilippe Mathieu-Daudé2020-01-171-0/+44
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The kernel image and DeviceTree blob are built by the Armbian project (based on Debian): https://docs.armbian.com/Developer-Guide_Build-Preparation/ The cpio image used comes from the linux-build-test project: https://github.com/groeck/linux-build-test If ARM is a target being built, "make check-acceptance" will automatically include this test by the use of the "arch:arm" tags. Alternatively, this test can be run using: $ avocado --show=console run -t machine:cubieboard tests/acceptance/boot_linux_console.py console: Uncompressing Linux... done, booting the kernel. console: Booting Linux on physical CPU 0x0 console: Linux version 4.20.7-sunxi (root@armbian.com) (gcc version 7.2.1 20171011 (Linaro GCC 7.2-2017.11)) #5.75 SMP Fri Feb 8 09:02:10 CET 2019 [...] console: ahci-sunxi 1c18000.sata: Linked as a consumer to regulator.4 console: ahci-sunxi 1c18000.sata: controller can't do 64bit DMA, forcing 32bit console: ahci-sunxi 1c18000.sata: AHCI 0001.0000 32 slots 1 ports 1.5 Gbps 0x1 impl platform mode console: ahci-sunxi 1c18000.sata: flags: ncq only console: scsi host0: ahci-sunxi console: ata1: SATA max UDMA/133 mmio [mem 0x01c18000-0x01c18fff] port 0x100 irq 27 console: of_cfs_init console: of_cfs_init: OK console: vcc3v0: disabling console: vcc5v0: disabling console: usb1-vbus: disabling console: usb2-vbus: disabling console: ata1: SATA link up 1.5 Gbps (SStatus 113 SControl 300) console: ata1.00: ATA-7: QEMU HARDDISK, 2.5+, max UDMA/100 console: ata1.00: 40960 sectors, multi 16: LBA48 NCQ (depth 32) console: ata1.00: applying bridge limits console: ata1.00: configured for UDMA/100 console: scsi 0:0:0:0: Direct-Access ATA QEMU HARDDISK 2.5+ PQ: 0 ANSI: 5 console: sd 0:0:0:0: Attached scsi generic sg0 type 0 console: sd 0:0:0:0: [sda] 40960 512-byte logical blocks: (21.0 MB/20.0 MiB) console: sd 0:0:0:0: [sda] Write Protect is off console: sd 0:0:0:0: [sda] Write cache: enabled, read cache: enabled, doesn't support DPO or FUA console: sd 0:0:0:0: [sda] Attached SCSI disk console: EXT4-fs (sda): mounting ext2 file system using the ext4 subsystem console: EXT4-fs (sda): mounted filesystem without journal. Opts: (null) console: VFS: Mounted root (ext2 filesystem) readonly on device 8:0. [...] console: cat /proc/partitions console: / # cat /proc/partitions console: major minor #blocks name console: 1 0 4096 ram0 console: 1 1 4096 ram1 console: 1 2 4096 ram2 console: 1 3 4096 ram3 console: 8 0 20480 sda console: reboot console: / # reboot [...] console: sd 0:0:0:0: [sda] Synchronizing SCSI cache console: reboot: Restarting system PASS (48.39 s) Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-id: 20191230110953.25496-3-f4bug@amsat.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
| * tests/boot_linux_console: Add initrd test for the CubieBoardPhilippe Mathieu-Daudé2020-01-171-0/+41
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This test boots a Linux kernel on a CubieBoard and verify the serial output is working. The kernel image and DeviceTree blob are built by the Armbian project (based on Debian): https://docs.armbian.com/Developer-Guide_Build-Preparation/ The cpio image used comes from the linux-build-test project: https://github.com/groeck/linux-build-test If ARM is a target being built, "make check-acceptance" will automatically include this test by the use of the "arch:arm" tags. Alternatively, this test can be run using: $ avocado --show=console run -t machine:cubieboard tests/acceptance/boot_linux_console.py console: Uncompressing Linux... done, booting the kernel. console: Booting Linux on physical CPU 0x0 console: Linux version 4.20.7-sunxi (root@armbian.com) (gcc version 7.2.1 20171011 (Linaro GCC 7.2-2017.11)) #5.75 SMP Fri Feb 8 09:02:10 CET 2019 console: CPU: ARMv7 Processor [410fc080] revision 0 (ARMv7), cr=50c5387d console: CPU: PIPT / VIPT nonaliasing data cache, VIPT nonaliasing instruction cache console: OF: fdt: Machine model: Cubietech Cubieboard [...] console: Boot successful. console: cat /proc/cpuinfo console: / # cat /proc/cpuinfo console: processor : 0 console: model name : ARMv7 Processor rev 0 (v7l) console: BogoMIPS : 832.51 [...] console: Hardware : Allwinner sun4i/sun5i Families console: Revision : 0000 console: Serial : 0000000000000000 console: cat /proc/iomem console: / # cat /proc/iomem console: 01c00000-01c0002f : system-control@1c00000 console: 01c02000-01c02fff : dma-controller@1c02000 console: 01c05000-01c05fff : spi@1c05000 console: 01c0b080-01c0b093 : mdio@1c0b080 console: 01c0c000-01c0cfff : lcd-controller@1c0c000 console: 01c0d000-01c0dfff : lcd-controller@1c0d000 console: 01c0f000-01c0ffff : mmc@1c0f000 [...] PASS (54.35 s) Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Wainer dos Santos Moschetta <wainersm@redhat.com> Tested-by: Wainer dos Santos Moschetta <wainersm@redhat.com> Message-id: 20191230110953.25496-2-f4bug@amsat.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
| * hw/arm: Add the Netduino Plus 2Alistair Francis2020-01-173-0/+59
| | | | | | | | | | | | | | Signed-off-by: Alistair Francis <alistair@alistair23.me> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-id: dad8d8d47f7625913e35e27a1c00f603a6b08f9a.1576658572.git.alistair@alistair23.me Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
| * hw/arm: Add the STM32F4xx SoCAlistair Francis2020-01-174-0/+384
| | | | | | | | | | | | | | Signed-off-by: Alistair Francis <alistair@alistair23.me> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 1d145c4c13e5fa140caf131232a6f524c88fcd72.1576658572.git.alistair@alistair23.me Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
| * hw/misc: Add the STM32F4xx EXTI deviceAlistair Francis2020-01-176-0/+258
| | | | | | | | | | | | | | | | Signed-off-by: Alistair Francis <alistair@alistair23.me> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-id: ef941d59fd8658589d34ed432e1d6dfdcf7fb1d0.1576658572.git.alistair@alistair23.me Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
| * hw/misc: Add the STM32F4xx Sysconfig deviceAlistair Francis2020-01-177-0/+252
| | | | | | | | | | | | | | Signed-off-by: Alistair Francis <alistair@alistair23.me> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 49b01423a09cef2ca832ff73a84a996568f1a8fc.1576658572.git.alistair@alistair23.me Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
* | Merge remote-tracking branch ↵Peter Maydell2020-01-174-8/+14
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | 'remotes/huth-gitlab/tags/pull-request-2020-01-17' into staging * Various fixes for qtests * Enable TCG tests with TCI in the gitlab CI # gpg: Signature made Fri 17 Jan 2020 10:35:17 GMT # gpg: using RSA key 27B88847EEE0250118F3EAB92ED9D774FE702DB5 # gpg: issuer "thuth@redhat.com" # gpg: Good signature from "Thomas Huth <th.huth@gmx.de>" [full] # gpg: aka "Thomas Huth <thuth@redhat.com>" [full] # gpg: aka "Thomas Huth <huth@tuxfamily.org>" [full] # gpg: aka "Thomas Huth <th.huth@posteo.de>" [unknown] # Primary key fingerprint: 27B8 8847 EEE0 2501 18F3 EAB9 2ED9 D774 FE70 2DB5 * remotes/huth-gitlab/tags/pull-request-2020-01-17: gitlab-ci.yml: Run tcg test with tci tests/qtest/vhost-user-test: Fix memory leaks migration-test: ppc64: fix FORTH test program tests: acpi: update path in rebuild-expected-aml Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
| * | gitlab-ci.yml: Run tcg test with tciThomas Huth2020-01-161-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Since commit 2f160e0f9797c7522bfd0d09218d0c9340a5137c ("tci: Add implementation for INDEX_op_ld16u_i64") has been included now, we can also run the TCG tests with tci, so let's enable them in our Gitlab CI now. Message-Id: <20191127155105.3784-1-thuth@redhat.com> Signed-off-by: Thomas Huth <thuth@redhat.com>
| * | tests/qtest/vhost-user-test: Fix memory leaksThomas Huth2020-01-161-3/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Do not allocate resources in case we return early, and make sure to free dest_cmdline at the end. Reported-by: Euler Robot <euler.robot@huawei.com> Reported-by: Pan Nengyuan <pannengyuan@huawei.com> Message-Id: <20200116140736.9498-1-thuth@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Signed-off-by: Thomas Huth <thuth@redhat.com>
| * | migration-test: ppc64: fix FORTH test programLaurent Vivier2020-01-161-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit e51e711b1bef has moved the initialization of start_address and end_address after the definition of the command line argument, where the nvramrc is initialized, and thus the loop is between 0 and 0 rather than 1 MiB and 100 MiB. It doesn't affect the result of the test if all the tests are run in sequence because the two first tests don't run the loop, so the values are correctly initialized when we actually need them. But it hangs when we ask to run only one test, for instance: QTEST_QEMU_BINARY=ppc64-softmmu/qemu-system-ppc64 \ tests/migration-test -m=quick -p /ppc64/migration/validate_uuid_error Fixes: e51e711b1bef ("tests/migration: Add migration-test header file") Cc: wei@redhat.com Signed-off-by: Laurent Vivier <lvivier@redhat.com> Message-Id: <20200107163437.52139-1-lvivier@redhat.com> Reviewed-by: Dr. David Alan Gilbert <dgilbert@redhat.com> Reviewed-by: Juan Quintela <quintela@redhat.com> Acked-by: David Gibson <david@gibson.dropbear.id.au> Signed-off-by: Thomas Huth <thuth@redhat.com>
| * | tests: acpi: update path in rebuild-expected-amlShameer Kolothum2020-01-161-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Since commit 1e8a1fae7464("test: Move qtests to a separate directory") qtests are now placed in a separate folder and this breaks the script used to rebuild the expected ACPI tables for bios-tables-test. Update the script with correct path. Fixes: 1e8a1fae7464("test: Move qtests to a separate directory") Signed-off-by: Shameer Kolothum <shameerali.kolothum.thodi@huawei.com> Reviewed-by: Thomas Huth <thuth@redhat.com> Message-Id: <20200114165138.15716-1-shameerali.kolothum.thodi@huawei.com> Signed-off-by: Thomas Huth <thuth@redhat.com>
* | | Merge remote-tracking branch 'remotes/rth/tags/pull-or1k-20200116' into stagingPeter Maydell2020-01-171-1/+1
|\ \ \ | |_|/ |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Fix FPSCR masking # gpg: Signature made Fri 17 Jan 2020 00:51:41 GMT # gpg: using RSA key 7A481E78868B4DB6A85A05C064DF38E8AF7E215F # gpg: issuer "richard.henderson@linaro.org" # gpg: Good signature from "Richard Henderson <richard.henderson@linaro.org>" [full] # Primary key fingerprint: 7A48 1E78 868B 4DB6 A85A 05C0 64DF 38E8 AF7E 215F * remotes/rth/tags/pull-or1k-20200116: target/openrisc: Fix FPCSR mask to allow setting DZF Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
| * | target/openrisc: Fix FPCSR mask to allow setting DZFStafford Horne2020-01-171-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The mask used when setting FPCSR allows setting bits 10 to 1. However, OpenRISC has flags and config bits in 11 to 1, 11 being Divide by Zero Flag (DZF). This seems like an off-by-one bug. This was found when testing the GLIBC test suite which has test cases to set and clear all bits. Signed-off-by: Stafford Horne <shorne@gmail.com> Message-Id: <20200110212843.27335-1-shorne@gmail.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
* | | Merge remote-tracking branch 'remotes/rth/tags/pull-tcg-20200115' into stagingPeter Maydell2020-01-1790-1237/+1034Star
|\ \ \ | |/ / |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add cpu_{ld,st}*_mmuidx_ra Remove MMU_MODE*_SUFFIX Move tcg headers under include/ # gpg: Signature made Thu 16 Jan 2020 01:36:41 GMT # gpg: using RSA key 7A481E78868B4DB6A85A05C064DF38E8AF7E215F # gpg: issuer "richard.henderson@linaro.org" # gpg: Good signature from "Richard Henderson <richard.henderson@linaro.org>" [full] # Primary key fingerprint: 7A48 1E78 868B 4DB6 A85A 05C0 64DF 38E8 AF7E 215F * remotes/rth/tags/pull-tcg-20200115: (34 commits) MAINTAINERS: Replace Claudio Fontana for tcg/aarch64 configure: Remove tcg/ from the preprocessor include search list tcg: Move TCG headers to include/tcg/ tcg: Search includes in the parent source directory tcg: Search includes from the project root source directory cputlb: Expand cpu_ldst_template.h in cputlb.c cputlb: Remove support for MMU_MODE*_SUFFIX target/ppc: Use cpu_*_mmuidx_ra instead of MMU_MODE*_SUFFIX target/s390x: Use cpu_*_mmuidx_ra instead of MMU_MODE*_SUFFIX target/mips: Use cpu_*_mmuidx_ra instead of MMU_MODE*_SUFFIX target/m68k: Use cpu_*_mmuidx_ra instead of MMU_MODE{0,1}_SUFFIX target/xtensa: Remove MMU_MODE{0,1,2,3}_SUFFIX target/unicore32: Remove MMU_MODE{0,1}_SUFFIX target/sh4: Remove MMU_MODE{0,1}_SUFFIX target/microblaze: Remove MMU_MODE{0,1,2}_SUFFIX target/i386: Remove MMU_MODE{0,1,2}_SUFFIX target/cris: Remove MMU_MODE{0,1}_SUFFIX target/alpha: Remove MMU_MODE{0,1}_SUFFIX target/nios2: Remove MMU_MODE{0,1}_SUFFIX cputlb: Expand cpu_ldst_useronly_template.h in user-exec.c ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
| * | MAINTAINERS: Replace Claudio Fontana for tcg/aarch64Richard Henderson2020-01-161-2/+1Star
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Claudio's Huawei address has been defunct for quite a while. In https://lists.gnu.org/archive/html/qemu-devel/2019-05/msg06872.html he asked for his personal address to be removed as well. I will take over officially. Cc: Claudio Fontana <claudio.fontana@gmail.com> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
| * | configure: Remove tcg/ from the preprocessor include search listPhilippe Mathieu-Daudé2020-01-161-1/+0Star
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | All tcg includes are relative to the repository root directory, we can safely remove the tcg/ directory from the include search path list. Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Stefan Weil <sw@weilnetz.de> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com> Message-Id: <20200101112303.20724-5-philmd@redhat.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
| * | tcg: Move TCG headers to include/tcg/Philippe Mathieu-Daudé2020-01-167-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Stefan Weil <sw@weilnetz.de> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com> Message-Id: <20200101112303.20724-4-philmd@redhat.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
| * | tcg: Search includes in the parent source directoryPhilippe Mathieu-Daudé2020-01-168-14/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | All the *.inc.c files included by tcg/$TARGET/tcg-target.inc.c are in tcg/, their parent directory. To simplify the preprocessor search path, include the relative parent path: '..'. Patch created mechanically by running: $ for x in tcg-pool.inc.c tcg-ldst.inc.c; do \ sed -i "s,#include \"$x\",#include \"../$x\"," \ $(git grep -l "#include \"$x\""); \ done Acked-by: David Gibson <david@gibson.dropbear.id.au> (ppc parts) Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Stefan Weil <sw@weilnetz.de> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com> Message-Id: <20200101112303.20724-3-philmd@redhat.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
| * | tcg: Search includes from the project root source directoryPhilippe Mathieu-Daudé2020-01-1651-65/+65
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We currently search both the root and the tcg/ directories for tcg files: $ git grep '#include "tcg/' | wc -l 28 $ git grep '#include "tcg[^/]' | wc -l 94 To simplify the preprocessor search path, unify by expliciting the tcg/ directory. Patch created mechanically by running: $ for x in \ tcg.h tcg-mo.h tcg-op.h tcg-opc.h \ tcg-op-gvec.h tcg-gvec-desc.h; do \ sed -i "s,#include \"$x\",#include \"tcg/$x\"," \ $(git grep -l "#include \"$x\""); \ done Acked-by: David Gibson <david@gibson.dropbear.id.au> (ppc parts) Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Stefan Weil <sw@weilnetz.de> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com> Message-Id: <20200101112303.20724-2-philmd@redhat.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
| * | cputlb: Expand cpu_ldst_template.h in cputlb.cRichard Henderson2020-01-163-161/+130Star
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Reduce the amount of preprocessor obfuscation by expanding the text of each of the functions generated. The result is only slightly smaller than the original. Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Aleksandar Markovic <amarkovic@wavecomp.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
| * | cputlb: Remove support for MMU_MODE*_SUFFIXRichard Henderson2020-01-161-230/+0Star
| | | | | | | | | | | | | | | | | | | | | | | | All users have now been converted to cpu_*_mmuidx_ra. Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
| * | target/ppc: Use cpu_*_mmuidx_ra instead of MMU_MODE*_SUFFIXRichard Henderson2020-01-162-11/+2Star
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | There are only two uses. Within dcbz_common, the local variable mmu_idx already contains the epid computation, and we can avoid repeating it for the store. Within helper_icbiep, the usage is trivially expanded using PPC_TLB_EPID_LOAD. Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com> Acked-by: David Gibson <david@gibson.dropbear.id.au> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
| * | target/s390x: Use cpu_*_mmuidx_ra instead of MMU_MODE*_SUFFIXRichard Henderson2020-01-162-10/+5Star
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The generated functions aside from *_real are unused. The *_real functions have a couple of users in mem_helper.c; use *_mmuidx_ra instead, with MMU_REAL_IDX. Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: David Hildenbrand <david@redhat.com> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> --- v2: Use *_mmuidx_ra directly, without intermediate macros.
| * | target/mips: Use cpu_*_mmuidx_ra instead of MMU_MODE*_SUFFIXRichard Henderson2020-01-162-126/+60Star
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The separate suffixed functions were used to construct some do_##insn function switched on mmu_idx. The interface is exactly identical to the *_mmuidx_ra functions. Replace them directly and remove the constructions. Cc: Aurelien Jarno <aurelien@aurel32.net> Cc: Aleksandar Rikalo <aleksandar.rikalo@rt-rk.com> Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: Aleksandar Markovic <amarkovic@wavecomp.com> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
| * | target/m68k: Use cpu_*_mmuidx_ra instead of MMU_MODE{0,1}_SUFFIXRichard Henderson2020-01-162-32/+47
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The generated *_user functions are unused. The *_kernel functions have a couple of users in op_helper.c; use *_mmuidx_ra instead, with MMU_KERNEL_IDX. Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: Laurent Vivier <laurent@vivier.eu> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> --- v2: Use *_mmuidx_ra directly, without intermediate macros.
| * | target/xtensa: Remove MMU_MODE{0,1,2,3}_SUFFIXRichard Henderson2020-01-161-4/+0Star
| | | | | | | | | | | | | | | | | | | | | | | | | | | The functions generated by these macros are unused. Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com> Acked-by: Max Filippov <jcmvbkbc@gmail.com> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
| * | target/unicore32: Remove MMU_MODE{0,1}_SUFFIXRichard Henderson2020-01-161-2/+0Star
| | | | | | | | | | | | | | | | | | | | | | | | | | | The functions generated by these macros are unused. Cc: Guan Xuetao <gxt@mprc.pku.edu.cn> Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
| * | target/sh4: Remove MMU_MODE{0,1}_SUFFIXRichard Henderson2020-01-161-2/+0Star
| | | | | | | | | | | | | | | | | | | | | | | | | | | The functions generated by these macros are unused. Cc: Aurelien Jarno <aurelien@aurel32.net> Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
| * | target/microblaze: Remove MMU_MODE{0,1,2}_SUFFIXRichard Henderson2020-01-161-3/+0Star
| | | | | | | | | | | | | | | | | | | | | | | | | | | The functions generated by these macros are unused. Cc: Edgar E. Iglesias <edgar.iglesias@gmail.com> Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
| * | target/i386: Remove MMU_MODE{0,1,2}_SUFFIXRichard Henderson2020-01-161-3/+0Star
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The functions generated by these macros are unused. Cc: Eduardo Habkost <ehabkost@redhat.com> Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com> Acked-by: Paolo Bonzini <pbonzini@redhat.com> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
| * | target/cris: Remove MMU_MODE{0,1}_SUFFIXRichard Henderson2020-01-161-2/+0Star
| | | | | | | | | | | | | | | | | | | | | | | | | | | The functions generated by these macros are unused. Cc: Edgar E. Iglesias <edgar.iglesias@gmail.com> Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
| * | target/alpha: Remove MMU_MODE{0,1}_SUFFIXRichard Henderson2020-01-161-2/+0Star
| | | | | | | | | | | | | | | | | | | | | | | | The functions generated by these macros are unused. Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
| * | target/nios2: Remove MMU_MODE{0,1}_SUFFIXRichard Henderson2020-01-161-2/+0Star
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The functions generated by these macros are unused. Cc: Chris Wulff <crwulff@gmail.com> Cc: Marek Vasut <marex@denx.de> Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
| * | cputlb: Expand cpu_ldst_useronly_template.h in user-exec.cRichard Henderson2020-01-163-190/+265
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | With the tracing hooks, the inline functions are no longer so simple. Reduce the amount of preprocessor obfuscation by expanding the text of each of the functions generated. Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
| * | target/i386: Use cpu_*_mmuidx_ra instead of templatesRichard Henderson2020-01-161-31/+31
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Do not use exec/cpu_ldst_{,useronly_}template.h directly, but instead use the functional interface. Cc: Eduardo Habkost <ehabkost@redhat.com> Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com> Acked-by: Paolo Bonzini <pbonzini@redhat.com> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
| * | cputlb: Provide cpu_(ld,st}*_mmuidx_ra for user-onlyRichard Henderson2020-01-162-60/+229
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This finishes the new interface began with the previous patch. Document the interface and deprecate MMU_MODE<N>_SUFFIX. Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: Aleksandar Markovic <amarkovic@wavecomp.com> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
| * | cputlb: Rename helper_ret_ld*_cmmu to cpu_ld*_codeRichard Henderson2020-01-165-141/+36Star
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | There are no uses of the *_cmmu names other than the bare wrapping within the *_code inlines. Therefore rename the functions so we can drop the inlines. Use abi_ptr instead of target_ulong in preparation for user-only; the two types are identical for softmmu. Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: Aleksandar Markovic <amarkovic@wavecomp.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
| * | translator: Use cpu_ld*_code instead of open-codingRichard Henderson2020-01-162-46/+13Star
| | | | | | | | | | | | | | | | | | | | | | | | | | | The DO_LOAD macros replicate the distinction already performed by the cpu_ldst.h functions. Use them. Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
| * | cputlb: Move body of cpu_ldst_template.h out of lineRichard Henderson2020-01-163-100/+166
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | With the tracing hooks, the inline functions are no longer so simple. Once out-of-line, the current tlb_entry lookup is redundant with the one in the main load/store_helper. This also begins the introduction of a new target facing interface, with suffix *_mmuidx_ra. This is not yet official because the interface is not done for user-only. Use abi_ptr instead of target_ulong in preparation for user-only; the two types are identical for softmmu. What remains in cpu_ldst_template.h are the expansions for _code, _data, and MMU_MODE<N>_SUFFIX. Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
| * | plugins: Include trace/mem.h in api.cRichard Henderson2020-01-161-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Code movement in an upcoming patch will show that this file was implicitly depending on trace/mem.h being included beforehand. Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reported-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
| * | linux-user: Include trace-root.h in syscall-trace.hRichard Henderson2020-01-161-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Code movement in an upcoming patch will show that this file was implicitly depending on trace-root.h being included beforehand. Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
generated by cgit v1.2.3-55-g7522 (git 2.39.0) at 2024-12-22 19:37:15 +0100