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* ipmi: Add support to customize OEM functionsCédric Le Goater2019-12-172-44/+48
* ppc/xive: Check V bit in TM_PULL_POOL_CTXCédric Le Goater2019-12-171-0/+5
* ppc/xive: Introduce OS CAM line helpersCédric Le Goater2019-12-171-3/+38
* ppc/pnv: Quiesce some XIVE errorsCédric Le Goater2019-12-171-1/+5
* xive/kvm: Trigger interrupts from userspaceGreg Kurz2019-12-171-14/+2Star
* ppc/pnv: Remove pnv_xive_vst_size() routineCédric Le Goater2019-12-171-69/+43Star
* ppc/xive: Introduce helpers for the NVT idCédric Le Goater2019-12-172-5/+21
* ppc/xive: Record the IPB in the associated NVTCédric Le Goater2019-12-172-2/+10
* ppc/pnv: Add a LPC "ranges" propertyCédric Le Goater2019-12-171-1/+13
* spapr: Abort if XICS interrupt controller cannot be initializedGreg Kurz2019-12-171-11/+2Star
* xics: Link ICP_PROP_CPU property to ICPState::cs pointerGreg Kurz2019-12-171-17/+4Star
* xics: Link ICP_PROP_XICS property to ICPState::xics pointerGreg Kurz2019-12-171-13/+9Star
* xics: Link ICS_PROP_XICS property to ICSState::xics pointerGreg Kurz2019-12-173-19/+6Star
* ppc/pnv: Link "chip" property to PnvXive::chip pointerGreg Kurz2019-12-172-12/+5Star
* ppc/pnv: Link "chip" property to PnvCore::chip pointerGreg Kurz2019-12-172-10/+4Star
* ppc/pnv: Link "chip" property to PnvHomer::chip pointerGreg Kurz2019-12-172-14/+14
* ppc/pnv: Link "psi" property to PnvOCC::psi pointerGreg Kurz2019-12-172-15/+13Star
* ppc/pnv: Link "psi" property to PnvLpc::psi pointerGreg Kurz2019-12-172-15/+12Star
* xive: Link "xive" property to XiveEndSource::xrtr pointerGreg Kurz2019-12-173-14/+7Star
* xive: Link "xive" property to XiveSource::xive pointerGreg Kurz2019-12-174-16/+8Star
* xive: Link "cpu" property to XiveTCTX::cs pointerGreg Kurz2019-12-171-13/+9Star
* ppc/pnv: Drop "chip" link from POWER9 PSI objectGreg Kurz2019-12-171-2/+0Star
* ppc/pnv: Add a "/qemu" device tree nodeCédric Le Goater2019-12-171-0/+3
* ppc/pnv: Add a PNOR modelCédric Le Goater2019-12-175-1/+180
* Merge remote-tracking branch 'remotes/amarkovic/tags/mips-queue-dec-16-2019' ...Peter Maydell2019-12-1611-248/+300
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| * MAINTAINERS: Add a file to MIPS sectionAleksandar Markovic2019-12-161-0/+1
| * MAINTAINERS: Add three files to Malta sectionAleksandar Markovic2019-12-161-0/+3
| * MAINTAINERS: Adjust maintainership for Malta boardAleksandar Markovic2019-12-161-2/+3
| * MAINTAINERS: Adjust maintainership for Fulong 2E boardAleksandar Markovic2019-12-161-1/+1
| * MAINTAINERS: Add a section on UI translationAleksandar Markovic2019-12-161-0/+4
| * hw/mips: Deprecate the r4k machinePhilippe Mathieu-Daudé2019-12-163-1/+7
| * mips: fulong 2e: Renovate coding styleFilip Bozuta2019-12-162-38/+45
| * mips: r4000: Renovate coding styleFilip Bozuta2019-12-161-21/+34
| * mips: mipssim: Renovate coding styleFilip Bozuta2019-12-161-19/+23
| * mips: malta: Renovate coding styleFilip Bozuta2019-12-162-87/+91
| * mips: jazz: Renovate coding styleFilip Bozuta2019-12-163-79/+88
* | Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20191216-...Peter Maydell2019-12-1645-347/+1266
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| * | target/arm: ensure we use current exception state after SCR updateAlex Bennée2019-12-164-4/+25
| * | hw/arm/virt: Simplify by moving the gic in the machine statePhilippe Mathieu-Daudé2019-12-162-55/+55
| * | hw/arm/acpi: enable SHPC native hot plugHeyi Guo2019-12-164-1/+6
| * | hw/arm/acpi: simplify AML bit and/or statementHeyi Guo2019-12-164-8/+8
| * | hw/arm/sbsa-ref: Simplify by moving the gic in the machine statePhilippe Mathieu-Daudé2019-12-161-44/+42Star
| * | target/arm: Add support for DC CVAP & DC CVADP insBeata Michalska2019-12-164-0/+69
| * | migration: ram: Switch to ram block writebackBeata Michalska2019-12-161-4/+1Star
| * | Memory: Enable writeback for given memory regionBeata Michalska2019-12-166-0/+101
| * | tcg: cputlb: Add probe_readBeata Michalska2019-12-161-0/+6
| * | arm/arm-powerctl: set NSACR.{CP11, CP10} bits in arm_set_cpu_on()Niek Linnenbank2019-12-161-0/+3
| * | target/arm: Add support for missing Jazelle system registersMarc Zyngier2019-12-161-0/+27
| * | target/arm: Handle AArch32 CP15 trapping via HSTR_EL2Marc Zyngier2019-12-165-1/+34
| * | target/arm: Handle trapping to EL2 of AArch32 VMRS instructionsMarc Zyngier2019-12-163-3/+46
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