summaryrefslogtreecommitdiffstats
Commit message (Expand)AuthorAgeFilesLines
* tests/9pfs: change qtest name prefix to synthChristian Schoenebeck2020-10-191-14/+14
* 9pfs: suppress performance warnings on qtest runsChristian Schoenebeck2020-10-192-2/+6
* Merge remote-tracking branch 'remotes/mcayland/tags/qemu-macppc-20201019' int...Peter Maydell2020-10-1913-179/+118Star
|\
| * mac_oldworld: Change PCI address of macio to match real hardwareBALATON Zoltan2020-10-191-1/+1
| * mac_oldworld: Drop some variablesBALATON Zoltan2020-10-191-18/+17Star
| * mac_oldworld: Drop a variable, use get_system_memory() directlyBALATON Zoltan2020-10-191-3/+2Star
| * mac_newworld: Allow loading binary ROM imageBALATON Zoltan2020-10-192-10/+14
| * mac_oldworld: Allow loading binary ROM imageBALATON Zoltan2020-10-191-9/+20
| * m48t59: remove legacy m48t59_init() functionMark Cave-Ayland2020-10-182-39/+0Star
| * ppc405_boards: use qdev properties instead of legacy m48t59_init() functionMark Cave-Ayland2020-10-181-1/+9
| * sun4u: use qdev properties instead of legacy m48t59_init() functionMark Cave-Ayland2020-10-181-2/+5
| * sun4m: use qdev properties instead of legacy m48t59_init() functionMark Cave-Ayland2020-10-181-2/+8
| * m48t59-isa: remove legacy m48t59_init_isa() functionMark Cave-Ayland2020-10-182-27/+0Star
| * uninorth: use qdev gpios for PCI IRQsMark Cave-Ayland2020-10-183-46/+25Star
| * grackle: use qdev gpios for PCI IRQsMark Cave-Ayland2020-10-182-19/+7Star
| * macio: don't reference serial_hd() directly within the deviceMark Cave-Ayland2020-10-183-4/+12
* | Merge remote-tracking branch 'remotes/philmd-gitlab/tags/mips-next-20201017' ...Peter Maydell2020-10-1926-195/+1119
|\ \
| * | target/mips: Increase number of TLB entries on the 34Kf core (16 -> 64)Philippe Mathieu-Daudé2020-10-171-1/+1
| * | MAINTAINERS: Remove duplicated Malta test entriesPhilippe Mathieu-Daudé2020-10-171-2/+0Star
| * | MAINTAINERS: Downgrade MIPS Boston to 'Odd Fixes', fix Paul Burton mailPhilippe Mathieu-Daudé2020-10-171-2/+2
| * | MAINTAINERS: Put myself forward for MIPS targetPhilippe Mathieu-Daudé2020-10-171-2/+4
| * | MAINTAINERS: Remove myselfAleksandar Markovic2020-10-171-12/+5Star
| * | docs/system: Update MIPS CPU documentationHuacai Chen2020-10-171-2/+8
| * | tests/acceptance: Add MIPS record/replay testsPavel Dovgalyuk2020-10-171-1/+166
| * | hw/mips: Remove exit(1) in case of missing ROMPavel Dovgalyuk2020-10-174-24/+13Star
| * | hw/mips: Rename TYPE_MIPS_BOSTON to TYPE_BOSTONEduardo Habkost2020-10-171-4/+4
| * | hw/mips: Simplify code using ROUND_UP(INITRD_PAGE_SIZE)Philippe Mathieu-Daudé2020-10-175-10/+9Star
| * | hw/mips: Simplify loading 64-bit ELF kernelsPhilippe Mathieu-Daudé2020-10-172-10/+2Star
| * | hw/mips/malta: Use clearer qdev stylePhilippe Mathieu-Daudé2020-10-171-4/+4
| * | hw/mips/malta: Move gt64120 related code togetherPhilippe Mathieu-Daudé2020-10-171-7/+6Star
| * | hw/mips/malta: Fix FPGA I/O region sizePhilippe Mathieu-Daudé2020-10-171-1/+1
| * | target/mips/cpu: Display warning when CPU is used without input clockPhilippe Mathieu-Daudé2020-10-171-0/+10
| * | hw/mips/cps: Do not allow use without input clockPhilippe Mathieu-Daudé2020-10-171-0/+5
| * | hw/mips/malta: Set CPU frequency to 320 MHzPhilippe Mathieu-Daudé2020-10-171-3/+16
| * | hw/mips/boston: Set CPU frequency to 1 GHzPhilippe Mathieu-Daudé2020-10-171-0/+13
| * | hw/mips/cps: Expose input clock and connect it to CPU coresPhilippe Mathieu-Daudé2020-10-172-0/+6
| * | hw/mips/jazz: Correct CPU frequenciesPhilippe Mathieu-Daudé2020-10-171-1/+14
| * | hw/mips/mipssim: Correct CPU frequencyPhilippe Mathieu-Daudé2020-10-171-1/+10
| * | hw/mips/fuloong2e: Set CPU frequency to 533 MHzPhilippe Mathieu-Daudé2020-10-171-1/+6
| * | hw/mips/r4k: Explicit CPU frequency is 200 MHzPhilippe Mathieu-Daudé2020-10-171-1/+6
| * | target/mips/cpu: Introduce mips_cpu_create_with_clock() helperPhilippe Mathieu-Daudé2020-10-172-0/+24
| * | target/mips/cpu: Allow the CPU to use dynamic frequenciesPhilippe Mathieu-Daudé2020-10-172-2/+13
| * | target/mips/cpu: Make cp0_count_rate a propertyPhilippe Mathieu-Daudé2020-10-172-8/+20
| * | target/mips/cpu: Calculate the CP0 timer period using the CPU frequencyPhilippe Mathieu-Daudé2020-10-171-2/+2
| * | target/mips: Move cp0_count_ns to CPUMIPSStatePhilippe Mathieu-Daudé2020-10-173-17/+28
| * | target/mips/cp0_timer: Document TIMER_PERIOD originPhilippe Mathieu-Daudé2020-10-171-1/+11
| * | target/mips/cp0_timer: Explicit unit in variable namePhilippe Mathieu-Daudé2020-10-171-9/+10
| * | target/mips: Move cpu_mips_get_random() with CP0 helpersPhilippe Mathieu-Daudé2020-10-173-26/+26
| * | target/mips/op_helper: Log unimplemented cache opcodePhilippe Mathieu-Daudé2020-10-171-0/+9
| * | target/mips/op_helper: Document Invalidate/Writeback opcodes as no-opPhilippe Mathieu-Daudé2020-10-171-0/+5
generated by cgit v1.2.3-55-g7522 (git 2.39.0) at 2025-01-27 10:07:26 +0100