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* tests: Add OpenBSD imageFam Zheng2017-09-221-0/+43
| | | | | | | | The image is prepared following instructions as in: https://wiki.qemu.org/Hosts/BSD Signed-off-by: Fam Zheng <famz@redhat.com>
* tests: Add NetBSD imageFam Zheng2017-09-221-0/+42
| | | | | | | | | The image is prepared following instructions as in: https://wiki.qemu.org/Hosts/BSD Signed-off-by: Fam Zheng <famz@redhat.com> Reviewed-by: Kamil Rytarowski <n54@gmx.com>
* tests: Add FreeBSD imageFam Zheng2017-09-221-0/+42
| | | | | | | | | The image is prepared following instructions as in: https://wiki.qemu.org/Hosts/BSD Signed-off-by: Fam Zheng <famz@redhat.com> Tested-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
* tests: Add ubuntu.i386 imageFam Zheng2017-09-221-0/+89
| | | | | | | | | This adds a 32bit guest. The official LTS cloud image is downloaded and initialized with cloud-init. Signed-off-by: Fam Zheng <famz@redhat.com>
* tests: Add vm test libFam Zheng2017-09-221-0/+262
| | | | | | | | | | | | | | | | This is the common code to implement a "VM test" to 1) Download and initialize a pre-defined VM that has necessary dependencies to build QEMU and SSH access. 2) Archive $SRC_PATH to a .tar file. 3) Boot the VM, and pass the source tar file to the guest. 4) SSH into the VM, untar the source tarball, build from the source. Signed-off-by: Fam Zheng <famz@redhat.com> Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
* tests: Add a test key pairFam Zheng2017-09-223-0/+34
| | | | | | | This will be used by setup test user ssh. Signed-off-by: Fam Zheng <famz@redhat.com> Reviewed-by: Eric Blake <eblake@redhat.com>
* scripts: Add archive-source.shFam Zheng2017-09-221-0/+51
| | | | | Signed-off-by: Fam Zheng <famz@redhat.com> Reviewed-by: Eric Blake <eblake@redhat.com>
* qemu.py: Add "wait()" methodFam Zheng2017-09-221-0/+7
| | | | | | Signed-off-by: Fam Zheng <famz@redhat.com> Reviewed-by: Stefan Hajnoczi <stefanha@redhat.com> Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
* gitignore: Ignore vm test imagesFam Zheng2017-09-222-0/+2
| | | | | Signed-off-by: Fam Zheng <famz@redhat.com> Reviewed-by: Eric Blake <eblake@redhat.com>
* MAINTAINERS: Fix subsystem name for "Build and test automation"Eduardo Habkost2017-09-221-0/+1
| | | | | | | | | | | | | | | | | | | The subsystem name for the "Build test automation" section is "-------------------------", because an actual subsystem name line is missing: $ ./scripts/get_maintainer.pl -f tests/docker/docker.py "Alex Bennée" <alex.bennee@linaro.org> (maintainer:-----------------...) Fam Zheng <famz@redhat.com> (maintainer:-----------------...) "Philippe Mathieu-Daudé" <f4bug@amsat.org> (reviewer:-----------------...) qemu-devel@nongnu.org (open list:-----------------...) Fix the issue by inserting a subsystem name line where get_maintainer.pl expects it. Signed-off-by: Eduardo Habkost <ehabkost@redhat.com> Message-Id: <20170921170209.9101-1-ehabkost@redhat.com> Signed-off-by: Fam Zheng <famz@redhat.com>
* buildsys: Move rdma libs to per objectFam Zheng2017-09-222-1/+2
| | | | | | | | | Signed-off-by: Fam Zheng <famz@redhat.com> Message-Id: <20170907084230.26493-1-famz@redhat.com> Reviewed-by: Juan Quintela <quintela@redhat.com> Reviewed-by: Peter Xu <peterx@redhat.com> Reviewed-by: Dr. David Alan Gilbert <dgilbert@redhat.com> Signed-off-by: Fam Zheng <famz@redhat.com>
* buildsys: Move brlapi libs to per objectFam Zheng2017-09-222-1/+2
| | | | | | | | | | | baum.o already receives the sdl cflags in its per object variable, do the same for brlapi libs to avoid cluttering libs_softmmu. Signed-off-by: Fam Zheng <famz@redhat.com> Message-Id: <20170907084700.952-1-famz@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Marc-André Lureau <marcandre.lureau@redhat.com> Signed-off-by: Fam Zheng <famz@redhat.com>
* buildsys: Move usb redir cflags/libs to per objectFam Zheng2017-09-222-2/+4
| | | | | | | | Signed-off-by: Fam Zheng <famz@redhat.com> Message-Id: <20170907082918.7299-10-famz@redhat.com> Reviewed-by: Gerd Hoffmann <kraxel@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: Fam Zheng <famz@redhat.com>
* buildsys: Move libusb cflags/libs to per objectFam Zheng2017-09-222-2/+7
| | | | | | | | Signed-off-by: Fam Zheng <famz@redhat.com> Message-Id: <20170907082918.7299-9-famz@redhat.com> Reviewed-by: Gerd Hoffmann <kraxel@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: Fam Zheng <famz@redhat.com>
* buildsys: Move libcacard cflags/libs to per objectFam Zheng2017-09-222-4/+6
| | | | | | | | Signed-off-by: Fam Zheng <famz@redhat.com> Message-Id: <20170907082918.7299-8-famz@redhat.com> Reviewed-by: Gerd Hoffmann <kraxel@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: Fam Zheng <famz@redhat.com>
* buildsys: Move audio libs to per objectFam Zheng2017-09-222-5/+15
| | | | | | | | Signed-off-by: Fam Zheng <famz@redhat.com> Message-Id: <20170907082918.7299-5-famz@redhat.com> Reviewed-by: Gerd Hoffmann <kraxel@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: Fam Zheng <famz@redhat.com>
* buildsys: Move sdl cflags/libs to per objectFam Zheng2017-09-223-1/+3
| | | | | | | | Signed-off-by: Fam Zheng <famz@redhat.com> Message-Id: <20170907082918.7299-3-famz@redhat.com> Reviewed-by: Gerd Hoffmann <kraxel@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: Fam Zheng <famz@redhat.com>
* buildsys: Move vde libs to per objectFam Zheng2017-09-222-2/+3
| | | | | | | Signed-off-by: Fam Zheng <famz@redhat.com> Message-Id: <20170907083552.17725-3-famz@redhat.com> Reviewed-by: Jason Wang <jasowang@redhat.com> Signed-off-by: Fam Zheng <famz@redhat.com>
* vl: Don't include vde headerFam Zheng2017-09-221-4/+0Star
| | | | | | | | | | Nothing in vl.c uses anything from the vde package, do remove the unnecessary include. Signed-off-by: Fam Zheng <famz@redhat.com> Message-Id: <20170907083552.17725-2-famz@redhat.com> Reviewed-by: Jason Wang <jasowang@redhat.com> Signed-off-by: Fam Zheng <famz@redhat.com>
* docker: Add test-blockFam Zheng2017-09-221-0/+21
| | | | | | | Signed-off-by: Fam Zheng <famz@redhat.com> Message-Id: <20170905025614.579-6-famz@redhat.com> Reviewed-by: Stefan Hajnoczi <stefanha@redhat.com> Based-on: 20170905021201.25684-1-famz@redhat.com
* docker: Add nettle-devel to fedora imageFam Zheng2017-09-221-0/+1
| | | | | | | | | | The LUKS cases in qemu-iotests requires this. Reviewed-by: Kashyap Chamarthy <kchamart@redhat.com> Signed-off-by: Fam Zheng <famz@redhat.com> Message-Id: <20170905025614.579-5-famz@redhat.com> Reviewed-by: Stefan Hajnoczi <stefanha@redhat.com> Based-on: 20170905021201.25684-1-famz@redhat.com
* docker: Use unconfined security profileFam Zheng2017-09-221-0/+1
| | | | | | | | | | | Some by default blocked syscalls are required to run tests for example userfaultfd. Reviewed-by: Kashyap Chamarthy <kchamart@redhat.com> Signed-off-by: Fam Zheng <famz@redhat.com> Message-Id: <20170905025614.579-4-famz@redhat.com> Reviewed-by: Stefan Hajnoczi <stefanha@redhat.com> Based-on: 20170905021201.25684-1-famz@redhat.com
* docker: Add test_fail and prep_failFam Zheng2017-09-221-0/+12
| | | | | | | | | | They both print a message and exit, but with different status code so distinguish real test errors from env preparation failures. Signed-off-by: Fam Zheng <famz@redhat.com> Message-Id: <20170905025614.579-3-famz@redhat.com> Reviewed-by: Stefan Hajnoczi <stefanha@redhat.com> Based-on: 20170905021201.25684-1-famz@redhat.com
* docker: Fix return code of build_qemu()Fam Zheng2017-09-221-2/+1Star
| | | | | | | | | | Without "set -e", the "&&" makes sure that the return code reflects the result status, and that make only runs if configure succeeds. Signed-off-by: Fam Zheng <famz@redhat.com> Message-Id: <20170905025614.579-2-famz@redhat.com> Reviewed-by: Stefan Hajnoczi <stefanha@redhat.com> Based-on: 20170905021201.25684-1-famz@redhat.com
* tests/docker: Clean up pathsFam Zheng2017-09-222-5/+4Star
| | | | | | | | | | | The 'run' script already creats src, build and install directories under $TEST_DIR, use it in common.rc. Also the tests always run from $QEMU_SRC/tests/docker, so use a relative $CMD string. Message-Id: <20170817035721.11064-1-famz@redhat.com> Signed-off-by: Fam Zheng <famz@redhat.com>
* docker: Enable features explicitly in test-fullFam Zheng2017-09-221-6/+76
| | | | | | | | Also avoid "set -e". Signed-off-by: Fam Zheng <famz@redhat.com> Message-Id: <20170907141245.31946-3-famz@redhat.com> Reviewed-by: Eric Blake <eblake@redhat.com>
* docker: Update ubuntu imageFam Zheng2017-09-221-3/+8
| | | | | | | | Base on the newer ubuntu-lts (16.06) and include more packages for better build coverage. Signed-off-by: Fam Zheng <famz@redhat.com> Message-Id: <20170907141245.31946-2-famz@redhat.com>
* docker: reduce noise when building travis.dockerAlex Bennée2017-09-221-0/+3
| | | | | | | | | | | | Set the DEBIAN_FRONTEND and locale env vars to stop apt complaining so much as we build the image. Suggested-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20170725133425.436-7-alex.bennee@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Tested-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: Fam Zheng <famz@redhat.com>
* docker: don't install device-tree-compiler build-deps in travis.dockerAlex Bennée2017-09-221-2/+1Star
| | | | | | | | | | | | Installing the device-tree-compiler build-deps is a little extreme. We only actually need the binary so include it with the other packages. Suggested-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20170725133425.436-6-alex.bennee@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Tested-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: Fam Zheng <famz@redhat.com>
* docker: docker.py make --no-cache skip checksum testAlex Bennée2017-09-221-1/+2
| | | | | | | | | | | If you invoke with NOCACHE=1 we pass --no-cache in the argv to docker.py but may still not force a rebuild if the dockerfile checksum hasn't changed. By testing for its presence we can force builds without having to manually remove the docker image. Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20170725133425.436-5-alex.bennee@linaro.org> Signed-off-by: Fam Zheng <famz@redhat.com>
* docker: ensure NOUSER for travis imagesAlex Bennée2017-09-221-0/+1
| | | | | | | | | | | | While adding the current user is a useful default behaviour for creating new images it is not appropriate for Travis which already has a default user. Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Tested-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20170725133425.436-2-alex.bennee@linaro.org> Signed-off-by: Fam Zheng <famz@redhat.com>
* Merge remote-tracking branch ↵Peter Maydell2017-09-2128-367/+2735
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | 'remotes/pmaydell/tags/pull-target-arm-20170921' into staging target-arm queue: * more preparatory work for v8M support * convert some omap devices away from old_mmio * remove out of date ARM ARM section references in comments * add the Smartfusion2 board # gpg: Signature made Thu 21 Sep 2017 17:40:40 BST # gpg: using RSA key 0x3C2525ED14360CDE # gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" # gpg: aka "Peter Maydell <pmaydell@gmail.com>" # gpg: aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>" # Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83 15CF 3C25 25ED 1436 0CDE * remotes/pmaydell/tags/pull-target-arm-20170921: (31 commits) msf2: Add Emcraft's Smartfusion2 SOM kit msf2: Add Smartfusion2 SoC msf2: Add Smartfusion2 SPI controller msf2: Microsemi Smartfusion2 System Register block msf2: Add Smartfusion2 System timer hw/arm/omap2.c: Don't use old_mmio hw/i2c/omap_i2c.c: Don't use old_mmio hw/timer/omap_gptimer: Don't use old_mmio hw/timer/omap_synctimer.c: Don't use old_mmio hw/gpio/omap_gpio.c: Don't use old_mmio hw/arm/palm.c: Don't use old_mmio for static_ops target/arm: Remove out of date ARM ARM section references in A64 decoder nvic: Support banked exceptions in acknowledge and complete nvic: Make SHCSR banked for v8M nvic: Make ICSR banked for v8M target/arm: Handle banking in negative-execution-priority check in cpu_mmu_index() nvic: Handle v8M changes in nvic_exec_prio() nvic: Disable the non-secure HardFault if AIRCR.BFHFNMINS is clear nvic: Implement v8M changes to fixed priority exceptions nvic: In escalation to HardFault, support HF not being priority -1 ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
| * msf2: Add Emcraft's Smartfusion2 SOM kitSubbaraya Sundeep2017-09-212-1/+106
| | | | | | | | | | | | | | | | | | | | | | Emulated Emcraft's Smartfusion2 System On Module starter kit. Signed-off-by: Subbaraya Sundeep <sundeep.lkml@gmail.com> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-id: 20170920201737.25723-6-f4bug@amsat.org [PMD: drop cpu_model to directly use cpu type] Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
| * msf2: Add Smartfusion2 SoCSubbaraya Sundeep2017-09-214-0/+307
| | | | | | | | | | | | | | | | | | | | | | | | | | Smartfusion2 SoC has hardened Microcontroller subsystem and flash based FPGA fabric. This patch adds support for Microcontroller subsystem in the SoC. Signed-off-by: Subbaraya Sundeep <sundeep.lkml@gmail.com> Reviewed-by: Alistair Francis <alistair.francis@xilinx.com> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-id: 20170920201737.25723-5-f4bug@amsat.org [PMD: drop cpu_model to directly use cpu type, check m3clk non null] Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
| * msf2: Add Smartfusion2 SPI controllerSubbaraya Sundeep2017-09-213-0/+463
| | | | | | | | | | | | | | | | | | | | Modelled Microsemi's Smartfusion2 SPI controller. Signed-off-by: Subbaraya Sundeep <sundeep.lkml@gmail.com> Reviewed-by: Alistair Francis <alistair.francis@xilinx.com> Tested-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-id: 20170920201737.25723-4-f4bug@amsat.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
| * msf2: Microsemi Smartfusion2 System Register blockSubbaraya Sundeep2017-09-214-0/+243
| | | | | | | | | | | | | | | | | | | | | | | | Added Sytem register block of Smartfusion2. This block has PLL registers which are accessed by guest. Signed-off-by: Subbaraya Sundeep <sundeep.lkml@gmail.com> Reviewed-by: Alistair Francis <alistair.francis@xilinx.com> Acked-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Tested-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-id: 20170920201737.25723-3-f4bug@amsat.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
| * msf2: Add Smartfusion2 System timerSubbaraya Sundeep2017-09-213-0/+354
| | | | | | | | | | | | | | | | | | | | | | | | Modelled System Timer in Microsemi's Smartfusion2 Soc. Timer has two 32bit down counters and two interrupts. Signed-off-by: Subbaraya Sundeep <sundeep.lkml@gmail.com> Reviewed-by: Alistair Francis <alistair.francis@xilinx.com> Acked-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Tested-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-id: 20170920201737.25723-2-f4bug@amsat.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
| * hw/arm/omap2.c: Don't use old_mmioPeter Maydell2017-09-211-12/+37
| | | | | | | | | | | | | | | | Don't use old_mmio in the memory region ops struct. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 1505580378-9044-7-git-send-email-peter.maydell@linaro.org
| * hw/i2c/omap_i2c.c: Don't use old_mmioPeter Maydell2017-09-211-12/+32
| | | | | | | | | | | | | | | | Don't use old_mmio in the memory region ops struct. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 1505580378-9044-6-git-send-email-peter.maydell@linaro.org
| * hw/timer/omap_gptimer: Don't use old_mmioPeter Maydell2017-09-211-12/+37
| | | | | | | | | | | | | | | | Don't use the old_mmio struct in memory region ops. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 1505580378-9044-5-git-send-email-peter.maydell@linaro.org
| * hw/timer/omap_synctimer.c: Don't use old_mmioPeter Maydell2017-09-211-14/+21
| | | | | | | | | | | | | | | | Don't use the old_mmio in the memory region ops struct. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 1505580378-9044-4-git-send-email-peter.maydell@linaro.org
| * hw/gpio/omap_gpio.c: Don't use old_mmioPeter Maydell2017-09-211-14/+12Star
| | | | | | | | | | | | | | | | Drop the use of old_mmio in the omap2_gpio memory ops. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 1505580378-9044-3-git-send-email-peter.maydell@linaro.org
| * hw/arm/palm.c: Don't use old_mmio for static_opsPeter Maydell2017-09-211-20/+10Star
| | | | | | | | | | | | | | | | | | Update the static_ops functions to use new-style mmio rather than the legacy old_mmio functions. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 1505580378-9044-2-git-send-email-peter.maydell@linaro.org
| * target/arm: Remove out of date ARM ARM section references in A64 decoderPeter Maydell2017-09-211-113/+114
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In the A64 decoder, we have a lot of references to section numbers from version A.a of the v8A ARM ARM (DDI0487). This version of the document is now long obsolete (we are currently on revision B.a), and various intervening versions renumbered all the sections. The most recent B.a version of the document doesn't assign section numbers at all to the individual instruction classes in the way that the various A.x versions did. The simplest thing to do is just to delete all the out of date C.x.x references. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Message-id: 20170915150849.23557-1-peter.maydell@linaro.org
| * nvic: Support banked exceptions in acknowledge and completePeter Maydell2017-09-214-13/+40
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Update armv7m_nvic_acknowledge_irq() and armv7m_nvic_complete_irq() to handle banked exceptions: * acknowledge needs to use the correct vector, which may be in sec_vectors[] * acknowledge needs to return to its caller whether the exception should be taken to secure or non-secure state * complete needs its caller to tell it whether the exception being completed is a secure one or not Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 1505240046-11454-20-git-send-email-peter.maydell@linaro.org
| * nvic: Make SHCSR banked for v8MPeter Maydell2017-09-211-52/+169
| | | | | | | | | | | | | | | | | | Handle banking of SHCSR: some register bits are banked between Secure and Non-Secure, and some are only accessible to Secure. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 1505240046-11454-19-git-send-email-peter.maydell@linaro.org
| * nvic: Make ICSR banked for v8MPeter Maydell2017-09-211-13/+32
| | | | | | | | | | | | | | | | | | | | | | | | The ICSR NVIC register is banked for v8M. This doesn't require any new state, but it does mean that some bits are controlled by BFHNFNMINS and some bits must work with the correct banked exception. There is also a new in v8M PENDNMICLR bit. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 1505240046-11454-18-git-send-email-peter.maydell@linaro.org
| * target/arm: Handle banking in negative-execution-priority check in ↵Peter Maydell2017-09-212-5/+45
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | cpu_mmu_index() Now that we have a banked FAULTMASK register and banked exceptions, we can implement the correct check in cpu_mmu_index() for whether the MPU_CTRL.HFNMIENA bit's effect should apply. This bit causes handlers which have requested a negative execution priority to run with the MPU disabled. In v8M the test has to check this for the current security state and so takes account of banking. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 1505240046-11454-17-git-send-email-peter.maydell@linaro.org
| * nvic: Handle v8M changes in nvic_exec_prio()Peter Maydell2017-09-211-9/+42
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Update nvic_exec_prio() to support the v8M changes: * BASEPRI, FAULTMASK and PRIMASK are all banked * AIRCR.PRIS can affect NS priorities * AIRCR.BFHFNMINS affects FAULTMASK behaviour These changes mean that it's no longer possible to definitely say that if FAULTMASK is set it overrides PRIMASK, and if PRIMASK is set it overrides BASEPRI (since if PRIMASK_NS is set and AIRCR.PRIS is set then whether that 0x80 priority should take effect or the priority in BASEPRI_S depends on the value of BASEPRI_S, for instance). So we switch to the same approach used by the pseudocode of working through BASEPRI, PRIMASK and FAULTMASK and overriding the previous values if needed. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 1505240046-11454-16-git-send-email-peter.maydell@linaro.org
| * nvic: Disable the non-secure HardFault if AIRCR.BFHFNMINS is clearPeter Maydell2017-09-211-2/+10
| | | | | | | | | | | | | | | | | | | | | | If AIRCR.BFHFNMINS is clear, then although NonSecure HardFault can still be pended via SHCSR.HARDFAULTPENDED it mustn't actually preempt execution. The simple way to achieve this is to clear the enable bit for it, since the enable bit isn't guest visible. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 1505240046-11454-15-git-send-email-peter.maydell@linaro.org
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