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| * | | pl050: introduce pl050_mouse_class_init() and pl050_mouse_realize()Mark Cave-Ayland2022-07-181-4/+19
| * | | pl050: introduce pl050_kbd_class_init() and pl050_kbd_realize()Mark Cave-Ayland2022-07-181-2/+19
| * | | pl050: introduce PL050DeviceClass for the PL050 deviceMark Cave-Ayland2022-07-182-1/+9
| * | | pl050: move logic from pl050_realize() to pl050_init()Mark Cave-Ayland2022-07-181-4/+7
| * | | pl050: introduce new PL050_MOUSE_DEVICE QOM typeMark Cave-Ayland2022-07-182-1/+9
| * | | pl050: introduce new PL050_KBD_DEVICE QOM typeMark Cave-Ayland2022-07-182-1/+9
| * | | pl050: change PL050State dev pointer from void to PS2StateMark Cave-Ayland2022-07-182-7/+8
| * | | pl050: rename pl050_keyboard_init() to pl050_kbd_init()Mark Cave-Ayland2022-07-181-2/+2
| * | | pl050: move PL050State from pl050.c to new pl050.h header fileMark Cave-Ayland2022-07-182-15/+36
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* | | Merge tag 'pull-ppc-20220718' of https://gitlab.com/danielhb/qemu into stagingPeter Maydell2022-07-1832-472/+849
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| * | target/ppc: Check page dir/table base alignmentLeandro Lupori2022-07-181-4/+24
| * | target/ppc: Improve Radix xlate level validationLeandro Lupori2022-07-181-11/+38
| * | ppc: Check partition and process table alignmentLeandro Lupori2022-07-184-4/+32
| * | target/ppc: check tb_env != 0 before printing TBU/TBL/DECRMatheus Ferst2022-07-182-10/+17
| * | target/ppc: Implement slbiagLucas Coutinho2022-07-184-0/+46
| * | target/ppc: Move slbsync to decodetreeLucas Coutinho2022-07-183-17/+16Star
| * | target/ppc: Move slbfee to decodetreeLucas Coutinho2022-07-185-28/+38
| * | target/ppc: Move slbmfee to decodetreeLucas Coutinho2022-07-185-15/+17
| * | target/ppc: Move slbmfev to decodetreeLucas Coutinho2022-07-185-14/+18
| * | target/ppc: Move slbmte to decodetreeLucas Coutinho2022-07-185-16/+18
| * | target/ppc: Move slbia to decodetreeLucas Coutinho2022-07-185-19/+21
| * | target/ppc: Move slbieg to decodetreeLucas Coutinho2022-07-185-15/+17
| * | target/ppc: Move slbie to decodetreeLucas Coutinho2022-07-185-15/+23
| * | target/ppc: add macros to check privilege levelMatheus Ferst2022-07-182-5/+23
| * | target/ppc: receive DisasContext explicitly in GEN_PRIVMatheus Ferst2022-07-182-149/+154
| * | target/ppc: Implement ISA 3.00 tlbie[l]Leandro Lupori2022-07-184-0/+188
| * | target/ppc: Move tlbie[l] to decode treeLeandro Lupori2022-07-184-64/+99
| * | target/ppc: fix exception error code in spr_write_excp_vectorMatheus Ferst2022-07-181-3/+3
| * | target/ppc: fix PMU Group A register read/write exceptionsMatheus Ferst2022-07-181-5/+5
| * | target/ppc: fix exception error code in helper_{load, store}_dcrMatheus Ferst2022-07-182-4/+4
| * | target/ppc: remove mfdcrux and mtdcruxMatheus Ferst2022-07-182-22/+2Star
| * | target/ppc: fix exception error value in slbfeeMatheus Ferst2022-07-181-2/+2
| * | target/ppc: Fix gen_priv_exception error value in mfspr/mtsprMatheus Ferst2022-07-181-4/+4
| * | target/ppc/kvm: Skip current and parent directories in kvmppc_find_cpu_dtMurilo Opsfelder Araujo2022-07-181-0/+6
| * | hw/ppc: pass random seed to fdtJason A. Donenfeld2022-07-182-0/+10
| * | ppc: Remove unused irq_inputsCédric Le Goater2022-07-182-6/+0Star
| * | ppc/e500: Allocate IRQ lines with qdev_init_gpio_in()Cédric Le Goater2022-07-182-8/+5Star
| * | ppc/6xx: Allocate IRQ lines with qdev_init_gpio_in()Cédric Le Goater2022-07-186-12/+9Star
| * | ppc/40x: Allocate IRQ lines with qdev_init_gpio_in()Cédric Le Goater2022-07-185-15/+12Star
| * | ppc64: Allocate IRQ lines with qdev_init_gpio_in()Cédric Le Goater2022-07-184-22/+15Star
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* | Merge tag 'pull-target-arm-20220718' of https://git.linaro.org/people/pmaydel...Peter Maydell2022-07-1816-119/+306
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| * | Align Raspberry Pi DMA interrupts with Linux DTSAndrey Makarov2022-07-184-2/+147
| * | target/arm: Don't set syndrome ISS for loads and stores with writebackPeter Maydell2022-07-181-1/+3
| * | hw/adc: Make adci[*] R/W in NPCM7XX ADCHao Wu2022-07-181-1/+1
| * | hw/adc: Fix CONV bit in NPCM7XX ADC CON registerHao Wu2022-07-182-2/+2
| * | target/arm: Honour VTCR_EL2 bits in Secure EL2Peter Maydell2022-07-182-3/+38
| * | target/arm: Store TCR_EL* registers as uint64_tPeter Maydell2022-07-186-68/+27Star
| * | target/arm: Store VTCR_EL2, VSTCR_EL2 registers as uint64_tPeter Maydell2022-07-184-14/+12Star
| * | target/arm: Fix big-endian host handling of VTCRPeter Maydell2022-07-181-1/+1
| * | target/arm: Fold regime_tcr() and regime_tcr_value() togetherPeter Maydell2022-07-184-18/+12Star
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