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| * | hw/ppc/meson: Allow e500 boards to be enabled separatelyBernhard Beschow2022-10-173-5/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Gives users more fine-grained control over what should be compiled into QEMU. Signed-off-by: Bernhard Beschow <shentey@gmail.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20221003203142.24355-2-shentey@gmail.com> Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
| * | ppc440_uc.c: Remove unneeded parenthesisBALATON Zoltan2022-10-171-10/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | Remove unneeded parenthesis around case labels. Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu> Reviewed-by: Cédric Le Goater <clg@kaod.org> Message-Id: <19db326bea989c03e08f2853f789315bbe806fe9.1664021647.git.balaton@eik.bme.hu> Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
| * | ppc440_uc.c: Move some macros to ppc4xx.hBALATON Zoltan2022-10-172-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | These are used by both the SDRAM controller model and system DCRs. In preparation to move SDRAM controller in its own file move these macros to the ppc4xx.h header. Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu> Reviewed-by: Cédric Le Goater <clg@kaod.org> Message-Id: <74d9bf4891e2ccceb52bb6ca6b54fd3f37a9fb04.1664021647.git.balaton@eik.bme.hu> Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
| * | ppc440_sdram: QOM'ifyBALATON Zoltan2022-10-174-53/+97
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Change the ppc440_sdram model to a QOM class derived from the PPC4xx-dcr-device and name it ppc4xx-sdram-ddr2. This is mostly modelling the DDR2 SDRAM controller found in the 460EX (used on the sam460ex board). Newer SoCs (regardless of their PPC core, e.g. 405EX) may have this controller but we only emulate enough of it for the sam460ex u-boot firmware. Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu> Reviewed-by: Cédric Le Goater <clg@kaod.org> Message-Id: <3e82ae575c7c41e464a0082d55ecb4ebcc4d4329.1664021647.git.balaton@eik.bme.hu> Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
| * | ppc440_sdram: Move RAM size check to ppc440_sdram_initBALATON Zoltan2022-10-173-25/+30
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Move the check for valid memory sizes from board to sdram controller init. This adds the missing valid memory sizes of 16 and 8 MiB to the DoC and the board now only checks for additional restrictions imposed by its firmware then sdram init checks for valid sizes for SoC. Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu> Reviewed-by: Cédric Le Goater <clg@kaod.org> Message-Id: <41da3797392acaacc7963b79512c8af8005fa4b0.1664021647.git.balaton@eik.bme.hu> [danielhb: avoid 4*GiB size due to 32 bit build problems] Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
| * | ppc4xx_sdram: Rename functions to prevent name clashesBALATON Zoltan2022-10-176-61/+62
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Rename functions to avoid name clashes when moving the DDR2 controller model currently called ppc440_sdram to ppc4xx_devs. This also more clearly shows which function belongs to which model. Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <9c09d10fbf36940ebbe30d7038d69cf3f2e58371.1664021647.git.balaton@eik.bme.hu> Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
| * | ppc440_sdram: Rename local variable for readabilityBALATON Zoltan2022-10-171-18/+18
| | | | | | | | | | | | | | | | | | | | | | | | | | | Rename local sdram variable in ppc440_sdram_init to s for readability. Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu> Reviewed-by: Cédric Le Goater <clg@kaod.org> Message-Id: <7351b80fa321c32a6229e685dfdc940232f8b788.1664021647.git.balaton@eik.bme.hu> Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
| * | ppc440_sdram: Get rid of the init RAM hackBALATON Zoltan2022-10-174-9/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Remove the do_init parameter of ppc440_sdram_init and enable SDRAM controller from the board. Firmware does this so it may only be needed when booting with -kernel without firmware but we enable SDRAM unconditionally to preserve previous behaviour. Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu> Reviewed-by: Daniel Henrique Barboza <danielhb413@gmail.com> Message-Id: <c2eda8f83c82f655aa7821a5a8c9310484bd6a1d.1664021647.git.balaton@eik.bme.hu> Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
| * | ppc440_sdram: Implement enable bit in the DDR2 SDRAM controllerBALATON Zoltan2022-10-171-2/+32
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | To allow removing the do_init hack we need to improve the DDR2 SDRAM controller model to handle the enable/disable bit that it ignored so far. Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu> Reviewed-by: Daniel Henrique Barboza <danielhb413@gmail.com> Message-Id: <f8900aadb1a4426a6444741e6876c898b3b77f7b.1664021647.git.balaton@eik.bme.hu> Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
| * | ppc440_sdram: Split off map/unmap of sdram banks for later reuseBALATON Zoltan2022-10-171-12/+21
| | | | | | | | | | | | | | | | | | | | | Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <23560b6a71682d513f3dd8e9ed3852f51d5eb309.1664021647.git.balaton@eik.bme.hu> Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
| * | ppc4xx_sdram: Drop extra zeros for readabilityBALATON Zoltan2022-10-171-20/+20
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Constants that are written zero padded for no good reason are hard to read, it's easier to see what is meant if it's just 0 or 1 instead. Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <93974622c3d398c7d3a3488b678b74c3807849de.1664021647.git.balaton@eik.bme.hu> Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
| * | ppc4xx_sdram: QOM'ifyBALATON Zoltan2022-10-176-70/+105
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Change the ppc4xx_sdram model to a QOM class derived from the PPC4xx-dcr-device and name it ppc4xx-sdram-ddr. This is mostly modelling the DDR SDRAM controller found in the 440EP (used on the bamboo board) but also backward compatible with the older DDR controllers on some 405 SoCs so we also use it for those now. This likely does not cause problems for guests we run as the new features are just not accessed but to model 405 SoC accurately some features may have to be disabled or the model split between 440 and older. Newer SoCs (regardless of their PPC core, e.g. 405EX) may have an updated DDR2 SDRAM controller implemented by the ppc440_sdram model (only partially, enough for the 460EX on the sam460ex) that is not yet QOM'ified in this patch. That is intended to become ppc4xx-sdram-ddr2 when QOM'ified later. Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu> Reviewed-by: Cédric Le Goater <clg@kaod.org> Message-Id: <8f820487fc9011343032c422ecdf3e8ee74d8c11.1664021647.git.balaton@eik.bme.hu> Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
| * | ppc4xx_sdram: Move size check to ppc4xx_sdram_init()BALATON Zoltan2022-10-176-39/+10Star
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Instead of checking if memory size is valid in board code move this check to ppc4xx_sdram_init() as this is a restriction imposed by the SDRAM controller. Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <39e5129dd095b285676a6267c5753786da1bc30d.1664021647.git.balaton@eik.bme.hu> Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
| * | ppc440_bamboo: Add missing 4 MiB valid memory sizeBALATON Zoltan2022-10-171-1/+1
| | | | | | | | | | | | | | | | | | | | | Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu> Reviewed-by: Cédric Le Goater <clg@kaod.org> Message-Id: <05836e38be84729c1c6b5b609e7aa2ea60435033.1664021647.git.balaton@eik.bme.hu> Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
| * | ppc4xx: Use Ppc4xxSdramBank in ppc4xx_sdram_banks()BALATON Zoltan2022-10-178-53/+35Star
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Change ppc4xx_sdram_banks() to take one Ppc4xxSdramBank array instead of the separate arrays and adjust ppc4xx_sdram_init() and ppc440_sdram_init() accordingly as well as machines using these. Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu> Reviewed-by: Cédric Le Goater <clg@kaod.org> Message-Id: <e3a1fea51f29779fd6a61be90a29c684f3299544.1664021647.git.balaton@eik.bme.hu> Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
| * | ppc4xx_sdram: Get rid of the init RAM hackBALATON Zoltan2022-10-176-14/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The do_init parameter of ppc4xx_sdram_init() is used to map memory regions that is normally done by the firmware by programming the SDRAM controller. Do this from board code emulating what firmware would do when booting a kernel directly from -kernel without a firmware so we can get rid of this do_init hack. Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu> Reviewed-by: Daniel Henrique Barboza <danielhb413@gmail.com> Message-Id: <d6c44c870befa1a075e21f1a59926dcdaff63f6b.1664021647.git.balaton@eik.bme.hu> Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
| * | ppc4xx: Introduce Ppc4xxSdramBank structBALATON Zoltan2022-10-173-55/+61
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Instead of storing sdram bank parameters in unrelated arrays put them in a struct so it's clear they belong to the same bank and simplify the state struct using this bank type. Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <5eb82d0424c584b2b9e6f7bc51560f8189ed21bb.1664021647.git.balaton@eik.bme.hu> Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
| * | ppc440_bamboo: Remove unnecessary memsetsBALATON Zoltan2022-10-172-10/+4Star
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In ppc4xx_sdram_init() the struct is allocated with g_new0() so no need to clear its elements. In the bamboo machine init memset can be replaced with array initialiser which is shorter. Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu> Reviewed-by: Daniel Henrique Barboza <danielhb413@gmail.com> Message-Id: <529adc7705fb3e3e777439895bdaa136bacb9403.1664021647.git.balaton@eik.bme.hu> Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
| * | target/ppc: restore powerpc_excp_booke doorbell interruptsNicholas Piggin2022-10-171-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This partially reverts commit 9dc20cc37db9 ("target/ppc: Simplify powerpc_excp_booke"), which removed DOORI and DOORCI interrupts. Without this patch, a -cpu e5500 -smp 2 machine booting Linux crashes with: qemu: fatal: Invalid PowerPC exception 36. Aborting Signed-off-by: Nicholas Piggin <npiggin@gmail.com> Reviewed-by: Cédric Le Goater <clg@kaod.org> Message-Id: <20220924114436.1422786-1-npiggin@gmail.com> Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
| * | MAINTAINERS: step back from PPCCédric Le Goater2022-10-171-5/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | I am not active anymore on the PPC maintainership, degrade my self as standard Reviewer. Also degrade PowerNV and XIVE status since I am not funded for this work. Signed-off-by: Cédric Le Goater <clg@kaod.org> Reviewed-by: Greg Kurz <groug@kaod.org> Reviewed-by: David Gibson <david@gibson.dropbear.id.au> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20220929180946.848721-1-clg@kaod.org> Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
* | | MAINTAINERS: Replace my amsat.org email addressPhilippe Mathieu-Daudé2022-10-172-32/+34
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The amsat.org domain is having issues with DMARC / SPF / DKIM: https://lore.kernel.org/qemu-devel/CAMVc7JUy5NeEN0q=4zfZvn_rppgqn9wicV1z=TsLuHKS3RY3Sw@mail.gmail.com/ Consolidate all of my MAINTAINERS entries on my work address. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-id: 20221017182005.43015-1-philmd@linaro.org Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
* | | Merge tag 'pull-loongarch-20221017' of https://gitlab.com/gaosong/qemu into ↵Stefan Hajnoczi2022-10-175-22/+31
|\ \ \ | |/ / |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | staging pull-loongarch-20221017 # -----BEGIN PGP SIGNATURE----- # # iLMEAAEIAB0WIQS4/x2g0v3LLaCcbCxAov/yOSY+3wUCY0y+zwAKCRBAov/yOSY+ # 3xHRA/9+Q6clt4RcaQqBEwhNVSdoEBAjNdTzVP+9wVDsGZ4slFUQ6AKI/9RCdMaY # +JzyVTVtuo73QlgZ47/R21GR8phStPjRuad+Gk+1cMAJ5VzF3qjFucUjS9aqKpkE # 8KQc6U3Ue5YlIF4Y+fctrzM+ql9gfh6Q2dDeia77cdEKjDj2Aw== # =xXE/ # -----END PGP SIGNATURE----- # gpg: Signature made Sun 16 Oct 2022 22:32:47 EDT # gpg: using RSA key B8FF1DA0D2FDCB2DA09C6C2C40A2FFF239263EDF # gpg: Can't check signature: No public key * tag 'pull-loongarch-20221017' of https://gitlab.com/gaosong/qemu: hw/intc: Fix LoongArch ipi device emulation linux-user: Fix struct statfs ABI on loongarch64 softfloat: logB(0) should raise divideByZero exception target/loongarch: Fix fnm{sub/add}_{s/d} set wrong flags target/loongarch: bstrins.w src register need EXT_NONE Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
| * | hw/intc: Fix LoongArch ipi device emulationXiaojuan Yang2022-10-171-1/+0Star
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In ipi_send function, it should not to set irq before writing data to dest cpu iocsr space, as the irq will trigger after data writing. When call this function 'address_space_stl()', it will trigger loongarch_ipi_writel(), the addr arg is 0x1008 ('CORE_SET_OFF'), and qemu_irq_raise will be called in this case. Signed-off-by: Xiaojuan Yang <yangxiaojuan@loongson.cn> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20220930095139.867115-3-yangxiaojuan@loongson.cn> Signed-off-by: Song Gao <gaosong@loongson.cn>
| * | linux-user: Fix struct statfs ABI on loongarch64WANG Xuerui2022-10-171-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Previously the 32-bit version was incorrectly chosen, leading to funny but incorrect output from e.g. df(1). Simply select the version corresponding to the 64-bit asm-generic definition. For reference, this program should produce the same output no matter natively compiled or not, for loongarch64 or not: ```c #include <stdio.h> #include <sys/statfs.h> int main(int argc, const char *argv[]) { struct statfs b; if (statfs(argv[0], &b)) return 1; printf("f_type = 0x%lx\n", b.f_type); printf("f_bsize = %ld\n", b.f_bsize); printf("f_blocks = %ld\n", b.f_blocks); printf("f_bfree = %ld\n", b.f_bfree); printf("f_bavail = %ld\n", b.f_bavail); return 0; } // Example output on my amd64 box, with the test binary residing on a // btrfs partition. // Native and emulated output after the fix: // // f_type = 0x9123683e // f_bsize = 4096 // f_blocks = 268435456 // f_bfree = 168406890 // f_bavail = 168355058 // Output before the fix, note the messed layout: // // f_type = 0x10009123683e // f_bsize = 723302085239504896 // f_blocks = 168355058 // f_bfree = 2250817541779750912 // f_bavail = 1099229433104 ``` Fixes: 1f63019632 ("linux-user: Add LoongArch syscall support") Signed-off-by: WANG Xuerui <xen0n@gentoo.org> Cc: Song Gao <gaosong@loongson.cn> Cc: Xiaojuan Yang <yangxiaojuan@loongson.cn> Cc: Andreas K. Hüttel <dilfridge@gentoo.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Tested-by: Andreas K. Huettel <dilfridge@gentoo.org> Message-Id: <20221006100710.427252-1-xen0n@gentoo.org> Signed-off-by: Song Gao <gaosong@loongson.cn>
| * | softfloat: logB(0) should raise divideByZero exceptionSong Gao2022-10-171-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | logB(0) should raise divideByZero exception from IEEE 754-2008 spec 7.3 Suggested-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Song Gao <gaosong@loongson.cn> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20220930024510.800005-4-gaosong@loongson.cn>
| * | target/loongarch: Fix fnm{sub/add}_{s/d} set wrong flagsSong Gao2022-10-171-6/+6
| | | | | | | | | | | | | | | | | | Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Song Gao <gaosong@loongson.cn> Message-Id: <20220930024510.800005-3-gaosong@loongson.cn>
| * | target/loongarch: bstrins.w src register need EXT_NONESong Gao2022-10-171-14/+22
|/ / | | | | | | | | | | | | | | | | use gen_bstrins/gen_bstrpic to replace gen_rr_ms_ls. Suggested-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Song Gao <gaosong@loongson.cn> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20220930024510.800005-2-gaosong@loongson.cn>
* | Merge tag 'pull-riscv-to-apply-20221014' of ↵Stefan Hajnoczi2022-10-1612-165/+1675
|\ \ | |/ |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | https://github.com/alistair23/qemu into staging Third RISC-V PR for QEMU 7.2 * Update qtest comment * Fix coverity issue with Ibex SPI * Move load_image_to_fw_cfg() to common location * Enable booting S-mode firmware from pflash on virt machine * Add disas support for vector instructions * Priority level fixes for PLIC * Fixup TLB size calculation when using PMP # -----BEGIN PGP SIGNATURE----- # # iQEzBAABCAAdFiEE9sSsRtSTSGjTuM6PIeENKd+XcFQFAmNJFR8ACgkQIeENKd+X # cFTOzgf+Mg4vy3PpY/hDuYJwZyYrgcY9M/VwUFONUD5TL1ehweuEeu5NF/iJpzfP # ywjvESxhFpGQ97zSH10IbTxQwP5fifE7JMlC4ncYTTLQYk43kiYmSM5MAbxgEC44 # PgF5/WVUWI8tDJhzfAEII17AohtTc9rzWcoXh+oLX53IB0V7qh4Eq0+Rm/i/yO5I # oD70deU+DegHb4ka6w6k2nHEhi9IoNA0uslQrQzKVr/WQPE/1TVkmvy0u3tiFSoI # 0MFXQjCirzdJoNU+5Wq3F0ygPMupMopOnidaMR8wH9fk3pb7hzzOve5wQRM+EtIv # W2QGnWNaiR7n3UeGWYnh7aidcJ7Dfw== # =O3mB # -----END PGP SIGNATURE----- # gpg: Signature made Fri 14 Oct 2022 03:51:59 EDT # gpg: using RSA key F6C4AC46D4934868D3B8CE8F21E10D29DF977054 # gpg: Good signature from "Alistair Francis <alistair@alistair23.me>" [unknown] # gpg: WARNING: This key is not certified with a trusted signature! # gpg: There is no indication that the signature belongs to the owner. # Primary key fingerprint: F6C4 AC46 D493 4868 D3B8 CE8F 21E1 0D29 DF97 7054 * tag 'pull-riscv-to-apply-20221014' of https://github.com/alistair23/qemu: target/riscv: pmp: Fixup TLB size calculation hw/intc: sifive_plic: change interrupt priority register to WARL field hw/intc: sifive_plic: fix hard-coded max priority level disas/riscv.c: rvv: Add disas support for vector instructions hw/riscv: virt: Enable booting S-mode firmware from pflash hw/riscv: virt: Move create_fw_cfg() prior to loading kernel hw/arm, loongarch: Move load_image_to_fw_cfg() to common location hw/ssi: ibex_spi: fixup/add rw1c functionality hw/ssi: ibex_spi: fixup coverity issue hw/riscv: Update comment for qtest check in riscv_find_firmware() Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
| * target/riscv: pmp: Fixup TLB size calculationAlistair Francis2022-10-141-0/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Since commit 4047368938f6 "accel/tcg: Introduce tlb_set_page_full" we have been seeing this assert ../accel/tcg/cputlb.c:1294: tlb_set_page_with_attrs: Assertion `is_power_of_2(size)' failed. When running Tock on the OpenTitan machine. The issue is that pmp_get_tlb_size() would return a TLB size that wasn't a power of 2. The size was also smaller then TARGET_PAGE_SIZE. This patch ensures that any TLB size less then TARGET_PAGE_SIZE is rounded down to 1 to ensure it's a valid size. Signed-off-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: LIU Zhiwei<zhiwei_liu@linux.alibaba.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20221012011449.506928-1-alistair.francis@opensource.wdc.com Message-Id: <20221012011449.506928-1-alistair.francis@opensource.wdc.com>
| * hw/intc: sifive_plic: change interrupt priority register to WARL fieldJim Shu2022-10-141-2/+19
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | PLIC spec [1] requires interrupt source priority registers are WARL field and the number of supported priority is power-of-2 to simplify SW discovery. Existing QEMU RISC-V machine (e.g. shakti_c) don't strictly follow PLIC spec, whose number of supported priority is not power-of-2. Just change each bit of interrupt priority register to WARL field when the number of supported priority is power-of-2. [1] https://github.com/riscv/riscv-plic-spec/blob/master/riscv-plic.adoc#interrupt-priorities Signed-off-by: Jim Shu <jim.shu@sifive.com> Reviewed-by: Clément Chigot <chigot@adacore.com> Acked-by: Alistair Francis <alistair.francis@wdc.com> Message-Id: <20221003041440.2320-3-jim.shu@sifive.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
| * hw/intc: sifive_plic: fix hard-coded max priority levelJim Shu2022-10-141-2/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The maximum priority level is hard-coded when writing to interrupt priority register. However, when writing to priority threshold register, the maximum priority level is from num_priorities Property which is configured by platform. Also change interrupt priority register to use num_priorities Property in maximum priority level. Signed-off-by: Emmanuel Blot <emmanuel.blot@sifive.com> Signed-off-by: Jim Shu <jim.shu@sifive.com> Reviewed-by: Frank Chang <frank.chang@sifive.com> Acked-by: Alistair Francis <alistair.francis@wdc.com> Message-Id: <20221003041440.2320-2-jim.shu@sifive.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
| * disas/riscv.c: rvv: Add disas support for vector instructionsYang Liu2022-10-141-2/+1430
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Tested with https://github.com/ksco/rvv-decoder-tests Expected checkpatch errors for consistency and brevity reasons: ERROR: line over 90 characters ERROR: trailing statements should be on next line ERROR: braces {} are necessary for all arms of this statement Signed-off-by: Yang Liu <liuyang22@iscas.ac.cn> Acked-by: Alistair Francis <alistair.francis@wdc.com> Message-Id: <20220928051842.16207-1-liuyang22@iscas.ac.cn> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
| * hw/riscv: virt: Enable booting S-mode firmware from pflashSunil V L2022-10-143-1/+47
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | To boot S-mode firmware payload like EDK2 from persistent flash storage, qemu needs to pass the flash address as the next_addr in fw_dynamic_info to the opensbi. When both -kernel and -pflash options are provided in command line, the kernel (and initrd if -initrd) will be copied to fw_cfg table. The S-mode FW will load the kernel/initrd from fw_cfg table. If only pflash is given but not -kernel, then it is the job of of the S-mode firmware to locate and load the kernel. In either case, update the kernel_entry with the flash address so that the opensbi can jump to the entry point of the S-mode firmware. Signed-off-by: Sunil V L <sunilvl@ventanamicro.com> Reviewed-by: Andrew Jones <ajones@ventanamicro.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-Id: <20221004092351.18209-4-sunilvl@ventanamicro.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
| * hw/riscv: virt: Move create_fw_cfg() prior to loading kernelSunil V L2022-10-141-7/+7
| | | | | | | | | | | | | | | | | | | | | | To enable both -kernel and -pflash options, the fw_cfg needs to be created prior to loading the kernel. Signed-off-by: Sunil V L <sunilvl@ventanamicro.com> Reviewed-by: Andrew Jones <ajones@ventanamicro.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-Id: <20221004092351.18209-3-sunilvl@ventanamicro.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
| * hw/arm, loongarch: Move load_image_to_fw_cfg() to common locationSunil V L2022-10-144-82/+53Star
| | | | | | | | | | | | | | | | | | | | | | | | | | load_image_to_fw_cfg() is duplicated by both arm and loongarch. The same function will be required by riscv too. So, it's time to refactor and move this function to a common path. Signed-off-by: Sunil V L <sunilvl@ventanamicro.com> Reviewed-by: Andrew Jones <ajones@ventanamicro.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Song Gao <gaosong@loongson.cn> Message-Id: <20221004092351.18209-2-sunilvl@ventanamicro.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
| * hw/ssi: ibex_spi: fixup/add rw1c functionalityWilfred Mallawa2022-10-142-5/+35
| | | | | | | | | | | | | | | | | | | | | | This patch adds the `rw1c` functionality to the respective registers. The status fields are cleared when the respective field is set. Signed-off-by: Wilfred Mallawa <wilfred.mallawa@wdc.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-Id: <20220930033241.206581-3-wilfred.mallawa@opensource.wdc.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
| * hw/ssi: ibex_spi: fixup coverity issueWilfred Mallawa2022-10-141-64/+68
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch addresses the coverity issues specified in [1], as suggested, `FIELD_DP32()`/`FIELD_EX32()` macros have been implemented to clean up the code. [1] https://www.mail-archive.com/qemu-devel@nongnu.org/msg887713.html Fixes: Coverity CID 1488107 Signed-off-by: Wilfred Mallawa <wilfred.mallawa@wdc.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Andrew Jones <ajones@ventanamicro.com> Message-Id: <20220930033241.206581-2-wilfred.mallawa@opensource.wdc.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
| * hw/riscv: Update comment for qtest check in riscv_find_firmware()Bin Meng2022-10-141-2/+2
|/ | | | | | | | | | | Since commit 4211fc553234 ("roms/opensbi: Remove ELF images"), the comment for qtest check in riscv_find_firmware() is out of date. Update it to reflect the latest status. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-Id: <BN7PR08MB435525C92550BAC5467BE672BF219@BN7PR08MB4355.namprd08.prod.outlook.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
* Merge tag 'kraxel-20221013-pull-request' of https://gitlab.com/kraxel/qemu ↵Stefan Hajnoczi2022-10-1323-93/+219
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | into staging pci: cleanup virtio ids. audio: bugfixes and latency improvements. misc fixes for hw/display and ui # -----BEGIN PGP SIGNATURE----- # # iQIzBAABCgAdFiEEoDKM/7k6F6eZAf59TLbY7tPocTgFAmNHtYsACgkQTLbY7tPo # cTjHhg//RDkHbqVSExe+Odw5ISuLu/EXZSHAVjo3KOCUvaj7O2cXi8N7DVfEy5a5 # T3+WSv0v4X6TYSV0PoMb36a11rCuOKzeLZrtEOQeYfG3D1WCVc9gIWMt6omzBC7A # YQ59P+u19qHD7xD2PP3WRtdcqmsceg1RG+47adX2EnsRZmmu/yJxD72w/Q1kXMuB # jIzuJU2ZVorYX9y11hnIU3M5pvoX/vjFA+Ib2UGZZdlE3KlUKtJeAtLiZkHfoyd1 # 5janU+PtSU6Z1yVirE7RVz3+IBbfqqEFTkDtMXJucJW/Eod0NHCyo4Q6D64HoiZe # +JZKkHmuvn8ZUgXMtIOZdH+aOHlaIJzA5SoA2IFxCBVuxn7p4NtPbCRoHHg7gkDh # BDsq+p/wsdOY06u1txFw9dYy+4tKvWS7+Dxhyme7GT2YUQHrEEG3pzGFmk3PE0Vi # tEAhmfNRxWzUgIcynQiN/3SnShAI8lANq0SEiiTvqcX7h1TK+cjEYjOTMsjK43nL # 2W/pgQxJpEPcSs3jgFLnBLk9rUHRNRC+GtMBlwN+Wdc1y17leZHiIinqhHjXuts3 # cJTdv4veeGuJENPIl2rk5JOdvpVtzduDkz+Rzx0mGb+LnAYdK2lBUV5LY9FfdwaK # 2Bgg02ZYNBz7K2zzFeeV+7b7K/LYOuWkGdzGvKbpqjbefopZmTM= # =6d/F # -----END PGP SIGNATURE----- # gpg: Signature made Thu 13 Oct 2022 02:51:55 EDT # gpg: using RSA key A0328CFFB93A17A79901FE7D4CB6D8EED3E87138 # gpg: Good signature from "Gerd Hoffmann (work) <kraxel@redhat.com>" [full] # gpg: aka "Gerd Hoffmann <gerd@kraxel.org>" [full] # gpg: aka "Gerd Hoffmann (private) <kraxel@gmail.com>" [full] # Primary key fingerprint: A032 8CFF B93A 17A7 9901 FE7D 4CB6 D8EE D3E8 7138 * tag 'kraxel-20221013-pull-request' of https://gitlab.com/kraxel/qemu: (26 commits) audio: improve out.voices test audio: fix in.voices test gtk: Add show_menubar=on|off command line option. qemu-edid: Restrict input parameter -d to avoid division by zero ui/gtk: Fix the implicit mouse ungrabbing logic pci-ids: document modern virtio-pci ids in pci.h too pci-ids: drop list of modern virtio devices pci-ids: drop PCI_DEVICE_ID_VIRTIO_PMEM pci-ids: drop PCI_DEVICE_ID_VIRTIO_MEM pci-ids: drop PCI_DEVICE_ID_VIRTIO_IOMMU docs: add firmware feature flags cirrus_vga: fix potential memory overflow ui/gtk-egl: egl context needs to be unbound in the end of gd_egl_switch ui/vnc-clipboard: fix integer underflow in vnc_client_cut_text_ext audio: prevent an integer overflow in resampling code audio: fix sw->buf size for audio recording audio: refactor audio_get_avail() audio: rename audio_sw_bytes_free() audio: swap audio_rate_get_bytes() function parameters spiceaudio: update comment ... Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
| * audio: improve out.voices testHelge Konetzka2022-10-121-1/+1
| | | | | | | | | | | | | | | | | | | | Improve readability of audio out.voices test: If 1 is logged and set after positive test, 1 should be tested. Signed-off-by: Helge Konetzka <hk@zapateado.de> Reviewed-by: Marc-André Lureau <marcandre.lureau@redhat.com> Message-Id: <20221012114925.5084-3-hk@zapateado.de> Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
| * audio: fix in.voices testHelge Konetzka2022-10-121-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | Calling qemu with valid -audiodev ...,in.voices=0 results in an obsolete warning: audio: Bogus number of capture voices 0, setting to 0 This patch fixes the in.voices test. Signed-off-by: Helge Konetzka <hk@zapateado.de> Reviewed-by: Marc-André Lureau <marcandre.lureau@redhat.com> Message-Id: <20221012114925.5084-2-hk@zapateado.de> Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
| * gtk: Add show_menubar=on|off command line option.Bryce Mills2022-10-123-6/+17
| | | | | | | | | | | | | | | | | | | | | | The patch adds "show_menubar" command line option for GTK UI similar to "show_tabs". This option allows to hide menu bar initially, it still can be toggled by shortcut and other shortcuts still work. Signed-off-by: Bryce Mills <brycemills@proton.me> Acked-by: Markus Armbruster <armbru@redhat.com> Message-Id: <NWO_zx1CT5Aj9vAXsRlqBppXd63gcKwL9V1qM1Meh36M_9tCw-EsCnfpvONXhHjmtKIUoSuCy9OO6cHS7M8b0oHBOCZG6f1jZ4Q2tqgI2Qo=@proton.me> Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
| * qemu-edid: Restrict input parameter -d to avoid division by zeroSebastian Mitterle2022-10-121-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | A zero value for dpi will lead to a division by zero in qemu_edid_dpi_to_mm(). Tested by runnig qemu-edid -dX, X = 0, 100. Resolves: qemu-project/qemu#1249 Suggested-by: Thomas Huth <thuth@redhat.com> Signed-off-by: Sebastian Mitterle <smitterl@redhat.com> Message-Id: <20221011151216.64897-1-smitterl@redhat.com> Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
| * ui/gtk: Fix the implicit mouse ungrabbing logicAkihiko Odaki2022-10-121-3/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Although the grab menu item represents the tabbed displays, the old implicit mouse ungrabbing logic changes the grab menu item even for an untabbed display. Leave the grab menu item when implicitly ungrabbing mouse for an untabbed display. The new ungrabbing logic introduced in gd_mouse_mode_change() strictly follows the corresponding grabbing logic found in gd_button_event(). Signed-off-by: Akihiko Odaki <akihiko.odaki@daynix.com> Message-Id: <20221008140116.11473-1-akihiko.odaki@daynix.com> Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
| * pci-ids: document modern virtio-pci ids in pci.h tooGerd Hoffmann2022-10-122-1/+11
| | | | | | | | | | | | | | | | While being at it add a #define for the magic 0x1040 number. Signed-off-by: Gerd Hoffmann <kraxel@redhat.com> Reviewed-by: Eric Auger <eric.auger@redhat.com> Message-Id: <20221004112100.301935-6-kraxel@redhat.com>
| * pci-ids: drop list of modern virtio devicesGerd Hoffmann2022-10-121-10/+8Star
| | | | | | | | | | | | | | | | | | Drop the list of modern virtio devices and explain how they are calculated instead. Signed-off-by: Gerd Hoffmann <kraxel@redhat.com> Reviewed-by: Eric Auger <eric.auger@redhat.com> Message-Id: <20221004112100.301935-5-kraxel@redhat.com>
| * pci-ids: drop PCI_DEVICE_ID_VIRTIO_PMEMGerd Hoffmann2022-10-122-3/+0Star
| | | | | | | | | | | | | | | | | | | | | | Not needed for a virtio 1.0 device. virtio_pci_device_plugged() overrides them anyway (so no functional change). Signed-off-by: Gerd Hoffmann <kraxel@redhat.com> Reviewed-by: David Hildenbrand <david@redhat.com> Reviewed-by: Pankaj Gupta <pankaj.gupta@amd.com> Tested-by: Pankaj Gupta <pankaj.gupta@amd.com> Message-Id: <20221004112100.301935-4-kraxel@redhat.com>
| * pci-ids: drop PCI_DEVICE_ID_VIRTIO_MEMGerd Hoffmann2022-10-122-3/+0Star
| | | | | | | | | | | | | | | | | | Not needed for a virtio 1.0 device. virtio_pci_device_plugged() overrides them anyway (so no functional change). Signed-off-by: Gerd Hoffmann <kraxel@redhat.com> Reviewed-by: David Hildenbrand <david@redhat.com> Message-Id: <20221004112100.301935-3-kraxel@redhat.com>
| * pci-ids: drop PCI_DEVICE_ID_VIRTIO_IOMMUGerd Hoffmann2022-10-122-4/+1Star
| | | | | | | | | | | | | | | | | | | | Not needed for a virtio 1.0 device. virtio_pci_device_plugged() overrides them anyway (so no functional change). Signed-off-by: Gerd Hoffmann <kraxel@redhat.com> Reviewed-by: Eric Auger <eric.auger@redhat.com> Tested-by: Eric Auger <eric.auger@redhat.com> Message-Id: <20221004112100.301935-2-kraxel@redhat.com>
| * docs: add firmware feature flagsGerd Hoffmann2022-10-121-5/+16
| | | | | | | | | | | | | | | | | | | | | | Add new firmware feature flags for the recently added confidential computing operating modes by amd and intel. While being at it also fix the path to the amd sev documentation. Signed-off-by: Gerd Hoffmann <kraxel@redhat.com> Reviewed-by: Kashyap Chamarthy <kchamart@redhat.com> Message-Id: <20220930133220.1771336-1-kraxel@redhat.com>
generated by cgit v1.2.3-55-g7522 (git 2.39.0) at 2026-03-02 21:08:44 +0100