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* fpu/softfloat: Define floatN_silence_nan in terms of parts_silence_nanRichard Henderson2018-05-181-77/+4Star
| | | | | | | | | | | | | | Isolate the target-specific choice to 3 functions instead of 6. The code in floatx80_default_nan tried to be over-general. There are only two targets that support this format: x86 and m68k. Thus there is no point in inventing a mechanism for snan_bit_is_one. Move routines that no longer have ifdefs out of softfloat-specialize.h. Tested-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
* fpu/softfloat: Clean up parts_default_nanRichard Henderson2018-05-181-7/+14
| | | | | | | | | Reduce the number of ifdefs. Correct the result for OpenRISC and TriCore (although TriCore fixed in target-specific code). Tested-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
* fpu/softfloat: Define floatN_default_nan in terms of parts_default_nanRichard Henderson2018-05-181-99/+6Star
| | | | | | | | | | | | | | | | | | | | Isolate the target-specific choice to 2 functions instead of 6. The code in float16_default_nan was only correct for ARM, MIPS, and X86. Though float16 support is rare among our targets. The code in float128_default_nan was arguably wrong for Sparc. While QEMU supports the Sparc 128-bit insns, no real cpu enables it. The code in floatx80_default_nan tried to be over-general. There are only two targets that support this format: x86 and m68k. Thus there is no point in inventing a value for snan_bit_is_one. Move routines that no longer have ifdefs out of softfloat-specialize.h. Tested-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
* fpu/softfloat: Pass FloatClass to pickNaNMulAddRichard Henderson2018-05-181-43/+27Star
| | | | | | | | | | For each operand, pass a single enumeration instead of a pair of booleans. The commit also merges multiple different ifdef-selected implementations of pickNaNMulAdd into a single function whose body is ifdef-selected. Tested-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
* fpu/softfloat: Pass FloatClass to pickNaNRichard Henderson2018-05-181-91/+85Star
| | | | | | | | | | For each operand, pass a single enumeration instead of a pair of booleans. The commit also merges multiple different ifdef-selected implementations of pickNaN into a single function whose body is ifdef-selected. Tested-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
* fpu/softfloat: Specialize on snan_bit_is_oneRichard Henderson2018-05-181-25/+43
| | | | | | | | | | | | | | | | Only MIPS requires snan_bit_is_one to be variable. While we are specializing softfloat behaviour, allow other targets to eliminate this runtime check. Cc: Aurelien Jarno <aurelien@aurel32.net> Cc: Yongbok Kim <yongbok.kim@mips.com> Cc: David Gibson <david@gibson.dropbear.id.au> Cc: Alexander Graf <agraf@suse.de> Cc: Guan Xuetao <gxt@mprc.pku.edu.cn> Tested-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
* fpu/softfloat: Remove floatX_maybe_silence_nanRichard Henderson2018-05-181-63/+0Star
| | | | | | | | | These functions are now unused. Tested-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
* fpu/softfloat: Use float*_silence_nan in propagateFloat*NaNRichard Henderson2018-05-181-10/+34
| | | | | | | | | | We have already checked the arguments for SNaN; we don't need to do it again. Tested-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
* fpu/softfloat: re-factor float to float conversionsAlex Bennée2018-05-181-40/+0Star
| | | | | | | | | This allows us to delete a lot of additional boilerplate code which is no longer needed. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
* fpu/softfloat: Replace float_class_msnan with parts_silence_nanRichard Henderson2018-05-181-0/+23
| | | | | | | | | | With a canonical representation of NaNs, we can silence an SNaN immediately rather than delay until the final format is known. Tested-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
* fpu/softfloat: Replace float_class_dnan with parts_default_nanRichard Henderson2018-05-181-0/+37
| | | | | | | | | | | | | | With a canonical representation of NaNs, we can return the default nan directly rather than delay the expansion until the final format is known. Note one case where we uselessly assigned to a.sign, which was overwritten/ignored later when expanding float_class_dnan. Tested-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
* fpu/softfloat: Introduce parts_is_snan_fracRichard Henderson2018-05-181-0/+15
| | | | | | | Tested-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
* fpu/softfloat: Split floatXX_silence_nan from floatXX_maybe_silence_nanRichard Henderson2018-05-181-56/+118
| | | | | | | | | | The new function assumes that the input is an SNaN and does not double-check. Tested-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
* fpu/softfloat: Merge NO_SIGNALING_NANS definitionsRichard Henderson2018-05-181-60/+40Star
| | | | | | | | | | Move the ifdef inside the relevant functions instead of duplicating the function declarations. Tested-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
* RISC-V FPU SupportMichael Clark2018-03-061-3/+4
| | | | | | | | Helper routines for FPU instructions and NaN definitions. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Sagar Karandikar <sagark@eecs.berkeley.edu> Signed-off-by: Michael Clark <mjc@sifive.com>
* softfloat: use floatx80_infinity in softfloatLaurent Vivier2018-03-041-0/+14
| | | | | | | | | | | | | | | | Since f3218a8 ("softfloat: add floatx80 constants") floatx80_infinity is defined but never used. This patch updates floatx80 functions to use this definition. This allows to define a different default Infinity value on m68k: the m68k FPU defines infinity with all bits set to zero in the mantissa. Signed-off-by: Laurent Vivier <laurent@vivier.eu> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20180224201802.911-4-laurent@vivier.eu>
* softfloat: export some functionsLaurent Vivier2018-03-041-2/+1Star
| | | | | | | | | | | | | | | | | | | | Move fpu/softfloat-macros.h to include/fpu/ Export floatx80 functions to be used by target floatx80 specific implementations. Exports: propagateFloatx80NaN(), extractFloatx80Frac(), extractFloatx80Exp(), extractFloatx80Sign(), normalizeFloatx80Subnormal(), packFloatx80(), roundAndPackFloatx80(), normalizeRoundAndPackFloatx80() Also exports packFloat32() that will be used to implement m68k fsinh, fcos, fsin, ftan operations. Signed-off-by: Laurent Vivier <laurent@vivier.eu> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20180224201802.911-2-laurent@vivier.eu>
* fpu/softfloat: re-factor muladdAlex Bennée2018-02-211-104/+0Star
| | | | | | | | | | We can now add float16_muladd and use the common decompose and canonicalize functions to have a single implementation for float16/32/64 muladd functions. Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
* fpu/softfloat: improve comments on ARM NaN propagationAlex Bennée2018-02-211-2/+3
| | | | | | | Mention the pseudo-code fragment from which this is based. Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
* softfloat: define 680x0 specific valuesLaurent Vivier2017-06-151-3/+31
| | | | | | Signed-off-by: Laurent Vivier <laurent@vivier.eu> Reviewed-by: Richard Henderson <rth@twiddle.net> Message-Id: <20170611231633.32582-2-laurent@vivier.eu>
* softfloat: Fix the default qNAN for target-ppcBharata B Rao2017-01-311-1/+1
| | | | | | | | | | Currently float128_default_nan() returns 0xFFFF800000000000 in the higher double word, but it should return 0x7FFF800000000000 which is the correct higher double word for default qNAN on PowerPC. Signed-off-by: Bharata B Rao <bharata@linux.vnet.ibm.com> Signed-off-by: Nikunj A Dadhania <nikunj@linux.vnet.ibm.com> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
* target-hppa: Add softfloat specializationsRichard Henderson2017-01-231-1/+19
| | | | | | | | | | | Like the original MIPS, HPPA has the MSB of an SNaN set. However, it has different rules for silencing an SNaN: (1) msb is cleared and (2) msb-1 must be set if the fraction is now zero, and (implementation defined) may be set always. I haven't checked real hardware but chose the set always alternative because it's easy and within spec. Signed-off-by: Richard Henderson <rth@twiddle.net>
* softfloat: Fix warn about implicit conversion from int to int8_tPranith Kumar2016-08-151-1/+1
| | | | | | | | | Change the flag type to 'uint8_t' to fix the implicit conversion error. Signed-off-by: Pranith Kumar <bobby.prani@gmail.com> Reviewed-by: Aurelien Jarno <aurelien@aurel32.net> Message-id: 20160810185502.32015-1-bobby.prani@gmail.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
* softfloat: Handle snan_bit_is_one == 0 in MIPS pickNaNMulAdd()Aleksandar Markovic2016-06-241-12/+29
| | | | | | | | | | | | | | | | | | | Only for Mips platform, and only for cases when snan_bit_is_one is 0, correct the order of argument comparisons in pickNaNMulAdd(). For more info, see [1], page 53, section "3.5.3 NaN Propagation". [1] "MIPS Architecture for Programmers Volume IV-j: The MIPS32 SIMD Architecture Module", Imagination Technologies LTD, Revision 1.12, February 3, 2016 Signed-off-by: Aleksandar Markovic <aleksandar.markovic@imgtec.com> Reviewed-by: Leon Alrae <leon.alrae@imgtec.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> [leon.alrae@imgtec.com: * reworded the subject of the patch * swapped if/else code blocks to match the commit description] Signed-off-by: Leon Alrae <leon.alrae@imgtec.com>
* softfloat: For Mips only, correct default NaN valuesAleksandar Markovic2016-06-241-0/+12
| | | | | | | | | | | | | | | | | | | | | | Only for Mips platform, and only for cases when snan_bit_is_one is 0, correct default NaN values (in their 16-, 32-, and 64-bit flavors). For more info, see [1], page 84, Table 6.3 "Value Supplied When a New Quiet NaN Is Created", and [2], page 52, Table 3.7 "Default NaN Encodings". [1] "MIPS Architecture For Programmers Volume II-A: The MIPS64 Instruction Set Reference Manual", Imagination Technologies LTD, Revision 6.04, November 13, 2015 [2] "MIPS Architecture for Programmers Volume IV-j: The MIPS32 SIMD Architecture Module", Imagination Technologies LTD, Revision 1.12, February 3, 2016 Signed-off-by: Aleksandar Markovic <aleksandar.markovic@imgtec.com> Reviewed-by: Leon Alrae <leon.alrae@imgtec.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Leon Alrae <leon.alrae@imgtec.com>
* softfloat: Clean code format in fpu/softfloat-specialize.hAleksandar Markovic2016-06-241-29/+28Star
| | | | | | | | | | | | fpu/softfloat-specialize.h is the most critical file in SoftFloat library, since it handles numerous differences between platforms in relation to floating point arithmetics. This patch makes the code in this file more consistent format-wise, and hopefully easier to debug and maintain. Signed-off-by: Aleksandar Markovic <aleksandar.markovic@imgtec.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Leon Alrae <leon.alrae@imgtec.com>
* softfloat: Implement run-time-configurable meaning of signaling NaN bitAleksandar Markovic2016-06-241-285/+264Star
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch modifies SoftFloat library so that it can be configured in run-time in relation to the meaning of signaling NaN bit, while, at the same time, strictly preserving its behavior on all existing platforms. Background: In floating-point calculations, there is a need for denoting undefined or unrepresentable values. This is achieved by defining certain floating-point numerical values to be NaNs (which stands for "not a number"). For additional reasons, virtually all modern floating-point unit implementations use two kinds of NaNs: quiet and signaling. The binary representations of these two kinds of NaNs, as a rule, differ only in one bit (that bit is, traditionally, the first bit of mantissa). Up to 2008, standards for floating-point did not specify all details about binary representation of NaNs. More specifically, the meaning of the bit that is used for distinguishing between signaling and quiet NaNs was not strictly prescribed. (IEEE 754-2008 was the first floating-point standard that defined that meaning clearly, see [1], p. 35) As a result, different platforms took different approaches, and that presented considerable challenge for multi-platform emulators like QEMU. Mips platform represents the most complex case among QEMU-supported platforms regarding signaling NaN bit. Up to the Release 6 of Mips architecture, "1" in signaling NaN bit denoted signaling NaN, which is opposite to IEEE 754-2008 standard. From Release 6 on, Mips architecture adopted IEEE standard prescription, and "0" denotes signaling NaN. On top of that, Mips architecture for SIMD (also known as MSA, or vector instructions) also specifies signaling bit in accordance to IEEE standard. MSA unit can be implemented with both pre-Release 6 and Release 6 main processor units. QEMU uses SoftFloat library to implement various floating-point-related instructions on all platforms. The current QEMU implementation allows for defining meaning of signaling NaN bit during build time, and is implemented via preprocessor macro called SNAN_BIT_IS_ONE. On the other hand, the change in this patch enables SoftFloat library to be configured in run-time. This configuration is meant to occur during CPU initialization, at the moment when it is definitely known what desired behavior for particular CPU (or any additional FPUs) is. The change is implemented so that it is consistent with existing implementation of similar cases. This means that structure float_status is used for passing the information about desired signaling NaN bit on each invocation of SoftFloat functions. The additional field in float_status is called snan_bit_is_one, which supersedes macro SNAN_BIT_IS_ONE. IMPORTANT: This change is not meant to create any change in emulator behavior or functionality on any platform. It just provides the means for SoftFloat library to be used in a more flexible way - in other words, it will just prepare SoftFloat library for usage related to Mips platform and its specifics regarding signaling bit meaning, which is done in some of subsequent patches from this series. Further break down of changes: 1) Added field snan_bit_is_one to the structure float_status, and correspondent setter function set_snan_bit_is_one(). 2) Constants <float16|float32|float64|floatx80|float128>_default_nan (used both internally and externally) converted to functions <float16|float32|float64|floatx80|float128>_default_nan(float_status*). This is necessary since they are dependent on signaling bit meaning. At the same time, for the sake of code cleanup and simplicity, constants <floatx80|float128>_default_nan_<low|high> (used only internally within SoftFloat library) are removed, as not needed. 3) Added a float_status* argument to SoftFloat library functions XXX_is_quiet_nan(XXX a_), XXX_is_signaling_nan(XXX a_), XXX_maybe_silence_nan(XXX a_). This argument must be present in order to enable correct invocation of new version of functions XXX_default_nan(). (XXX is <float16|float32|float64|floatx80|float128> here) 4) Updated code for all platforms to reflect changes in SoftFloat library. This change is twofolds: it includes modifications of SoftFloat library functions invocations, and an addition of invocation of function set_snan_bit_is_one() during CPU initialization, with arguments that are appropriate for each particular platform. It was established that all platforms zero their main CPU data structures, so snan_bit_is_one(0) in appropriate places is not added, as it is not needed. [1] "IEEE Standard for Floating-Point Arithmetic", IEEE Computer Society, August 29, 2008. Signed-off-by: Thomas Schwinge <thomas@codesourcery.com> Signed-off-by: Maciej W. Rozycki <macro@codesourcery.com> Signed-off-by: Aleksandar Markovic <aleksandar.markovic@imgtec.com> Tested-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de> Reviewed-by: Leon Alrae <leon.alrae@imgtec.com> Tested-by: Leon Alrae <leon.alrae@imgtec.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> [leon.alrae@imgtec.com: * cherry-picked 2 chunks from patch #2 to fix compilation warnings] Signed-off-by: Leon Alrae <leon.alrae@imgtec.com>
* target-tricore: Add FPU infrastructureBastian Koppelmann2016-03-231-1/+1
| | | | | | | | | | | This patch adds a file for all the FPU related helpers with all the includes, useful defines, and a function to update the status bits. Additionally it adds a mask for the rounding mode bits of PSW as well as all the opcodes for the FPU instructions. Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de> Message-Id: <1457708597-3025-2-git-send-email-kbastian@mail.uni-paderborn.de>
* fpu: Replace int8 typedef with int8_tPeter Maydell2016-01-221-1/+1
| | | | | | | | | | | | | | | | | Replace the int8 softfloat-specific typedef with int8_t. This change was made with find include hw fpu target-* -name '*.[ch]' | xargs sed -i -e 's/\bint8\b/int8_t/g' together with manual removal of the typedef definition, and manual undoing of various mis-hits. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <rth@twiddle.net> Reviewed-by: Aurelien Jarno <aurelien@aurel32.net> Acked-by: Leon Alrae <leon.alrae@imgtec.com> Acked-by: James Hogan <james.hogan@imgtec.com> Message-id: 1452603315-27030-6-git-send-email-peter.maydell@linaro.org
* target-s390x: define default NaN valuesAurelien Jarno2015-06-051-2/+6
| | | | | Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: Alexander Graf <agraf@suse.de>
* softfloat: expand out STATUS macroPeter Maydell2015-02-061-12/+12
| | | | | | | Expand out and remove the STATUS macro. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <rth@twiddle.net>
* softfloat: expand out STATUS_VARPeter Maydell2015-02-061-16/+34
| | | | | | | Expand out and remove the STATUS_VAR macro. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <rth@twiddle.net>
* softfloat: Expand out the STATUS_PARAM macroPeter Maydell2015-02-061-21/+29
| | | | | | | Expand out STATUS_PARAM wherever it is used and delete the definition. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <rth@twiddle.net>
* softfloat: Clarify license statusPeter Maydell2015-01-291-1/+47
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The code in the softfloat source files is under a mixture of licenses: the original code and many changes from QEMU contributors are under the base SoftFloat-2a license; changes from Stefan Weil and RedHat employees are GPLv2-or-later; changes from Fabrice Bellard are under the BSD license. Clarify this in the comments at the top of each affected source file, including a statement about the assumed licensing for future contributions, so we don't need to remember to ask patch submitters explicitly to pick a license. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Acked-by: Andreas Färber <afaerber@suse.de> Acked-by: Aurelien Jarno <aurelien@aurel32.net> Acked-by: Avi Kivity <avi.kivity@gmail.com> Acked-by: Ben Taylor <bentaylor.solx86@gmail.com> Acked-by: Blue Swirl <blauwirbel@gmail.com> Acked-by: Christophe Lyon <christophe.lyon@st.com> Acked-by: Fabrice Bellard <fabrice@bellard.org> Acked-by: Guan Xuetao <gxt@mprc.pku.edu.cn> Acked-by: Juan Quintela <quintela@redhat.com> Acked-by: Max Filippov <jcmvbkbc@gmail.com> Acked-by: Paul Brook <paul@codesourcery.com> Acked-by: Paolo Bonzini <pbonzini@redhat.com> Acked-by: Peter Maydell <peter.maydell@linaro.org> Acked-by: Richard Henderson <rth@twiddle.net> Acked-by: Richard Sandiford <rdsandiford@googlemail.com> Acked-by: Stefan Weil <sw@weilnetz.de> Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Message-id: 1421073508-23909-5-git-send-email-peter.maydell@linaro.org
* softfloat: Revert and reimplement remaining parts of b645bb4885 and 5a6932d51dPeter Maydell2015-01-291-28/+29
| | | | | | | | | | | | | | | | | | | | | Revert the parts of commits b645bb4885 and 5a6932d51d which are still in the codebase and under a SoftFloat-2b license. Reimplement support for architectures where the most significant bit in the mantissa is 1 for a signaling NaN rather than a quiet NaN, by adding handling for SNAN_BIT_IS_ONE being set to the functions which test values for NaN-ness. This includes restoring the bugfixes lost in the reversion where some of the float*_is_quiet_nan() functions were returning true for both signaling and quiet NaNs. [This is a mechanical squashing together of two separate "revert" and "reimplement" patches.] Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Message-id: 1421073508-23909-4-git-send-email-peter.maydell@linaro.org
* softfloat: Apply patch corresponding to rebasing to softfloat-2aPeter Maydell2015-01-291-16/+14Star
| | | | | | | | | | | | | | | | | This commit applies the changes to master which correspond to replacing commit 158142c2c2df with a set of changes made by: * taking the SoftFloat-2a release * mechanically transforming the block comment style * reapplying Fabrice's original changes from 158142c2c2df This commit was created by: diff -u 158142c2c2df import-sf-2a patch -p1 --fuzz 10 <../relicense-patch.txt (where import-sf-2a is the branch resulting from the changes above). Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Message-id: 1421073508-23909-2-git-send-email-peter.maydell@linaro.org
* softfloat: implement fused multiply-add NaN propagation for MIPSAurelien Jarno2012-10-311-0/+27
| | | | | | | | | Add a pickNaNMulAdd function for MIPS, implementing NaN propagation rules for MIPS fused multiply-add instructions. Cc: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
* target-xtensa: specialize softfloat NaN rulesMax Filippov2012-09-221-2/+3
| | | | | | | | NaN propagation rule: leftmost NaN in the expression gets propagated to the result. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* softfloat: add NO_SIGNALING_NANSMax Filippov2012-09-221-0/+67
| | | | | | | | | Architectures that don't have signaling NaNs can define NO_SIGNALING_NANS, it will make float*_is_quiet_nan return 1 for any NaN and float*_is_signaling_nan always return 0. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* softfloat: fix for C99Avi Kivity2012-03-171-4/+4
| | | | | | | | | | | C99 appears to consider compound literals as non-constants, and complains when they are used in static initializers. Switch to ordinary initializer syntax. Signed-off-by: Avi Kivity <avi@redhat.com> Acked-by: Andreas Färber <afaerber@suse.de> Reported-by: Andreas Färber <andreas.faerber@web.de> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* softfloat: Implement fused multiply-addPeter Maydell2011-10-191-0/+178
| | | | | | | | Implement fused multiply-add as a softfloat primitive. This implements "a+b*c" as a single step without any intermediate rounding; it is specified in IEEE 754-2008 and implemented in a number of CPUs. Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
* softfloat: change default nan definitions to variablesPaolo Bonzini2011-07-291-0/+72
| | | | | | | | | | | Most definitions in softfloat.h are really target-independent, but the file is not because it includes definitions of the default NaN values. Change those to variables to allow including softfloat.h from files that are not compiled per-target. By making them const, the compiler is allowed to optimize them into softfloat functions that use them. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
* softfloat: always enable floatx80 and float128 supportAurelien Jarno2011-06-031-7/+0Star
| | | | | | | | Now that softfloat-native is gone, there is no real point on not always enabling floatx80 and float128 support. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
* softfloat: fix floatx80 handling of NaNAurelien Jarno2011-04-251-7/+16
| | | | | | | | | | | | The floatx80 format uses an explicit bit that should be taken into account when converting to and from commonNaN format. When converting to commonNaN, the explicit bit should be removed if it is a 1, and a default NaN should be used if it is 0. When converting from commonNan, the explicit bit should be added. Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
* unicore32: necessary modifications for other files to support unicore32Guan Xuetao2011-04-121-5/+5
| | | | | Signed-off-by: Guan Xuetao <gxt@mprc.pku.edu.cn> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* softfloat: Drop [s]bits{8, 16, 32, 64} types in favor of [u]int{8, 16, 32, 64}_tAndreas Färber2011-03-211-31/+31
| | | | | | | | | | They are defined with the same semantics as the POSIX types, so prefer those for consistency. Suggested by Peter Maydell. Cc: Peter Maydell <peter.maydell@linaro.org> Cc: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: Andreas Färber <andreas.faerber@web.de> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
* softfloat: Prepend QEMU-style header with derivation noticeAndreas Färber2011-03-211-0/+5
| | | | | | | | | | | | | The SoftFloat license requires "prominent notice that the work is derivative". Having added features like improved 16-bit support for arm already, add such a notice to the sources. softfloat-native.[ch] are not under the SoftFloat license and thus are not changed. Cc: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Andreas Färber <andreas.faerber@web.de> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
* softfloat: move all default NaN definitions to softfloat.h.Christophe Lyon2011-02-241-68/+0Star
| | | | | | | | | These special values are needed to implement some helper functions, which return/use these values in some cases. Signed-off-by: Christophe Lyon <christophe.lyon@st.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
* softfloat: Correctly handle NaNs in float16_to_float32()Peter Maydell2011-02-101-0/+17
| | | | | | | | Correctly handle NaNs in float16_to_float32(), by defining and using a float16ToCommonNaN() function, as we do with the other formats. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
* softfloat: Fix single-to-half precision float conversionsPeter Maydell2011-02-101-0/+21
| | | | | | | | | | | | | | | | | Fix various bugs in the single-to-half-precision conversion code: * input NaNs not correctly converted in IEEE mode (fixed by defining and using a commonNaNToFloat16()) * wrong values returned when converting NaN/Inf into non-IEEE half precision value * wrong values returned for conversion of values which are on the boundary between denormal and zero for the half precision format * zeroes not correctly identified * excessively large results in non-IEEE mode should generate InvalidOp, not Overflow Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
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