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* | acpi: ged: rename event memory regionGerd Hoffmann2020-06-121-8/+8
| | | | | | | | | | | | | | | | | | | | | | | | Rename memory region and callbacks and ops to carry "evt" in the name because a second region will be added shortly. Signed-off-by: Gerd Hoffmann <kraxel@redhat.com> Message-Id: <20200520132003.9492-10-kraxel@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: Igor Mammedow <imammedo@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
* | acpi: fadt: add hw-reduced sleep register supportGerd Hoffmann2020-06-121-2/+2
| | | | | | | | | | | | | | | | | | | | | | Add fields to struct AcpiFadtData and update build_fadt() to properly generate sleep register entries. Signed-off-by: Gerd Hoffmann <kraxel@redhat.com> Reviewed-by: Igor Mammedov <imammedo@redhat.com> Message-Id: <20200520132003.9492-9-kraxel@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
* | arm/acpi: TPM2 ACPI table supportEric Auger2020-06-091-2/+3
| | | | | | | | | | | | | | | | | | | | | | Add a TPM2 ACPI table if a TPM2.0 sysbus device has been dynamically instantiated. Signed-off-by: Eric Auger <eric.auger@redhat.com> Message-Id: <20200601095737.32671-4-eric.auger@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
* | acpi: Move build_tpm2() in the generic partEric Auger2020-06-091-0/+44
| | | | | | | | | | | | | | | | | | | | | | | | We plan to build the TPM2 table on ARM too. In order to reuse the generation code, let's move build_tpm2() to aml-build.c. No change in the implementation. Signed-off-by: Eric Auger <eric.auger@redhat.com> Message-Id: <20200601095737.32671-3-eric.auger@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
* | hw/acpi/nvdimm: add a helper to augment SRAT generationVishal Verma2020-06-091-0/+23
|/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | NVDIMMs can belong to their own proximity domains, as described by the NFIT. In such cases, the SRAT needs to have Memory Affinity structures in the SRAT for these NVDIMMs, otherwise Linux doesn't populate node data structures properly during NUMA initialization. See the following for an example failure case. https://lore.kernel.org/linux-nvdimm/20200416225438.15208-1-vishal.l.verma@intel.com/ Introduce a new helper, nvdimm_build_srat(), and call it for both the i386 and arm versions of 'build_srat()' to augment the SRAT with memory affinity information for NVDIMMs. The relevant command line options to exercise this are below. Nodes 0-1 contain CPUs and regular memory, and nodes 2-3 are the NVDIMM address space. -object memory-backend-ram,id=mem0,size=2048M -numa node,nodeid=0,memdev=mem0, -numa cpu,node-id=0,socket-id=0 -object memory-backend-ram,id=mem1,size=2048M -numa node,nodeid=1,memdev=mem1, -numa cpu,node-id=1,socket-id=1 -numa node,nodeid=2, -object memory-backend-file,id=nvmem0,share,mem-path=nvdimm-0,size=16384M,align=1G -device nvdimm,memdev=nvmem0,id=nv0,label-size=2M,node=2 -numa node,nodeid=3, -object memory-backend-file,id=nvmem1,share,mem-path=nvdimm-1,size=16384M,align=1G -device nvdimm,memdev=nvmem1,id=nv1,label-size=2M,node=3 Cc: Jingqi Liu <jingqi.liu@intel.com> Cc: Michael S. Tsirkin <mst@redhat.com> Reviewed-by: Jingqi Liu <jingqi.liu@intel.com> Reviewed-by: Igor Mammedov <imammedo@redhat.com> Signed-off-by: Vishal Verma <vishal.l.verma@intel.com> Message-Id: <20200606000911.9896-3-vishal.l.verma@intel.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
* qdev: Unrealize must not failMarkus Armbruster2020-05-151-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Devices may have component devices and buses. Device realization may fail. Realization is recursive: a device's realize() method realizes its components, and device_set_realized() realizes its buses (which should in turn realize the devices on that bus, except bus_set_realized() doesn't implement that, yet). When realization of a component or bus fails, we need to roll back: unrealize everything we realized so far. If any of these unrealizes failed, the device would be left in an inconsistent state. Must not happen. device_set_realized() lets it happen: it ignores errors in the roll back code starting at label child_realize_fail. Since realization is recursive, unrealization must be recursive, too. But how could a partly failed unrealize be rolled back? We'd have to re-realize, which can fail. This design is fundamentally broken. device_set_realized() does not roll back at all. Instead, it keeps unrealizing, ignoring further errors. It can screw up even for a device with no buses: if the lone dc->unrealize() fails, it still unregisters vmstate, and calls listeners' unrealize() callback. bus_set_realized() does not roll back either. Instead, it stops unrealizing. Fortunately, no unrealize method can fail, as we'll see below. To fix the design error, drop parameter @errp from all the unrealize methods. Any unrealize method that uses @errp now needs an update. This leads us to unrealize() methods that can fail. Merely passing it to another unrealize method cannot cause failure, though. Here are the ones that do other things with @errp: * virtio_serial_device_unrealize() Fails when qbus_set_hotplug_handler() fails, but still does all the other work. On failure, the device would stay realized with its resources completely gone. Oops. Can't happen, because qbus_set_hotplug_handler() can't actually fail here. Pass &error_abort to qbus_set_hotplug_handler() instead. * hw/ppc/spapr_drc.c's unrealize() Fails when object_property_del() fails, but all the other work is already done. On failure, the device would stay realized with its vmstate registration gone. Oops. Can't happen, because object_property_del() can't actually fail here. Pass &error_abort to object_property_del() instead. * spapr_phb_unrealize() Fails and bails out when remove_drcs() fails, but other work is already done. On failure, the device would stay realized with some of its resources gone. Oops. remove_drcs() fails only when chassis_from_bus()'s object_property_get_uint() fails, and it can't here. Pass &error_abort to remove_drcs() instead. Therefore, no unrealize method can fail before this patch. device_set_realized()'s recursive unrealization via bus uses object_property_set_bool(). Can't drop @errp there, so pass &error_abort. We similarly unrealize with object_property_set_bool() elsewhere, always ignoring errors. Pass &error_abort instead. Several unrealize methods no longer handle errors from other unrealize methods: virtio_9p_device_unrealize(), virtio_input_device_unrealize(), scsi_qdev_unrealize(), ... Much of the deleted error handling looks wrong anyway. One unrealize methods no longer ignore such errors: usb_ehci_pci_exit(). Several realize methods no longer ignore errors when rolling back: v9fs_device_realize_common(), pci_qdev_unrealize(), spapr_phb_realize(), usb_qdev_realize(), vfio_ccw_realize(), virtio_device_realize(). Signed-off-by: Markus Armbruster <armbru@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Message-Id: <20200505152926.18877-17-armbru@redhat.com>
* Drop more @errp parameters after previous commitMarkus Armbruster2020-05-151-1/+1
| | | | | | | | | | | | Several functions can't fail anymore: ich9_pm_add_properties(), device_add_bootindex_property(), ppc_compat_add_property(), spapr_caps_add_properties(), PropertyInfo.create(). Drop their @errp parameter. Signed-off-by: Markus Armbruster <armbru@redhat.com> Reviewed-by: Eric Blake <eblake@redhat.com> Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Message-Id: <20200505152926.18877-16-armbru@redhat.com>
* qom: Drop parameter @errp of object_property_add() & friendsMarkus Armbruster2020-05-153-26/+19Star
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The only way object_property_add() can fail is when a property with the same name already exists. Since our property names are all hardcoded, failure is a programming error, and the appropriate way to handle it is passing &error_abort. Same for its variants, except for object_property_add_child(), which additionally fails when the child already has a parent. Parentage is also under program control, so this is a programming error, too. We have a bit over 500 callers. Almost half of them pass &error_abort, slightly fewer ignore errors, one test case handles errors, and the remaining few callers pass them to their own callers. The previous few commits demonstrated once again that ignoring programming errors is a bad idea. Of the few ones that pass on errors, several violate the Error API. The Error ** argument must be NULL, &error_abort, &error_fatal, or a pointer to a variable containing NULL. Passing an argument of the latter kind twice without clearing it in between is wrong: if the first call sets an error, it no longer points to NULL for the second call. ich9_pm_add_properties(), sparc32_ledma_realize(), sparc32_dma_realize(), xilinx_axidma_realize(), xilinx_enet_realize() are wrong that way. When the one appropriate choice of argument is &error_abort, letting users pick the argument is a bad idea. Drop parameter @errp and assert the preconditions instead. There's one exception to "duplicate property name is a programming error": the way object_property_add() implements the magic (and undocumented) "automatic arrayification". Don't drop @errp there. Instead, rename object_property_add() to object_property_try_add(), and add the obvious wrapper object_property_add(). Signed-off-by: Markus Armbruster <armbru@redhat.com> Reviewed-by: Eric Blake <eblake@redhat.com> Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Message-Id: <20200505152926.18877-15-armbru@redhat.com> [Two semantic rebase conflicts resolved]
* ACPI: Record Generic Error Status Block(GESB) tableDongjiu Geng2020-05-141-0/+219
| | | | | | | | | | | | | | | | | | | | | kvm_arch_on_sigbus_vcpu() error injection uses source_id as index in etc/hardware_errors to find out Error Status Data Block entry corresponding to error source. So supported source_id values should be assigned here and not be changed afterwards to make sure that guest will write error into expected Error Status Data Block. Before QEMU writes a new error to ACPI table, it will check whether previous error has been acknowledged. If not acknowledged, the new errors will be ignored and not be recorded. For the errors section type, QEMU simulate it to memory section error. Signed-off-by: Dongjiu Geng <gengdongjiu@huawei.com> Signed-off-by: Xiang Zheng <zhengxiang9@huawei.com> Reviewed-by: Igor Mammedov <imammedo@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Message-id: 20200512030609.19593-9-gengdongjiu@huawei.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
* ACPI: Record the Generic Error Status Block addressDongjiu Geng2020-05-142-0/+33
| | | | | | | | | | | | | | | | | | Record the GHEB address via fw_cfg file, when recording a error to CPER, it will use this address to find out Generic Error Data Entries and write the error. In order to avoid migration failure, make hardware error table address to a part of GED device instead of global variable, then this address will be migrated to target QEMU. Acked-by: Xiang Zheng <zhengxiang9@huawei.com> Signed-off-by: Dongjiu Geng <gengdongjiu@huawei.com> Reviewed-by: Igor Mammedov <imammedo@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Message-id: 20200512030609.19593-7-gengdongjiu@huawei.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
* ACPI: Build Hardware Error Source TableDongjiu Geng2020-05-141-0/+126
| | | | | | | | | | | | | | | | | | | | | | | | This patch builds Hardware Error Source Table(HEST) via fw_cfg blobs. Now it only supports ARMv8 SEA, a type of Generic Hardware Error Source version 2(GHESv2) error source. Afterwards, we can extend the supported types if needed. For the CPER section, currently it is memory section because kernel mainly wants userspace to handle the memory errors. This patch follows the spec ACPI 6.2 to build the Hardware Error Source table. For more detailed information, please refer to document: docs/specs/acpi_hest_ghes.rst build_ghes_hw_error_notification() helper will help to add Hardware Error Notification to ACPI tables without using packed C structures and avoid endianness issues as API doesn't need explicit conversion. Signed-off-by: Xiang Zheng <zhengxiang9@huawei.com> Signed-off-by: Dongjiu Geng <gengdongjiu@huawei.com> Reviewed-by: Igor Mammedov <imammedo@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Message-id: 20200512030609.19593-6-gengdongjiu@huawei.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
* ACPI: Build related register address fields via hardware error fw_cfg blobDongjiu Geng2020-05-144-0/+96
| | | | | | | | | | | | | | | | | | | | This patch builds error_block_address and read_ack_register fields in hardware errors table , the error_block_address points to Generic Error Status Block(GESB) via bios_linker. The max size for one GESB is 1kb, For more detailed information, please refer to document: docs/specs/acpi_hest_ghes.rst Now we only support one Error source, if necessary, we can extend to support more. Suggested-by: Laszlo Ersek <lersek@redhat.com> Signed-off-by: Xiang Zheng <zhengxiang9@huawei.com> Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Reviewed-by: Igor Mammedov <imammedo@redhat.com> Signed-off-by: Dongjiu Geng <gengdongjiu@huawei.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Message-id: 20200512030609.19593-5-gengdongjiu@huawei.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
* acpi: nvdimm: change NVDIMM_UUID_LE to a common macroDongjiu Geng2020-05-141-7/+3Star
| | | | | | | | | | | | The little end UUID is used in many places, so make NVDIMM_UUID_LE to a common macro to convert the UUID to a little end array. Reviewed-by: Xiang Zheng <zhengxiang9@huawei.com> Signed-off-by: Dongjiu Geng <gengdongjiu@huawei.com> Message-id: 20200512030609.19593-2-gengdongjiu@huawei.com Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
* hw/arm/virt: Add nvdimm hotplug supportShameer Kolothum2020-05-041-1/+14
| | | | | | | | | | | | | | | | | This adds support for nvdimm hotplug events through GED and enables nvdimm for the arm/virt. Now Guests with ACPI can have both cold and hot plug of nvdimms. Hot removal functionality is not yet supported. Signed-off-by: Shameer Kolothum <shameerali.kolothum.thodi@huawei.com> Reviewed-by: Igor Mammedov <imammedo@redhat.com> Reviewed-by: Eric Auger <eric.auger@redhat.com> Message-Id: <20200421125934.14952-5-shameerali.kolothum.thodi@huawei.com> Acked-by: Peter Maydell <peter.maydell@linaro.org> Tested-by: Eric Auger <eric.auger@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
* nvdimm: Use configurable ACPI IO base and sizeKwangwoo Lee2020-05-041-10/+22
| | | | | | | | | | | | | | | | | This patch makes IO base and size configurable to create NPIO AML for ACPI NFIT. Since a different architecture like AArch64 does not use port-mapped IO, a configurable IO base is required to create correct mapping of ACPI IO address and size. Signed-off-by: Kwangwoo Lee <kwangwoo.lee@sk.com> Signed-off-by: Eric Auger <eric.auger@redhat.com> Signed-off-by: Shameer Kolothum <shameerali.kolothum.thodi@huawei.com> Reviewed-by: Igor Mammedov <imammedo@redhat.com> Message-Id: <20200421125934.14952-3-shameerali.kolothum.thodi@huawei.com> Acked-by: Peter Maydell <peter.maydell@linaro.org> Tested-by: Eric Auger <eric.auger@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
* hw/acpi/nvdimm: Fix for NVDIMM incorrect DSM output buffer lengthShameer Kolothum2020-05-041-3/+37
| | | | | | | | | | | | | | | | | | | | | | | | | | | | As per ACPI spec 6.3, Table 19-419 Object Conversion Rules, if the Buffer Field <= to the size of an Integer (in bits), it will be treated as an integer. Moreover, the integer size depends on DSDT tables revision number. If revision number is < 2, integer size is 32 bits, otherwise it is 64 bits. Current NVDIMM common DSM aml code (NCAL) uses CreateField() for creating DSM output buffer. This creates an issue in arm/virt platform where DSDT revision number is 2 and results in DSM buffer with a wrong size(8 bytes) gets returned when actual length is < 8 bytes. This causes guest kernel to report, "nfit ACPI0012:00: found a zero length table '0' parsing nfit" In order to fix this, aml code is now modified such that it builds the DSM output buffer in a byte by byte fashion when length is smaller than Integer size. Suggested-by: Igor Mammedov <imammedo@redhat.com> Signed-off-by: Shameer Kolothum <shameerali.kolothum.thodi@huawei.com> Reviewed-by: Igor Mammedov <imammedo@redhat.com> Message-Id: <20200421125934.14952-2-shameerali.kolothum.thodi@huawei.com> Acked-by: Peter Maydell <peter.maydell@linaro.org> Tested-by: Eric Auger <eric.auger@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
* acpi: add aml builder stubsGerd Hoffmann2020-05-042-2/+81
| | | | | | | | | | Needed when moving aml builder code to devices. Signed-off-by: Gerd Hoffmann <kraxel@redhat.com> Reviewed-by: Igor Mammedov <imammedo@redhat.com> Message-Id: <20200429140003.7336-3-kraxel@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
* Typo: Correct the name of CPU hotplug memory regionKeqian Zhu2020-04-301-1/+1
| | | | | | | | | Replace "acpi-mem-hotplug" with "acpi-cpu-hotplug" Signed-off-by: Keqian Zhu <zhukeqian1@huawei.com> Message-id: 20200413091552.62748-4-zhukeqian1@huawei.com Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
* acpi: pcihp: fix left shift undefined behavior in acpi_pcihp_eject_slot()Igor Mammedov2020-03-291-1/+1
| | | | | | | | | | | | | | | | | | Coverity spots subj in following guest triggered code path pci_write(, data = 0) -> acpi_pcihp_eject_slot(,slots = 0) uinst32_t slot = ctz32(slots) ... ... = ~(1U << slot) where 'slot' value is 32 in case 'slots' bitmap is empty. 'slots' is a bitmap and empty one shouldn't do anything so return early doing nothing if resulted slot value is not valid (i.e. not in 0-31 range) Reported-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Igor Mammedov <imammedo@redhat.com> Message-Id: <20200326135624.32464-1-imammedo@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
* qom/object: Use common get/set uint helpersFelipe Franciosi2020-03-161-87/+8Star
| | | | | | | | | | | | | | | | | Several objects implemented their own uint property getters and setters, despite them being straightforward (without any checks/validations on the values themselves) and identical across objects. This makes use of an enhanced API for object_property_add_uintXX_ptr() which offers default setters. Some of these setters used to update the value even if the type visit failed (eg. because the value being set overflowed over the given type). The new setter introduces a check for these errors, not updating the value if an error occurred. The error is propagated. Signed-off-by: Felipe Franciosi <felipe@nutanix.com> Reviewed-by: Marc-André Lureau <marcandre.lureau@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
* qom/object: enable setter for uint typesFelipe Franciosi2020-03-163-11/+12
| | | | | | | | | | | | | | | | | | Traditionally, the uint-specific property helpers only offer getters. When adding object (or class) uint types, one must therefore use the generic property helper if a setter is needed (and probably duplicate some code writing their own getters/setters). This enhances the uint-specific property helper APIs by adding a bitwise-or'd 'flags' field and modifying all clients of that API to set this paramater to OBJ_PROP_FLAG_READ. This maintains the current behaviour whilst allowing others to also set OBJ_PROP_FLAG_WRITE (or use the more convenient OBJ_PROP_FLAG_READWRITE) in the future (which will automatically install a setter). Other flags may be added later. Signed-off-by: Felipe Franciosi <felipe@nutanix.com> Reviewed-by: Marc-André Lureau <marcandre.lureau@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
* misc: Replace zero-length arrays with flexible array member (automatic)Philippe Mathieu-Daudé2020-03-161-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Description copied from Linux kernel commit from Gustavo A. R. Silva (see [3]): --v-- description start --v-- The current codebase makes use of the zero-length array language extension to the C90 standard, but the preferred mechanism to declare variable-length types such as these ones is a flexible array member [1], introduced in C99: struct foo { int stuff; struct boo array[]; }; By making use of the mechanism above, we will get a compiler warning in case the flexible array does not occur last in the structure, which will help us prevent some kind of undefined behavior bugs from being unadvertenly introduced [2] to the Linux codebase from now on. --^-- description end --^-- Do the similar housekeeping in the QEMU codebase (which uses C99 since commit 7be41675f7cb). All these instances of code were found with the help of the following Coccinelle script: @@ identifier s, m, a; type t, T; @@ struct s { ... t m; - T a[0]; + T a[]; }; @@ identifier s, m, a; type t, T; @@ struct s { ... t m; - T a[0]; + T a[]; } QEMU_PACKED; [1] https://gcc.gnu.org/onlinedocs/gcc/Zero-Length.html [2] https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=76497732932f [3] https://git.kernel.org/pub/scm/linux/kernel/git/gustavoars/linux.git/commit/?id=17642a2fbd2c1 Inspired-by: Gustavo A. R. Silva <gustavo@embeddedor.com> Reviewed-by: David Hildenbrand <david@redhat.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
* hw/acpi: Include "hw/mem/nvdimm.h"Philippe Mathieu-Daudé2020-03-092-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | Both ich9.c and piix4.c use methods/definitions declared in the NVDIMM device header. Include it. This fixes (when modifying unrelated headers): hw/acpi/ich9.c:507:46: error: use of undeclared identifier 'TYPE_NVDIMM' if (object_dynamic_cast(OBJECT(dev), TYPE_NVDIMM)) { ^ hw/acpi/ich9.c:508:13: error: implicit declaration of function 'nvdimm_acpi_plug_cb' is invalid in C99 [-Werror,-Wimplicit-function-declaration] nvdimm_acpi_plug_cb(hotplug_dev, dev); ^ hw/acpi/piix4.c:403:46: error: use of undeclared identifier 'TYPE_NVDIMM' if (object_dynamic_cast(OBJECT(dev), TYPE_NVDIMM)) { ^ hw/acpi/piix4.c:404:13: error: implicit declaration of function 'nvdimm_acpi_plug_cb' is invalid in C99 [-Werror,-Wimplicit-function-declaration] nvdimm_acpi_plug_cb(hotplug_dev, dev); ^ Acked-by: John Snow <jsnow@redhat.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20200228114649.12818-16-philmd@redhat.com> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
* hw/acpi/cpu_hotplug: Include "hw/pci/pci.h"Philippe Mathieu-Daudé2020-03-091-0/+1
| | | | | | | | | | | | | | | | | hw/acpi/cpu_hotplug.c calls pci_address_space_io(). Include "hw/pci/pci.h" which declares it. This fixes (when modifying unrelated headers): hw/acpi/cpu_hotplug.c:103:28: error: implicit declaration of function 'pci_address_space_io' is invalid in C99 [-Werror,-Wimplicit-function-declaration] MemoryRegion *parent = pci_address_space_io(PCI_DEVICE(gpe_cpu->device)); ^ Acked-by: John Snow <jsnow@redhat.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20200228114649.12818-11-philmd@redhat.com> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
* hw/southbridge/ich9: Removed unused headersPhilippe Mathieu-Daudé2020-03-091-1/+0Star
| | | | | | | | | | | | | The ICH9 chipset is not X86/PC specific. These files don't use anything declared by the "hw/i386/pc.h" or "hw/i386/ioapic.h" headers. Remove them. Reviewed-by: John Snow <jsnow@redhat.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20200228114649.12818-3-philmd@redhat.com> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
* mem: move nvdimm_device_list to utilitiesShivaprasad G Bhat2020-02-201-27/+1Star
| | | | | | | | | | | nvdimm_device_list is required for parsing the list for devices in subsequent patches. Move it to common utility area. Signed-off-by: Shivaprasad G Bhat <sbhat@linux.ibm.com> Reviewed-by: Igor Mammedov <imammedo@redhat.com> Reviewed-by: David Gibson <david@gibson.dropbear.id.au> Message-Id: <158131055857.2897.15658377276504711773.stgit@lep8c.aus.stglabs.ibm.com> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
* Merge remote-tracking branch 'remotes/bonzini/tags/for-upstream' into stagingPeter Maydell2020-01-273-3/+3
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * Register qdev properties as class properties (Marc-André) * Cleanups (Philippe) * virtio-scsi fix (Pan Nengyuan) * Tweak Skylake-v3 model id (Kashyap) * x86 UCODE_REV support and nested live migration fix (myself) * Advisory mode for pvpanic (Zhenwei) # gpg: Signature made Fri 24 Jan 2020 20:16:23 GMT # gpg: using RSA key BFFBD25F78C7AE83 # gpg: Good signature from "Paolo Bonzini <bonzini@gnu.org>" [full] # gpg: aka "Paolo Bonzini <pbonzini@redhat.com>" [full] # Primary key fingerprint: 46F5 9FBD 57D6 12E7 BFD4 E2F7 7E15 100C CD36 69B1 # Subkey fingerprint: F133 3857 4B66 2389 866C 7682 BFFB D25F 78C7 AE83 * remotes/bonzini/tags/for-upstream: (58 commits) build-sys: clean up flags included in the linker command line target/i386: Add the 'model-id' for Skylake -v3 CPU models qdev: use object_property_help() qapi/qmp: add ObjectPropertyInfo.default-value qom: introduce object_property_help() qom: simplify qmp_device_list_properties() vl: print default value in object help qdev: register properties as class properties qdev: move instance properties to class properties qdev: rename DeviceClass.props qdev: set properties with device_class_set_props() object: return self in object_ref() object: release all props object: add object_class_property_add_link() object: express const link with link property object: add direct link flag object: rename link "child" to "target" object: check strong flag with & object: do not free class properties object: add object_property_set_default ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
| * qdev: set properties with device_class_set_props()Marc-André Lureau2020-01-243-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The following patch will need to handle properties registration during class_init time. Let's use a device_class_set_props() setter. spatch --macro-file scripts/cocci-macro-file.h --sp-file ./scripts/coccinelle/qdev-set-props.cocci --keep-comments --in-place --dir . @@ typedef DeviceClass; DeviceClass *d; expression val; @@ - d->props = val + device_class_set_props(d, val) Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Message-Id: <20200110153039.1379601-20-marcandre.lureau@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
* | hw/acpi: Remove extra indent in ACPI GED hotplug cbKeqian Zhu2020-01-231-1/+1
| | | | | | | | | | | | | | | | | | | | There is extra indent in ACPI GED hotplug cb that should be deleted. Reviewed-by: Igor Mammedov <imammedo@redhat.com> Signed-off-by: Keqian Zhu <zhukeqian1@huawei.com> Message-id: 20200120012755.44581-2-zhukeqian1@huawei.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
* | acpi: cpuhp: add CPHP_GET_CPU_ID_CMD commandIgor Mammedov2020-01-221-0/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Firmware can enumerate present at boot APs by broadcasting wakeup IPI, so that woken up secondary CPUs could register them-selves. However in CPU hotplug case, it would need to know architecture specific CPU IDs for possible and hotplugged CPUs so it could prepare environment for and wake hotplugged AP. Reuse and extend existing CPU hotplug interface to return architecture specific ID for currently selected CPU in 2 registers: - lower 32 bits in ACPI_CPU_CMD_DATA_OFFSET_RW - upper 32 bits in ACPI_CPU_CMD_DATA2_OFFSET_R On x86, firmware will use CPHP_GET_CPU_ID_CMD for fetching the APIC ID when handling hotplug SMI. Later, CPHP_GET_CPU_ID_CMD will be used on ARM to retrieve MPIDR, which serves the similar to APIC ID purpose. Signed-off-by: Igor Mammedov <imammedo@redhat.com> Message-Id: <1575896942-331151-10-git-send-email-imammedo@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com> Reviewed-by: Laszlo Ersek <lersek@redhat.com>
* | acpi: cpuhp: introduce 'Command data 2' fieldIgor Mammedov2020-01-222-0/+12
|/ | | | | | | | | | | | | | | | | | | | | | | | No functional change in practice, patch only aims to properly document (in spec and code) intended usage of the reserved space. The new field is to be used for 2 purposes: - detection of modern CPU hotplug interface using CPHP_GET_NEXT_CPU_WITH_EVENT_CMD command. procedure will be described in follow up patch: "acpi: cpuhp: spec: add typical usecases" - for returning upper 32 bits of architecture specific CPU ID, for new CPHP_GET_CPU_ID_CMD command added by follow up patch: "acpi: cpuhp: add CPHP_GET_CPU_ID_CMD command" Change is backward compatible with 4.2 and older machines, as field was unconditionally reserved and always returned 0x0 if modern CPU hotplug interface was enabled. Signed-off-by: Igor Mammedov <imammedo@redhat.com> Message-Id: <1575896942-331151-8-git-send-email-imammedo@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com> Reviewed-by: Laszlo Ersek <lersek@redhat.com>
* hmat acpi: Build Memory Side Cache Information Structure(s)Liu Jingqi2020-01-051-1/+68
| | | | | | | | | | | | | | | | | | | This structure describes memory side cache information for memory proximity domains if the memory side cache is present and the physical device forms the memory side cache. The software could use this information to effectively place the data in memory to maximize the performance of the system memory that use the memory side cache. Acked-by: Markus Armbruster <armbru@redhat.com> Reviewed-by: Igor Mammedov <imammedo@redhat.com> Reviewed-by: Daniel Black <daniel@linux.ibm.com> Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Signed-off-by: Liu Jingqi <jingqi.liu@intel.com> Signed-off-by: Tao Xu <tao3.xu@intel.com> Message-Id: <20191213011929.2520-7-tao3.xu@intel.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
* hmat acpi: Build System Locality Latency and Bandwidth Information Structure(s)Liu Jingqi2020-01-051-1/+103
| | | | | | | | | | | | | | | | This structure describes the memory access latency and bandwidth information from various memory access initiator proximity domains. The latency and bandwidth numbers represented in this structure correspond to rated latency and bandwidth for the platform. The software could use this information as hint for optimization. Acked-by: Markus Armbruster <armbru@redhat.com> Reviewed-by: Igor Mammedov <imammedo@redhat.com> Signed-off-by: Liu Jingqi <jingqi.liu@intel.com> Signed-off-by: Tao Xu <tao3.xu@intel.com> Message-Id: <20191213011929.2520-6-tao3.xu@intel.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
* hmat acpi: Build Memory Proximity Domain Attributes Structure(s)Liu Jingqi2020-01-054-2/+147
| | | | | | | | | | | | | | | | | | | | | | | | | | | | HMAT is defined in ACPI 6.3: 5.2.27 Heterogeneous Memory Attribute Table (HMAT). The specification references below link: http://www.uefi.org/sites/default/files/resources/ACPI_6_3_final_Jan30.pdf It describes the memory attributes, such as memory side cache attributes and bandwidth and latency details, related to the Memory Proximity Domain. The software is expected to use this information as hint for optimization. This structure describes Memory Proximity Domain Attributes by memory subsystem and its associativity with processor proximity domain as well as hint for memory usage. In the linux kernel, the codes in drivers/acpi/hmat/hmat.c parse and report the platform's HMAT tables. Acked-by: Markus Armbruster <armbru@redhat.com> Reviewed-by: Igor Mammedov <imammedo@redhat.com> Reviewed-by: Daniel Black <daniel@linux.ibm.com> Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Signed-off-by: Liu Jingqi <jingqi.liu@intel.com> Signed-off-by: Tao Xu <tao3.xu@intel.com> Message-Id: <20191213011929.2520-5-tao3.xu@intel.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
* Merge remote-tracking branch 'remotes/bonzini/tags/for-upstream' into stagingPeter Maydell2019-12-202-1/+9
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * More uses of RCU_READ_LOCK_GUARD (Dave, myself) * QOM doc improvments (Greg) * Cleanups from the Meson conversion (Marc-André) * Support for multiple -accel options (myself) * Many x86 machine cleanup (Philippe, myself) * tests/migration-test cleanup (Juan) * PC machine removal and next round of deprecation (Thomas) * kernel-doc integration (Peter, myself) # gpg: Signature made Wed 18 Dec 2019 01:35:02 GMT # gpg: using RSA key BFFBD25F78C7AE83 # gpg: Good signature from "Paolo Bonzini <bonzini@gnu.org>" [full] # gpg: aka "Paolo Bonzini <pbonzini@redhat.com>" [full] # Primary key fingerprint: 46F5 9FBD 57D6 12E7 BFD4 E2F7 7E15 100C CD36 69B1 # Subkey fingerprint: F133 3857 4B66 2389 866C 7682 BFFB D25F 78C7 AE83 * remotes/bonzini/tags/for-upstream: (87 commits) vga: cleanup mapping of VRAM for non-PCI VGA hw/display: Remove "rombar" hack from vga-pci and vmware_vga hw/pci: Remove the "command_serr_enable" property hw/audio: Remove the "use_broken_id" hack from the AC97 device hw/i386: Remove the deprecated machines 0.12 up to 0.15 hw/pci-host: Add Kconfig entry to select the IGD Passthrough Host Bridge hw/pci-host/i440fx: Extract the IGD passthrough host bridge device hw/pci-host/i440fx: Use definitions instead of magic values hw/pci-host/i440fx: Use size_t to iterate over ARRAY_SIZE() hw/pci-host/i440fx: Extract PCII440FXState to "hw/pci-host/i440fx.h" hw/pci-host/i440fx: Correct the header description Fix some comment spelling errors. target/i386: remove unused pci-assign codes WHPX: refactor load library migration: check length directly to make sure the range is aligned memory: include MemoryListener documentation and some missing function parameters docs: add memory API reference memory.h: Silence kernel-doc complaints docs: Create bitops.rst as example of kernel-docs bitops.h: Silence kernel-doc complaints ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
| * acpi: move PC stubs out of stubs/Paolo Bonzini2019-12-172-1/+9
| | | | | | | | | | | | | | This is a small cleanup that lets microvm build entirely without include/hw/i386/pc.h. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
* | hw/acpi: Fix legacy CPU plug error API violationsMarkus Armbruster2019-12-181-7/+3Star
|/ | | | | | | | | | | | | | | | | | | legacy_acpi_cpu_plug_cb() dereferences @errp when acpi_set_cpu_present_bit() fails. That's wrong; see the big comment in error.h. Introduced in commit cc43364de7 "acpi/cpu-hotplug: introduce helper function to keep bit setting in one place". No caller actually passes null, and acpi_set_cpu_present_bit() can't actually fail. Fix anyway: drop acpi_set_cpu_present_bit()'s @errp parameter. Cc: "Michael S. Tsirkin" <mst@redhat.com> Cc: Igor Mammedov <imammedo@redhat.com> Signed-off-by: Markus Armbruster <armbru@redhat.com> Reviewed-by: Igor Mammedov <imammedo@redhat.com> Message-Id: <20191204093625.14836-7-armbru@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
* hw/pci-host/piix: Move i440FX declarations to hw/pci-host/i440fx.hPhilippe Mathieu-Daudé2019-11-051-1/+1
| | | | | | | | | The hw/pci-host/piix.c contains a mix of PIIX3 and i440FX chipsets functions. To be able to split it, we need to export some declarations first. Reviewed-by: Aleksandar Markovic <amarkovic@wavecomp.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
* hw/i386: Remove obsolete LoadStateHandler::load_state_old handlersPhilippe Mathieu-Daudé2019-11-051-40/+0Star
| | | | | | | | | | | | | | | These devices implemented their load_state_old() handler 10 years ago, previous to QEMU v0.12. Since commit cc425b5ddf removed the pc-0.10 and pc-0.11 machines, we can drop this code. Note: the mips_r4k machine started to use the i8254 device just after QEMU v0.5.0, but the MIPS machine types are not versioned, so there is no migration compatibility issue removing this handler. Suggested-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Aleksandar Markovic <amarkovic@wavecomp.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
* piix4: Add a MC146818 RTC Controller as specified in datasheetPhilippe Mathieu-Daudé2019-11-051-1/+1
| | | | | | | | | | | | Remove mc146818rtc instanciated in malta board, to not have it twice. Acked-by: Michael S. Tsirkin <mst@redhat.com> Acked-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Hervé Poussineau <hpoussin@reactos.org> Message-Id: <20171216090228.28505-13-hpoussin@reactos.org> [PMD: rebased, set RTC base_year to 2000] Reviewed-by: Aleksandar Markovic <amarkovic@wavecomp.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
* hw/i386: split PCMachineState deriving X86MachineState from itPaolo Bonzini2019-10-221-5/+5
| | | | | | | | | | | Split up PCMachineState and PCMachineClass and derive X86MachineState and X86MachineClass from them. This allows sharing code with non-PC x86 machine types. Signed-off-by: Sergio Lopez <slp@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
* Merge remote-tracking branch ↵Peter Maydell2019-10-171-4/+3Star
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | 'remotes/ehabkost/tags/machine-next-pull-request' into staging x86 and machine queue, 2019-10-15 Features: * Snowridge-v2 (no MPX) CPU model (Xiaoyao Li) Bug fixes: * cpu-plug-test: fix device_add for pc/q35 machines (Igor Mammedov) * Fix legacy guest with xsave panic on older Linux kernel (Bingsong Si) * Omit all-zeroes entries from KVM CPUID table (Eduardo Habkost) Cleanups: * Convert reset handlers to DeviceReset (Philippe Mathieu-Daudé) * MachineClass::auto_enable_numa field (Tao Xu) * target/i386/cpu.h cleanups (Tao Xu) * memory_device_get_free_addr() cleanups (Wei Yang) # gpg: Signature made Tue 15 Oct 2019 22:35:43 BST # gpg: using RSA key 5A322FD5ABC4D3DBACCFD1AA2807936F984DC5A6 # gpg: issuer "ehabkost@redhat.com" # gpg: Good signature from "Eduardo Habkost <ehabkost@redhat.com>" [full] # Primary key fingerprint: 5A32 2FD5 ABC4 D3DB ACCF D1AA 2807 936F 984D C5A6 * remotes/ehabkost/tags/machine-next-pull-request: target/i386: Add Snowridge-v2 (no MPX) CPU model i386: Omit all-zeroes entries from KVM CPUID table i386: Fix legacy guest with xsave panic on host kvm without update cpuid. target/i386: drop the duplicated definition of cpuid AVX512_VBMI macro target/i386: clean up comments over 80 chars per line memory-device: break the loop if tmp exceed the hinted range memory-device: not necessary to use goto for the last check hw/misc/vmcoreinfo: Add comment about reset handler hw/input/lm832x: Convert reset handler to DeviceReset hw/isa/vt82c686: Convert reset handler to DeviceReset hw/ide/via82c: Convert reset handler to DeviceReset hw/ide/sii3112: Convert reset handler to DeviceReset hw/ide/piix: Convert reset handler to DeviceReset hw/isa/piix4: Convert reset handler to DeviceReset hw/acpi/piix4: Convert reset handler to DeviceReset numa: Introduce MachineClass::auto_enable_numa for implicit NUMA node tests: cpu-plug-test: fix device_add for pc/q35 machines tests: add qtest_qmp_device_add_qdict() helper Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
| * hw/acpi/piix4: Convert reset handler to DeviceResetPhilippe Mathieu-Daudé2019-10-151-4/+3Star
| | | | | | | | | | | | | | | | | | | | | | | | | | | | The PIIX4/PM is a PCI device within the PIIX4 chipset, it will be reset when the PCI bus it stands on is reset. Convert its reset handler into a proper Device reset method. Reviewed-by: Igor Mammedov <imammedo@redhat.com> Reviewed-by: Li Qiang <liq3ea@gmail.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com> Message-Id: <20191010131527.32513-2-philmd@redhat.com> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
* | hw/arm: Use GED for system_powerdown eventShameer Kolothum2019-10-051-0/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | For machines 4.2 or higher with ACPI boot use GED for system_powerdown event instead of GPIO. Guest boot with DT still uses GPIO. Signed-off-by: Shameer Kolothum <shameerali.kolothum.thodi@huawei.com> Reviewed-by: Eric Auger <eric.auger@redhat.com> Reviewed-by: Igor Mammedov <imammedo@redhat.com> Message-Id: <20190918130633.4872-9-shameerali.kolothum.thodi@huawei.com> Acked-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
* | hw/acpi: Add ACPI Generic Event Device SupportSamuel Ortiz2019-10-053-0/+308
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The ACPI Generic Event Device (GED) is a hardware-reduced specific device[ACPI v6.1 Section 5.6.9] that handles all platform events, including the hotplug ones. This patch generates the AML code that defines GEDs. Platforms need to specify their own GED Event bitmap to describe what kind of events they want to support through GED. Also this uses a a single interrupt for the GED device, relying on IO memory region to communicate the type of device affected by the interrupt. This way, we can support up to 32 events with a unique interrupt. This supports only memory hotplug for now. Signed-off-by: Samuel Ortiz <sameo@linux.intel.com> Signed-off-by: Sebastien Boeuf <sebastien.boeuf@intel.com> Signed-off-by: Shameer Kolothum <shameerali.kolothum.thodi@huawei.com> Reviewed-by: Eric Auger <eric.auger@redhat.com> Message-Id: <20190918130633.4872-4-shameerali.kolothum.thodi@huawei.com> Acked-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com> Reviewed-by: Igor Mammedov <imammedo@redhat.com>
* | hw/acpi: Do not create memory hotplug method when handler is not definedSamuel Ortiz2019-10-051-4/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | With Hardware-reduced ACPI, the GED device will manage ACPI hotplug entirely. As a consequence, make the memory specific events AML generation optional. The code will only be added when the method name is not NULL. Signed-off-by: Samuel Ortiz <sameo@linux.intel.com> Signed-off-by: Shameer Kolothum <shameerali.kolothum.thodi@huawei.com> Reviewed-by: Eric Auger <eric.auger@redhat.com> Reviewed-by: Igor Mammedov <imammedo@redhat.com> Message-Id: <20190918130633.4872-3-shameerali.kolothum.thodi@huawei.com> Acked-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
* | hw/acpi: Make ACPI IO address space configurableShameer Kolothum2019-10-051-19/+14Star
|/ | | | | | | | | | | | | | | | | | | | This is in preparation for adding support for ARM64 platforms where it doesn't use port mapped IO for ACPI IO space. We are making changes so that MMIO region can be accommodated and board can pass the base address into the aml build function. Also move few MEMORY_* definitions to header so that other memory hotplug event signalling mechanisms (eg. Generic Event Device on HW-reduced acpi platforms) can use the same from their respective event handler code. Signed-off-by: Shameer Kolothum <shameerali.kolothum.thodi@huawei.com> Reviewed-by: Eric Auger <eric.auger@redhat.com> Reviewed-by: Igor Mammedov <imammedo@redhat.com> Message-Id: <20190918130633.4872-2-shameerali.kolothum.thodi@huawei.com> Acked-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
* ipmi: Fix SSIF ACPI handling to use the right CRSCorey Minyard2019-09-202-7/+8
| | | | | | | | Pass in the CRS so that it can be set to the SMBus for IPMI later. Cc: Michael S. Tsirkin <mst@redhat.com> Cc: Igor Mammedov <imammedo@redhat.com> Signed-off-by: Corey Minyard <cminyard@mvista.com>
* acpi: Add i2c serial bus CRS handlingCorey Minyard2019-09-201-0/+40
| | | | | | | | | This will be required for getting IPMI SSIF (SMBus interface) into the ACPI tables. Cc: Michael S. Tsirkin <mst@redhat.com> Cc: Igor Mammedov <imammedo@redhat.com> Signed-off-by: Corey Minyard <cminyard@mvista.com>
* numa: move numa global variable numa_info into MachineStateTao Xu2019-09-031-2/+4
| | | | | | | | | | | Move existing numa global numa_info (renamed as "nodes") into NumaState. Reviewed-by: Igor Mammedov <imammedo@redhat.com> Suggested-by: Igor Mammedov <imammedo@redhat.com> Suggested-by: Eduardo Habkost <ehabkost@redhat.com> Signed-off-by: Tao Xu <tao3.xu@intel.com> Message-Id: <20190809065731.9097-5-tao3.xu@intel.com> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
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