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* Update to a hopefully more future proof FSF addressBlue Swirl2009-07-161-2/+1Star
| | | | Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* Revert "Introduce reset notifier order"Jan Kiszka2009-06-291-1/+1
| | | | | | | | | This reverts commit 8217606e6edb49591b4a6fd5a0d1229cebe470a9 (and updates later added users of qemu_register_reset), we solved the problem it originally addressed less invasively. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
* kvm: Rework VCPU synchronizationJan Kiszka2009-06-291-0/+3
| | | | | | | | | | | | | | | During startup and after reset we have to synchronize user space to the in-kernel KVM state. Namely, we need to transfer the VCPU registers when they change due to VCPU as well as APIC reset. This patch refactors the required hooks so that kvm_init_vcpu registers its own per-VCPU reset handler and adds a cpu_synchronize_state to the APIC reset. That way we no longer depend on the new reset order (and can drop this disliked interface again) and we can even drop a KVM hook in main(). Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
* qemu/apic: minimal MSI/MSI-X implementation for PCMichael S. Tsirkin2009-06-241-4/+39
| | | | | | | | | | | Implement MSI support in APIC. Note that MSI and MMIO APIC registers are at the same memory location, but actually not on the global bus: MSI is on PCI bus, APIC is connected directly to the CPU. We map them on the global bus at the same address which happens to work because MSI registers are reserved in APIC MMIO and vice versa. Signed-off-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
* Handle init/sipi in a main cpu exec loop. (v2)Gleb Natapov2009-06-221-11/+26
| | | | | | | | | | | | | This should fix compilation problem in case of CONFIG_USER_ONLY. Currently INIT/SIPI is handled in the context of CPU that sends IPI. This patch changes this to handle them like all other events in a main cpu exec loop. When KVM will gain thread per vcpu capability it will be much more clear to handle those event by cpu thread itself and not modify one cpu's state from the context of the other. Signed-off-by: Gleb Natapov <gleb@redhat.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
* Remove io_index argument from cpu_register_io_memory()Avi Kivity2009-06-161-1/+1
| | | | | | | | | The parameter is always zero except when registering the three internal io regions (ROM, unassigned, notdirty). Remove the parameter to reduce the API's power, thus facilitating future change. Signed-off-by: Avi Kivity <avi@redhat.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
* Don't use cpu_index as apic_id.Gleb Natapov2009-06-141-13/+33
| | | | | | | | | | | | | | (patch is on top of "Apic creation should not depend on pci" series) Currently cpu_index is used as cpu apic id on x86. This is incorrect since apic ids not have to be continuous (they can also encode cpu hierarchy information). This patch uses cpuid_apic_id for initial apic id value. For now cpuid_apic_id is set to be equal to cpu_index so behaviour is fully backward compatible, but it allows us to add qemu option to provide other values for cpu apic id. Signed-off-by: Gleb Natapov <gleb@redhat.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
* Introduce reset notifier orderJan Kiszka2009-05-221-1/+1
| | | | | | | | | | | | | | | Add the parameter 'order' to qemu_register_reset and sort callbacks on registration. On system reset, callbacks with lower order will be invoked before those with higher order. Update all existing users to the standard order 0. Note: At least for x86, the existing users seem to assume that handlers are called in their registration order. Therefore, the patch preserves this property. If someone feels bored, (s)he could try to identify this dependency and express it properly on callback registration. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
* apic: Fix access to non-existent APICaurel322009-04-091-3/+8
| | | | | | | | | | When running with -M isapc, there is no env->apic_state. Fix cpu_get/set_apic_* helpers to handle this corner case gracefully. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@7048 c046a42c-6fe2-441c-8c8c-71466251a162
* From 67e94ae77f8de4d5d822917f1723cefa7ebfb64d Mon Sep 17 00:00:00 2001aliguori2009-03-121-222/+13Star
| | | | | | | | | | | | | | | | | | | | | From: Xiantao Zhang <xiantao.zhang@intel.com> Date: Tue, 3 Mar 2009 13:33:13 +0800 Subject: [PATCH] Split ioapic logic from the current apic. Add a new ioapic.c to hold ioapic's logic, and also make it work for ia64. Signed-off-by: Xiantao Zhang <xiantao.zhang@intel.com> --- Makefile.target | 2 +- hw/apic.c | 237 +++---------------------------------------------- hw/ioapic.c | 263 +++++++++++++++++++++++++++++++++++++++++++++++++++++++ hw/pc.h | 5 +- 4 files changed, 281 insertions(+), 226 deletions(-) create mode 100644 hw/ioapic.c git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6827 c046a42c-6fe2-441c-8c8c-71466251a162
* hw: remove error handling from qemu_malloc() callers (Avi Kivity)aliguori2009-02-051-4/+0Star
| | | | | | | | Signed-off-by: Avi Kivity <avi@redhat.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6529 c046a42c-6fe2-441c-8c8c-71466251a162
* Add -rtc-td-hack option to fix time drift with RTC on Windows (Gleb Natapov)aliguori2009-01-151-0/+22
| | | | | | | | | | | | | | | | | | | After my last patch to fix interrupt coalescing was rejected on the basis that it is too intrusive we decided to make the fix much more localized and only fix the problem for RTC time source. Unfortunately it is impossible to fix the problem entirely inside RTC code like Andrzej proposed since Windows reads RTC register C more then once on each time interrupt so it is impossible to count reliably how many interrupt windows actually handled. Proposed solution is localized to I386 target and is disabled by default. To enable it "-rtc-td-hack" flag should be used. Signed-off-by: Gleb Natapov <gleb@redhat.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6320 c046a42c-6fe2-441c-8c8c-71466251a162
* Update FSF address in GPL/LGPL boilerplateaurel322009-01-041-1/+1
| | | | | | | | | | The attached patch updates the FSF address in the GPL/LGPL boilerplate in most GPL/LGPLed files, and also in COPYING.LIB. Signed-off-by: Stuart Brady <stuart.brady@gmail.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6162 c046a42c-6fe2-441c-8c8c-71466251a162
* Add HPET emulation to qemu (Beth Kon)aliguori2008-12-181-0/+7
| | | | | | | | | | | | | | This patch adds HPET emulation. It can be disabled with -disable-hpet. An hpet provides a more finely granular clocksource than otherwise available on PC. This means that latency-dependent applications (e.g. multimedia) will generally be smoother when using the HPET. Signed-off-by: Beth Kon <eak@us.ibm.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6081 c046a42c-6fe2-441c-8c8c-71466251a162
* Revert "hw/apic.c: use fls() from host-utils"aurel322008-12-061-1/+7
| | | | | | | | This reverts commit 5876. Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5890 c046a42c-6fe2-441c-8c8c-71466251a162
* hw/apic.c: use fls() from host-utilsaurel322008-12-041-7/+1Star
| | | | | | | | ...and fix a bug, the implementation in hw/apic.c was wrong. Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5876 c046a42c-6fe2-441c-8c8c-71466251a162
* hw/apic.c: use functions from host-utils.haurel322008-10-121-35/+3Star
| | | | | | Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5469 c046a42c-6fe2-441c-8c8c-71466251a162
* Define macro QEMU_GNUC_PREREQ and use itaurel322008-10-121-2/+3
| | | | | | Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5467 c046a42c-6fe2-441c-8c8c-71466251a162
* Only use __builtin_* with GCC >= 3.4aurel322008-10-121-2/+2
| | | | | | | | Fix gcc 3.3 builds, broken in revision 5465. Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5466 c046a42c-6fe2-441c-8c8c-71466251a162
* hw/apic.c: use __builtin funtions instead of assembly codeaurel322008-10-121-10/+8Star
| | | | | | | | Suggested by malc. Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5465 c046a42c-6fe2-441c-8c8c-71466251a162
* Reset CPU on INIT IPIaurel322008-10-021-0/+5
| | | | | | | | | | INIT IPI should reset CPU. Also non boot CPU should be halted. It will be un-halted by SIPI. Signed-off-by: Gleb Natapov <gleb@redhat.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5390 c046a42c-6fe2-441c-8c8c-71466251a162
* hw/apic.c: use bsr and bsf on x86_64aurel322008-10-011-2/+2
| | | | | | (C.W. Betts) git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5382 c046a42c-6fe2-441c-8c8c-71466251a162
* Reset I32_APIC_BASE on system RESETaurel322008-09-021-2/+4
| | | | | | | | | Should be done according to spec. Signed-off-by: Gleb Natapov <gleb@qumranet.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5128 c046a42c-6fe2-441c-8c8c-71466251a162
* De-assert PIC IRQs properly at APIC levelaurel322008-08-211-1/+22
| | | | | | | | | | | | | | | | [ Taking latest isapc changes into account. ] Ensure that PIC-delivered IRQs are properly de-asserted in case the APIC is in EXTINT or FIXED mode (with level-triggering selected) on LINT0. Fixes EFI-BIOS boot issues. This patch also cleans up a bit the interface between PIC and APIC, making apic_local_deliver private again. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5041 c046a42c-6fe2-441c-8c8c-71466251a162
* APIC: Do not start zero-period timers (Jan Kiszka)aliguori2008-08-181-0/+2
| | | | | | | | | | | | | | The APIC timer must not start when the initial count is (still) zero. This caused occasional stalls when booting secondary CPUs of Linux SMP guests. Signed-off-by: Jan Kiszka <jan.kiszka@web.de> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5024 c046a42c-6fe2-441c-8c8c-71466251a162
* moved halted field to CPU_COMMONbellard2008-05-281-2/+2
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4609 c046a42c-6fe2-441c-8c8c-71466251a162
* x86: Rework local IRQ delivery for APICsaurel322008-04-131-20/+43
| | | | | | | (Jan Kiszka) git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4207 c046a42c-6fe2-441c-8c8c-71466251a162
* x86: Raise inter-processor NMI and SMIaurel322008-04-131-1/+7
| | | | | | | (Jan Kiszka) git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4206 c046a42c-6fe2-441c-8c8c-71466251a162
* ignore reads to the EOI registeraurel322008-03-281-0/+3
| | | | | | | (Glauber Costa) git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4124 c046a42c-6fe2-441c-8c8c-71466251a162
* qemu_put signedness fixes, by Andre Przywara.ths2007-12-171-6/+6
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3824 c046a42c-6fe2-441c-8c8c-71466251a162
* Break up vl.h.pbrook2007-11-171-1/+3
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3674 c046a42c-6fe2-441c-8c8c-71466251a162
* Don't route PIC interrupts through the local APIC if the local APICths2007-10-091-0/+33
| | | | | | | config says so. By Ari Kivity. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3371 c046a42c-6fe2-441c-8c8c-71466251a162
* find -type f | xargs sed -i 's/[\t ]*$//g' # Yes, again. Note the star in ↵ths2007-09-171-6/+6
| | | | | | the regex. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3177 c046a42c-6fe2-441c-8c8c-71466251a162
* find -type f | xargs sed -i 's/[\t ]$//g' # on most filesths2007-09-161-20/+20
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3173 c046a42c-6fe2-441c-8c8c-71466251a162
* Set apic instance number for savevm, by Ari Kivity.ths2007-08-261-1/+1
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3144 c046a42c-6fe2-441c-8c8c-71466251a162
* i386 return APIC ID with cpuid, by Bernhard Kauer.ths2007-04-031-0/+1
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2591 c046a42c-6fe2-441c-8c8c-71466251a162
* Upgrade the apic version_id, by Don Laor.ths2007-01-311-1/+1
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2370 c046a42c-6fe2-441c-8c8c-71466251a162
* APIC init fix + APIC get_irq fix (Juergen Keil)bellard2006-10-081-4/+3Star
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2193 c046a42c-6fe2-441c-8c8c-71466251a162
* save apic timerbellard2006-08-171-1/+6
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2116 c046a42c-6fe2-441c-8c8c-71466251a162
* C99 64 bit printfbellard2006-06-251-2/+2
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2018 c046a42c-6fe2-441c-8c8c-71466251a162
* initial support for up to 255 CPUsbellard2005-12-171-98/+156
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1707 c046a42c-6fe2-441c-8c8c-71466251a162
* fummy DM_LOWPRI handlingbellard2005-11-231-8/+11
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1648 c046a42c-6fe2-441c-8c8c-71466251a162
* APIC fixes - SIPI supportbellard2005-11-221-23/+48
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1641 c046a42c-6fe2-441c-8c8c-71466251a162
* do not export fls_bitbellard2005-07-241-1/+1
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1529 c046a42c-6fe2-441c-8c8c-71466251a162
* EXTINT delivery mode support for I/O APIC (Filip Navara)bellard2005-07-231-11/+19
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1522 c046a42c-6fe2-441c-8c8c-71466251a162
* IOAPIC support (initial patch by Filip Navara)bellard2005-07-231-25/+520
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1520 c046a42c-6fe2-441c-8c8c-71466251a162
* CR8 supportbellard2005-01-231-0/+12
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1237 c046a42c-6fe2-441c-8c8c-71466251a162
* initial APIC supportbellard2005-01-041-0/+441
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1183 c046a42c-6fe2-441c-8c8c-71466251a162
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