| Commit message (Collapse) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | hw/arm/fsl-imx6ul: Connect VIRQ and VFIQ | Peter Maydell | 2018-08-24 | 1 | -0/+4 |
| | | | | | | | | | | | | Connect the VIRQ and VFIQ lines from the GIC to the CPU; these exist always for both CPU and GIC whether the virtualization extensions are enabled or not, so we can just unconditionally connect them. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Luc Michel <luc.michel@greensocs.com> Message-id: 20180821132811.17675-6-peter.maydell@linaro.org | ||||
| * | i.MX6UL: Add i.MX6UL SOC | Jean-Christophe Dubois | 2018-08-16 | 1 | -0/+617 |
| Signed-off-by: Jean-Christophe Dubois <jcd@tribudubois.net> Message-id: 3853ec555d68e7e25d726170833b775796151a07.1532984236.git.jcd@tribudubois.net Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org> | |||||
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index : bwlp/qemu.git | |
| Experimental fork of QEMU with video encoding patches | OpenSLX |
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