Commit message (Expand) | Author | Age | Files | Lines | ||
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* | xlnx-zynqmp: Connect the four OCM banks | Alistair Francis | 2015-08-25 | 1 | -0/+15 | |
* | arm/xlnx-zynqmp: fix memory leak | Gonglei | 2015-07-16 | 1 | -0/+2 | |
* | arm: xlnx-zynqmp: Add 2xCortexR5 CPUs | Peter Crosthwaite | 2015-06-19 | 1 | -0/+34 | |
* | arm: xlnx-zynqmp: Add boot-cpu property | Peter Crosthwaite | 2015-06-19 | 1 | -1/+18 | |
* | arm: xlnx-zynqmp: Preface CPU variables with "apu" | Peter Crosthwaite | 2015-06-19 | 1 | -12/+14 | |
* | arm: xlnx-zynqmp: Add UART support | Peter Crosthwaite | 2015-05-18 | 1 | -0/+24 | |
* | arm: xlnx-zynqmp: Add GEM support | Peter Crosthwaite | 2015-05-18 | 1 | -0/+35 | |
* | arm: xlnx-zynqmp: Connect CPU Timers to GIC | Peter Crosthwaite | 2015-05-18 | 1 | -0/+17 | |
* | arm: xlnx-zynqmp: Add GIC | Peter Crosthwaite | 2015-05-18 | 1 | -0/+59 | |
* | arm: Introduce Xilinx ZynqMP SoC | Peter Crosthwaite | 2015-05-18 | 1 | -0/+76 |