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* Merge remote-tracking branch 'remotes/mst/tags/for_upstream' into stagingPeter Maydell2020-06-121-0/+11
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | virtio,acpi,pci: features, fixes, cleanups, tests Max slots negotiation for vhost-user. Free page reporting for balloon. Partial TPM2 ACPI support for ARM. Support for NVDIMMs having their own proximity domains. New vhost-user-vsock device. Fixes, cleanups in ACPI, PCI, virtio. New tests for TPM ACPI. Signed-off-by: Michael S. Tsirkin <mst@redhat.com> # gpg: Signature made Fri 12 Jun 2020 15:18:04 BST # gpg: using RSA key 5D09FD0871C8F85B94CA8A0D281F0DB8D28D5469 # gpg: issuer "mst@redhat.com" # gpg: Good signature from "Michael S. Tsirkin <mst@kernel.org>" [full] # gpg: aka "Michael S. Tsirkin <mst@redhat.com>" [full] # Primary key fingerprint: 0270 606B 6F3C DF3D 0B17 0970 C350 3912 AFBE 8E67 # Subkey fingerprint: 5D09 FD08 71C8 F85B 94CA 8A0D 281F 0DB8 D28D 5469 * remotes/mst/tags/for_upstream: (58 commits) virtio-pci: fix queue_enable write pci: Display PCI IRQ pin in "info pci" Fix parameter type in vhost migration log path acpi: ged: rename event memory region acpi: fadt: add hw-reduced sleep register support acpi: madt: skip pci override on pci-less systems. acpi: create acpi-common.c and move madt code acpi: make build_madt() more generic. virtio: add vhost-user-vsock-pci device virtio: add vhost-user-vsock base device vhost-vsock: add vhost-vsock-common abstraction hw/pci: Fix crash when running QEMU with "-nic model=rocker" libvhost-user: advertise vring features Lift max ram slots limit in libvhost-user Support individual region unmap in libvhost-user Support adding individual regions in libvhost-user Support ram slot configuration in libvhost-user Refactor out libvhost-user fault generation logic Lift max memory slots limit imposed by vhost-user Transmit vhost-user memory regions individually ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
| * arm/acpi: TPM2 ACPI table supportEric Auger2020-06-091-0/+7
| | | | | | | | | | | | | | | | | | | | | | Add a TPM2 ACPI table if a TPM2.0 sysbus device has been dynamically instantiated. Signed-off-by: Eric Auger <eric.auger@redhat.com> Message-Id: <20200601095737.32671-4-eric.auger@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
| * hw/acpi/nvdimm: add a helper to augment SRAT generationVishal Verma2020-06-091-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | NVDIMMs can belong to their own proximity domains, as described by the NFIT. In such cases, the SRAT needs to have Memory Affinity structures in the SRAT for these NVDIMMs, otherwise Linux doesn't populate node data structures properly during NUMA initialization. See the following for an example failure case. https://lore.kernel.org/linux-nvdimm/20200416225438.15208-1-vishal.l.verma@intel.com/ Introduce a new helper, nvdimm_build_srat(), and call it for both the i386 and arm versions of 'build_srat()' to augment the SRAT with memory affinity information for NVDIMMs. The relevant command line options to exercise this are below. Nodes 0-1 contain CPUs and regular memory, and nodes 2-3 are the NVDIMM address space. -object memory-backend-ram,id=mem0,size=2048M -numa node,nodeid=0,memdev=mem0, -numa cpu,node-id=0,socket-id=0 -object memory-backend-ram,id=mem1,size=2048M -numa node,nodeid=1,memdev=mem1, -numa cpu,node-id=1,socket-id=1 -numa node,nodeid=2, -object memory-backend-file,id=nvmem0,share,mem-path=nvdimm-0,size=16384M,align=1G -device nvdimm,memdev=nvmem0,id=nv0,label-size=2M,node=2 -numa node,nodeid=3, -object memory-backend-file,id=nvmem1,share,mem-path=nvdimm-1,size=16384M,align=1G -device nvdimm,memdev=nvmem1,id=nv1,label-size=2M,node=3 Cc: Jingqi Liu <jingqi.liu@intel.com> Cc: Michael S. Tsirkin <mst@redhat.com> Reviewed-by: Jingqi Liu <jingqi.liu@intel.com> Reviewed-by: Igor Mammedov <imammedo@redhat.com> Signed-off-by: Vishal Verma <vishal.l.verma@intel.com> Message-Id: <20200606000911.9896-3-vishal.l.verma@intel.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
* | hw/arm/aspeed: Correct DRAM container region sizePhilippe Mathieu-Daudé2020-06-091-1/+1
|/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | memory_region_set_size() handle the 16 Exabytes limit by special-casing the UINT64_MAX value. This is not a problem for the 32-bit maximum, 4 GiB. By using the UINT32_MAX value, the aspeed-ram-container MemoryRegion ends up missing 1 byte: $ qemu-system-arm -M ast2600-evb -S -monitor stdio (qemu) info mtree address-space: aspeed.fmc-ast2600-dma-dram 0000000080000000-000000017ffffffe (prio 0, i/o): aspeed-ram-container 0000000080000000-00000000bfffffff (prio 0, ram): ram 00000000c0000000-ffffffffffffffff (prio 0, i/o): max_ram Fix by using the correct value. We now have: address-space: aspeed.fmc-ast2600-dma-dram 0000000080000000-000000017fffffff (prio 0, i/o): aspeed-ram-container 0000000080000000-00000000bfffffff (prio 0, ram): ram 00000000c0000000-ffffffffffffffff (prio 0, i/o): max_ram Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Cédric Le Goater <clg@kaod.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20200601142930.29408-2-f4bug@amsat.org> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
* wire in the dwc-hsotg (dwc2) USB host controller emulationPaul Zimmerman2020-06-051-1/+20
| | | | | | | | | Wire the dwc-hsotg (dwc2) emulation into Qemu Signed-off-by: Paul Zimmerman <pauldzim@gmail.com> Reviewed-by: Philippe Mathieu-Daude <f4bug@amsat.org> Message-id: 20200520235349.21215-7-pauldzim@gmail.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
* raspi: add BCM2835 SOC MPHI emulationPaul Zimmerman2020-06-051-0/+17
| | | | | | | | | | | | | Add BCM2835 SOC MPHI (Message-based Parallel Host Interface) emulation. It is very basic, only providing the FIQ interrupt needed to allow the dwc-otg USB host controller driver in the Raspbian kernel to function. Signed-off-by: Paul Zimmerman <pauldzim@gmail.com> Acked-by: Philippe Mathieu-Daude <f4bug@amsat.org> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 20200520235349.21215-2-pauldzim@gmail.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
* hw/arm/pxa2xx: Replace printf() call by qemu_log_mask()Philippe Mathieu-Daudé2020-06-051-17/+49
| | | | | | | | | | | Replace printf() calls by qemu_log_mask(), which is disabled by default. This avoid flooding the terminal when fuzzing the device. Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-id: 20200525114123.21317-3-f4bug@amsat.org Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
* arm/sabrelite: Consistently use &error_fatal in sabrelite_init()Markus Armbruster2020-05-271-6/+1Star
| | | | | | | | | | Cc: Peter Maydell <peter.maydell@linaro.org> Cc: Jean-Christophe Dubois <jcd@tribudubois.net> Signed-off-by: Markus Armbruster <armbru@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20200505101908.6207-10-armbru@redhat.com> [Straightforward conflict with resolved d2623129a7 "qom: Drop parameter @errp of object_property_add() & friends"]
* hw/arm/pxa2xx: Replace hw_error() by qemu_log_mask()Philippe Mathieu-Daudé2020-05-211-3/+4
| | | | | | | | | | | | | hw_error() calls exit(). This a bit overkill when we can log the accesses as unimplemented or guest error. When fuzzing the devices, we don't want the whole process to exit. Replace some hw_error() calls by qemu_log_mask(). Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-id: 20200518140309.5220-3-f4bug@amsat.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
* hw/arm/integratorcp: Replace hw_error() by qemu_log_mask()Philippe Mathieu-Daudé2020-05-211-8/+15
| | | | | | | | | | | | | hw_error() calls exit(). This a bit overkill when we can log the accesses as unimplemented or guest error. When fuzzing the devices, we don't want the whole process to exit. Replace some hw_error() calls by qemu_log_mask(). Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-id: 20200518140309.5220-2-f4bug@amsat.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
* hw/arm/fsl-imx7: Connect watchdog interruptsGuenter Roeck2020-05-211-0/+11
| | | | | | | | | | | i.MX7 supports watchdog pretimeout interupts. With this commit, the watchdog in mcimx7d-sabre is fully operational, including pretimeout support. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Guenter Roeck <linux@roeck-us.net> Message-id: 20200517162135.110364-9-linux@roeck-us.net Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
* hw/arm/fsl-imx7: Instantiate various unimplemented devicesGuenter Roeck2020-05-211-0/+24
| | | | | | | | | | Instantiating PWM, CAN, CAAM, and OCOTP devices is necessary to avoid crashes when booting mainline Linux. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Guenter Roeck <linux@roeck-us.net> Message-id: 20200517162135.110364-8-linux@roeck-us.net Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
* hw/arm/fsl-imx6ul: Connect watchdog interruptsGuenter Roeck2020-05-211-0/+10
| | | | | | | | | | With this commit, the watchdog on mcimx6ul-evk is fully operational, including pretimeout support. Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Signed-off-by: Guenter Roeck <linux@roeck-us.net> Message-id: 20200517162135.110364-7-linux@roeck-us.net Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
* hw/arm/fsl-imx6: Connect watchdog interruptsGuenter Roeck2020-05-211-0/+9
| | | | | | | | | | With this patch applied, the watchdog in the sabrelite emulation is fully operational, including pretimeout support. Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Signed-off-by: Guenter Roeck <linux@roeck-us.net> Message-id: 20200517162135.110364-6-linux@roeck-us.net Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
* hw/arm/fsl-imx31: Wire up watchdogGuenter Roeck2020-05-212-0/+7
| | | | | | | | | With this patch, the watchdog on i.MX31 emulations is fully operational. Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Signed-off-by: Guenter Roeck <linux@roeck-us.net> Message-id: 20200517162135.110364-5-linux@roeck-us.net Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
* hw/arm/fsl-imx25: Wire up watchdogGuenter Roeck2020-05-212-0/+11
| | | | | | | | | | With this commit, the watchdog on imx25-pdk is fully operational, including pretimeout support. Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Signed-off-by: Guenter Roeck <linux@roeck-us.net> Message-id: 20200517162135.110364-4-linux@roeck-us.net Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
* hw: Move i.MX watchdog driver to hw/watchdogGuenter Roeck2020-05-211-0/+3
| | | | | | | | | | | In preparation for a full implementation, move i.MX watchdog driver from hw/misc to hw/watchdog. While at it, add the watchdog files to MAINTAINERS. Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Signed-off-by: Guenter Roeck <linux@roeck-us.net> Message-id: 20200517162135.110364-2-linux@roeck-us.net Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
* hw: Use QEMU_IS_ALIGNED() on parallel flash block sizePhilippe Mathieu-Daudé2020-05-182-2/+2
| | | | | | | | | | | | Use the QEMU_IS_ALIGNED() macro to verify the flash block size is properly aligned. It is quicker to process when reviewing. Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com> Message-Id: <20200511205246.24621-1-philmd@redhat.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Acked-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Kevin Wolf <kwolf@redhat.com>
* qom: Drop parameter @errp of object_property_add() & friendsMarkus Armbruster2020-05-1524-94/+66Star
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The only way object_property_add() can fail is when a property with the same name already exists. Since our property names are all hardcoded, failure is a programming error, and the appropriate way to handle it is passing &error_abort. Same for its variants, except for object_property_add_child(), which additionally fails when the child already has a parent. Parentage is also under program control, so this is a programming error, too. We have a bit over 500 callers. Almost half of them pass &error_abort, slightly fewer ignore errors, one test case handles errors, and the remaining few callers pass them to their own callers. The previous few commits demonstrated once again that ignoring programming errors is a bad idea. Of the few ones that pass on errors, several violate the Error API. The Error ** argument must be NULL, &error_abort, &error_fatal, or a pointer to a variable containing NULL. Passing an argument of the latter kind twice without clearing it in between is wrong: if the first call sets an error, it no longer points to NULL for the second call. ich9_pm_add_properties(), sparc32_ledma_realize(), sparc32_dma_realize(), xilinx_axidma_realize(), xilinx_enet_realize() are wrong that way. When the one appropriate choice of argument is &error_abort, letting users pick the argument is a bad idea. Drop parameter @errp and assert the preconditions instead. There's one exception to "duplicate property name is a programming error": the way object_property_add() implements the magic (and undocumented) "automatic arrayification". Don't drop @errp there. Instead, rename object_property_add() to object_property_try_add(), and add the obvious wrapper object_property_add(). Signed-off-by: Markus Armbruster <armbru@redhat.com> Reviewed-by: Eric Blake <eblake@redhat.com> Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Message-Id: <20200505152926.18877-15-armbru@redhat.com> [Two semantic rebase conflicts resolved]
* hw/arm/bcm2835: Drop futile attempts at QOM-adopting memoryMarkus Armbruster2020-05-151-2/+0Star
| | | | | | | | | | | | | | | | | The "bcm2835-peripherals" device's .instance_init() method bcm2835_peripherals_init() attempts to make two memory regions QOM children of the device. This is futile, because memory_region_init() already did. The errors are ignored (a later commit will change that). Drop the useless calls. Cc: Peter Maydell <peter.maydell@linaro.org> Cc: Andrew Baumann <Andrew.Baumann@microsoft.com> Cc: "Philippe Mathieu-Daudé" <philmd@redhat.com> Cc: qemu-arm@nongnu.org Signed-off-by: Markus Armbruster <armbru@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Eric Blake <eblake@redhat.com> Message-Id: <20200505152926.18877-13-armbru@redhat.com>
* qom: Drop object_property_set_description() parameter @errpMarkus Armbruster2020-05-154-24/+13Star
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | object_property_set_description() and object_class_property_set_description() fail only when property @name is not found. There are 85 calls of object_property_set_description() and object_class_property_set_description(). None of them can fail: * 84 immediately follow the creation of the property. * The one in spapr_rng_instance_init() refers to a property created in spapr_rng_class_init(), from spapr_rng_properties[]. Every one of them still gets to decide what to pass for @errp. 51 calls pass &error_abort, 32 calls pass NULL, one receives the error and propagates it to &error_abort, and one propagates it to &error_fatal. I'm actually surprised none of them violates the Error API. What are we gaining by letting callers handle the "property not found" error? Use when the property is not known to exist is simpler: you don't have to guard the call with a check. We haven't found such a use in 5+ years. Until we do, let's make life a bit simpler and drop the @errp parameter. Signed-off-by: Markus Armbruster <armbru@redhat.com> Reviewed-by: Eric Blake <eblake@redhat.com> Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Message-Id: <20200505152926.18877-8-armbru@redhat.com> [One semantic rebase conflict resolved]
* ACPI: Record the Generic Error Status Block addressDongjiu Geng2020-05-141-0/+8
| | | | | | | | | | | | | | | | | | Record the GHEB address via fw_cfg file, when recording a error to CPER, it will use this address to find out Generic Error Data Entries and write the error. In order to avoid migration failure, make hardware error table address to a part of GED device instead of global variable, then this address will be migrated to target QEMU. Acked-by: Xiang Zheng <zhengxiang9@huawei.com> Signed-off-by: Dongjiu Geng <gengdongjiu@huawei.com> Reviewed-by: Igor Mammedov <imammedo@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Message-id: 20200512030609.19593-7-gengdongjiu@huawei.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
* ACPI: Build Hardware Error Source TableDongjiu Geng2020-05-141-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | This patch builds Hardware Error Source Table(HEST) via fw_cfg blobs. Now it only supports ARMv8 SEA, a type of Generic Hardware Error Source version 2(GHESv2) error source. Afterwards, we can extend the supported types if needed. For the CPER section, currently it is memory section because kernel mainly wants userspace to handle the memory errors. This patch follows the spec ACPI 6.2 to build the Hardware Error Source table. For more detailed information, please refer to document: docs/specs/acpi_hest_ghes.rst build_ghes_hw_error_notification() helper will help to add Hardware Error Notification to ACPI tables without using packed C structures and avoid endianness issues as API doesn't need explicit conversion. Signed-off-by: Xiang Zheng <zhengxiang9@huawei.com> Signed-off-by: Dongjiu Geng <gengdongjiu@huawei.com> Reviewed-by: Igor Mammedov <imammedo@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Message-id: 20200512030609.19593-6-gengdongjiu@huawei.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
* ACPI: Build related register address fields via hardware error fw_cfg blobDongjiu Geng2020-05-141-0/+5
| | | | | | | | | | | | | | | | | | | | This patch builds error_block_address and read_ack_register fields in hardware errors table , the error_block_address points to Generic Error Status Block(GESB) via bios_linker. The max size for one GESB is 1kb, For more detailed information, please refer to document: docs/specs/acpi_hest_ghes.rst Now we only support one Error source, if necessary, we can extend to support more. Suggested-by: Laszlo Ersek <lersek@redhat.com> Signed-off-by: Xiang Zheng <zhengxiang9@huawei.com> Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Reviewed-by: Igor Mammedov <imammedo@redhat.com> Signed-off-by: Dongjiu Geng <gengdongjiu@huawei.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Message-id: 20200512030609.19593-5-gengdongjiu@huawei.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
* hw/arm/virt: Introduce a RAS machine optionDongjiu Geng2020-05-141-0/+23
| | | | | | | | | | | | | RAS Virtualization feature is not supported now, so add a RAS machine option and disable it by default. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Dongjiu Geng <gengdongjiu@huawei.com> Signed-off-by: Xiang Zheng <zhengxiang9@huawei.com> Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Reviewed-by: Igor Mammedov <imammedo@redhat.com> Message-id: 20200512030609.19593-3-gengdongjiu@huawei.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
* aspeed: Add support for the sonorapass-bmc boardPatrick Williams2020-05-141-0/+78
| | | | | | | | | | | | | | | | | Sonora Pass is a 2 socket x86 motherboard designed by Facebook and supported by OpenBMC. Strapping configuration was obtained from hardware and i2c configuration is based on dts found at: https://github.com/facebook/openbmc-linux/blob/1633c87b8ba7c162095787c988979b748ba65dc8/arch/arm/boot/dts/aspeed-bmc-facebook-sonorapass.dts Booted a test image of http://github.com/facebook/openbmc to login prompt. Signed-off-by: Patrick Williams <patrick@stwcx.xyz> Reviewed-by: Amithash Prasad <amithash@fb.com> Reviewed-by: Cédric Le Goater <clg@kaod.org> [PMM: fixed block comment style nit] Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
* hw/arm/musicpal: Map the UART devices unconditionallyPhilippe Mathieu-Daudé2020-05-111-8/+4Star
| | | | | | | | | | | | | I can't find proper documentation or datasheet, but it is likely a MMIO mapped serial device mapped in the 0x80000000..0x8000ffff range belongs to the SoC address space, thus is always mapped in the memory bus. Map the devices on the bus regardless a chardev is attached to it. Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Jan Kiszka <jan.kiszka@web.de> Message-id: 20200505095945.23146-1-f4bug@amsat.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
* hw/timer/nrf51_timer: Display timer ID in trace eventsPhilippe Mathieu-Daudé2020-05-111-0/+5
| | | | | | | | | | | The NRF51 series SoC have 3 timer peripherals, each having 4 counters. To help differentiate which peripheral is accessed, display the timer ID in the trace events. Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20200504072822.18799-4-f4bug@amsat.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
* hw/arm/nrf51: Add NRF51_PERIPHERAL_SIZE definitionPhilippe Mathieu-Daudé2020-05-111-2/+2
| | | | | | | | | | On the NRF51 series, all peripherals have a fixed I/O size of 4KiB. Define NRF51_PERIPHERAL_SIZE and use it. Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20200504072822.18799-2-f4bug@amsat.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
* aspeed: Support AST2600A1 silicon revisionJoel Stanley2020-05-112-7/+7
| | | | | | | | | | | | | | There are minimal differences from Qemu's point of view between the A0 and A1 silicon revisions. As the A1 exercises different code paths in u-boot it is desirable to emulate that instead. Signed-off-by: Joel Stanley <joel@jms.id.au> Reviewed-by: Andrew Jeffery <andrew@aj.id.au> Reviewed-by: Cédric Le Goater <clg@kaod.org> Message-id: 20200504093703.261135-1-joel@jms.id.au Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
* aspeed: Add boot stub for smp bootingJoel Stanley2020-05-111-0/+65
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This is a boot stub that is similar to the code u-boot runs, allowing the kernel to boot the secondary CPU. u-boot works as follows: 1. Initialises the SMP mailbox area in the SCU at 0x1e6e2180 with default values 2. Copies a stub named 'mailbox_insn' from flash to the SCU, just above the mailbox area 3. Sets AST_SMP_MBOX_FIELD_READY to a magic value to indicate the secondary can begin execution from the stub 4. The stub waits until the AST_SMP_MBOX_FIELD_GOSIGN register is set to a magic value 5. Jumps to the address in AST_SMP_MBOX_FIELD_ENTRY, starting Linux Linux indicates it is ready by writing the address of its entrypoint function to AST_SMP_MBOX_FIELD_ENTRY and the 'go' magic number to AST_SMP_MBOX_FIELD_GOSIGN. The secondary CPU sees this at step 4 and breaks out of it's loop. To be compatible, a fixed qemu stub is loaded into the mailbox area. As qemu can ensure the stub is loaded before execution starts, we do not need to emulate the AST_SMP_MBOX_FIELD_READY behaviour of u-boot. The secondary CPU's program counter points to the beginning of the stub, allowing qemu to start secondaries at step four. Reboot behaviour is preserved by resetting AST_SMP_MBOX_FIELD_GOSIGN when the secondaries are reset. This is only configured when the system is booted with -kernel and qemu does not execute u-boot first. Reviewed-by: Cédric Le Goater <clg@kaod.org> Tested-by: Cédric Le Goater <clg@kaod.org> Signed-off-by: Joel Stanley <joel@jms.id.au> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
* hw: add compat machines for 5.1Cornelia Huck2020-05-061-1/+7
| | | | | | | | | Add 5.1 machine types for arm/i440fx/q35/s390x/spapr. Acked-by: David Gibson <david@gibson.dropbear.id.au> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Cornelia Huck <cohuck@redhat.com> Message-id: 20200429144605.7262-1-cohuck@redhat.com
* hw/arm/virt: Remove the compat forcing tpm-tis-device PPI to offEric Auger2020-05-061-5/+0Star
| | | | | | | | | | | | Now that the tpm-tis-device device PPI property is off by default, we can remove the compat used for the same goal. Signed-off-by: Eric Auger <eric.auger@redhat.com> Reviewed-by: Cornelia Huck <cohuck@redhat.com> Reviewed-by: Stefan Berger <stefanb@linux.ibm.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Stefan Berger <stefanb@linux.ibm.com> Message-id: 20200427143145.16251-3-eric.auger@redhat.com
* hw/arm/virt: Add nvdimm hotplug supportShameer Kolothum2020-05-041-5/+11
| | | | | | | | | | | | | | | | | This adds support for nvdimm hotplug events through GED and enables nvdimm for the arm/virt. Now Guests with ACPI can have both cold and hot plug of nvdimms. Hot removal functionality is not yet supported. Signed-off-by: Shameer Kolothum <shameerali.kolothum.thodi@huawei.com> Reviewed-by: Igor Mammedov <imammedo@redhat.com> Reviewed-by: Eric Auger <eric.auger@redhat.com> Message-Id: <20200421125934.14952-5-shameerali.kolothum.thodi@huawei.com> Acked-by: Peter Maydell <peter.maydell@linaro.org> Tested-by: Eric Auger <eric.auger@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
* hw/arm/virt: Add nvdimm hot-plug infrastructureKwangwoo Lee2020-05-043-0/+26
| | | | | | | | | | | | | | | This adds support to init nvdimm acpi state and build nvdimm acpi tables. Please note nvdimm_support is not yet enabled. Signed-off-by: Kwangwoo Lee <kwangwoo.lee@sk.com> Signed-off-by: Eric Auger <eric.auger@redhat.com> Signed-off-by: Shameer Kolothum <shameerali.kolothum.thodi@huawei.com> Reviewed-by: Igor Mammedov <imammedo@redhat.com> Message-Id: <20200421125934.14952-4-shameerali.kolothum.thodi@huawei.com> Acked-by: Peter Maydell <peter.maydell@linaro.org> Tested-by: Eric Auger <eric.auger@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
* hw/arm: versal-virt: Add support for the RTCEdgar E. Iglesias2020-05-041-0/+22
| | | | | | | | | | Add support for the RTC. Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Luc Michel <luc.michel@greensocs.com> Message-id: 20200427181649.26851-12-edgar.iglesias@gmail.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
* hw/arm: versal-virt: Add support for SDEdgar E. Iglesias2020-05-041-0/+46
| | | | | | | | | | Add support for SD. Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Luc Michel <luc.michel@greensocs.com> Message-id: 20200427181649.26851-11-edgar.iglesias@gmail.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
* hw/arm: versal: Add support for the RTCEdgar E. Iglesias2020-05-041-0/+21
| | | | | | | | | | | hw/arm: versal: Add support for the RTC. Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Luc Michel <luc.michel@greensocs.com> Message-id: 20200427181649.26851-10-edgar.iglesias@gmail.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
* hw/arm: versal: Add support for SDEdgar E. Iglesias2020-05-041-0/+31
| | | | | | | | | | | Add support for SD. Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Luc Michel <luc.michel@greensocs.com> Message-id: 20200427181649.26851-9-edgar.iglesias@gmail.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
* hw/arm: versal: Embed the APUs into the SoC typeEdgar E. Iglesias2020-05-042-16/+7Star
| | | | | | | | | | | | Embed the APUs into the SoC type. Suggested-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Luc Michel <luc.michel@greensocs.com> Message-id: 20200427181649.26851-8-edgar.iglesias@gmail.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
* hw/arm: versal: Embed the ADMAs into the SoC typeEdgar E. Iglesias2020-05-041-7/+7
| | | | | | | | | | | | Embed the ADMAs into the SoC type. Suggested-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Luc Michel <luc.michel@greensocs.com> Message-id: 20200427181649.26851-7-edgar.iglesias@gmail.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
* hw/arm: versal: Embed the GEMs into the SoC typeEdgar E. Iglesias2020-05-041-7/+8
| | | | | | | | | | | | Embed the GEMs into the SoC type. Suggested-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Luc Michel <luc.michel@greensocs.com> Message-id: 20200427181649.26851-6-edgar.iglesias@gmail.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
* hw/arm: versal: Embed the UARTs into the SoC typeEdgar E. Iglesias2020-05-041-6/+6
| | | | | | | | | | | | Embed the UARTs into the SoC type. Suggested-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Luc Michel <luc.michel@greensocs.com> Message-id: 20200427181649.26851-5-edgar.iglesias@gmail.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
* hw/arm: versal-virt: Fix typo xlnx-ve -> xlnx-versalEdgar E. Iglesias2020-05-041-1/+1
| | | | | | | | | | | Fix typo xlnx-ve -> xlnx-versal. Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Luc Michel <luc.michel@greensocs.com> Message-id: 20200427181649.26851-4-edgar.iglesias@gmail.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
* hw/arm: versal: Move misplaced commentEdgar E. Iglesias2020-05-041-1/+1
| | | | | | | | | | | Move misplaced comment. Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Luc Michel <luc.michel@greensocs.com> Message-id: 20200427181649.26851-3-edgar.iglesias@gmail.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
* hw/arm: versal: Remove inclusion of arm_gicv3_common.hEdgar E. Iglesias2020-05-041-1/+0Star
| | | | | | | | | | | Remove inclusion of arm_gicv3_common.h, this already gets included via xlnx-versal.h. Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Luc Michel <luc.michel@greensocs.com> Message-id: 20200427181649.26851-2-edgar.iglesias@gmail.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
* hw/arm/mps2-tz: Use TYPE_IOTKIT instead of hardcoded stringPhilippe Mathieu-Daudé2020-05-041-1/+1
| | | | | | | | | | | By using the TYPE_* definitions for devices, we can: - quickly find where devices are used with 'git-grep' - easily rename a device (one-line change). Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-id: 20200428154650.21991-1-f4bug@amsat.org Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
* hw/arm: xlnx-zcu102: Disable unsupported FDT firmware nodesEdgar E. Iglesias2020-04-301-0/+30
| | | | | | | | | | | Disable unsupported FDT firmware nodes if a user passes us a DTB with nodes enabled that the machine cannot support due to lack of EL3 or EL2 support. Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Message-id: 20200423121114.4274-5-edgar.iglesias@gmail.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
* hw/arm: xlnx-zcu102: Move arm_boot_info into XlnxZCU102Edgar E. Iglesias2020-04-301-4/+5
| | | | | | | | | Move arm_boot_info into XlnxZCU102. Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Message-id: 20200423121114.4274-4-edgar.iglesias@gmail.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
* hw/arm/virt: dt: add kaslr-seed propertyJerome Forissier2020-04-301-0/+15
| | | | | | | | | | | | | | | Generate random seeds to be used by the non-secure and/or secure OSes for ASLR. The seeds are 64-bit random values exported via the DT properties /chosen/kaslr-seed [1] and /secure-chosen/kaslr-seed, the latter being used by OP-TEE [2]. [1] https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=e5bc0c37c97e1 [2] https://github.com/OP-TEE/optee_os/commit/ef262691fe0e Signed-off-by: Jerome Forissier <jerome@forissier.org> Message-id: 20200420121807.8204-3-jerome@forissier.org Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
generated by cgit v1.2.3-55-g7522 (git 2.39.0) at 2025-01-09 08:48:17 +0100