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* Merge tag 'for_upstream' of git://git.kernel.org/pub/scm/virt/kvm/mst/qemu ↵Richard Henderson2022-06-111-28/+0Star
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | into staging virtio,pc,pci: fixes,cleanups,features more CXL patches VIOT Igor's huge AML rework fixes, cleanups all over the place Signed-off-by: Michael S. Tsirkin <mst@redhat.com> # -----BEGIN PGP SIGNATURE----- # # iQFDBAABCAAtFiEEXQn9CHHI+FuUyooNKB8NuNKNVGkFAmKj4YcPHG1zdEByZWRo # YXQuY29tAAoJECgfDbjSjVRpkNcIAKTsMfUVueTjelC2RwIdegQkypycKhCweKzc # QxddaEr0w+N2164byT3IUy9h53hV3qAAmMuGE4d8B2r5rykf+SwDfIeNmHNqntnA # oLraXIxSSAf4/1cTsRCVL/BXo2E9P+WHI3huw37HClmPLdyMjQa1AtpTpKnIsbmO # sBZf7t5yHDJ2WGZwBQ1IbAxvsdGo1fa1TCt1jZ9g1dmnQSTteQG8DHkGoRnkwTi7 # 510jb0e8uQEgKytCdLTHqESHlfgjvoI73OFOAR2dzTKy6KelFmdLYSo2FtsIdtT5 # 1fZNaDjtl6zQ4b2iLBgPpHtikKch9BzzhDMbCsq7FpvasZ8u2FE= # =LXG0 # -----END PGP SIGNATURE----- # gpg: Signature made Fri 10 Jun 2022 05:27:51 PM PDT # gpg: using RSA key 5D09FD0871C8F85B94CA8A0D281F0DB8D28D5469 # gpg: issuer "mst@redhat.com" # gpg: Good signature from "Michael S. Tsirkin <mst@kernel.org>" [undefined] # gpg: aka "Michael S. Tsirkin <mst@redhat.com>" [undefined] # gpg: WARNING: This key is not certified with a trusted signature! # gpg: There is no indication that the signature belongs to the owner. # Primary key fingerprint: 0270 606B 6F3C DF3D 0B17 0970 C350 3912 AFBE 8E67 # Subkey fingerprint: 5D09 FD08 71C8 F85B 94CA 8A0D 281F 0DB8 D28D 5469 * tag 'for_upstream' of git://git.kernel.org/pub/scm/virt/kvm/mst/qemu: (53 commits) hw/vhost-user-scsi|blk: set `supports_config` flag correctly hw/virtio/vhost-user: don't use uninitialized variable tests/acpi: virt: update golden masters for VIOT hw/acpi/viot: sort VIOT ACPI table entries by PCI host bridge min_bus tests/acpi: virt: allow VIOT acpi table changes hw/acpi/viot: build array of PCI host bridges before generating VIOT ACPI table hw/acpi/viot: move the individual PCI host bridge entry generation to a new function hw/acpi/viot: rename build_pci_range_node() to enumerate_pci_host_bridges() hw/cxl: Fix missing write mask for HDM decoder target list registers pci: fix overflow in snprintf string formatting hw/machine: Drop cxl_supported flag as no longer useful hw/cxl: Move the CXLState from MachineState to machine type specific state. tests/acpi: Update q35/CEDT.cxl for new memory addresses. pci/pci_expander_bridge: For CXL HB delay the HB register memory region setup. tests/acpi: Allow modification of q35 CXL CEDT table. hw/cxl: Push linking of CXL targets into i386/pc rather than in machine.c hw/acpi/cxl: Pass in the CXLState directly rather than MachineState hw/cxl: Make the CXL fixed memory window setup a machine parameter. x86: acpi-build: do not include hw/isa/isa.h directly tests: acpi: update expected DSDT.tis.tpm2/DSDT.tis.tpm12 blobs ... Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
| * hw/cxl: Move the CXLState from MachineState to machine type specific state.Jonathan Cameron2022-06-101-6/+0Star
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This removes the last of the CXL code from the MachineState where it is visible to all Machines to only those that support CXL (currently i386/pc) As i386/pc always support CXL now, stop allocating the state independently. Note the pxb register hookup code runs even if cxl=off in order to detect pxb_cxl host bridges and fail to start if any are present as they won't have the control registers available. Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Reviewed-by: Ben Widawsky <ben@bwidawsk.net> Message-Id: <20220608145440.26106-8-Jonathan.Cameron@huawei.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
| * hw/cxl: Make the CXL fixed memory window setup a machine parameter.Jonathan Cameron2022-06-101-22/+0Star
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Paolo Bonzini requested this change to simplify the ongoing effort to allow machine setup entirely via RPC. Includes shortening the command line form cxl-fixed-memory-window to cxl-fmw as the command lines are extremely long even with this change. The json change is needed to ensure that there is a CXLFixedMemoryWindowOptionsList even though the actual element in the json is never used. Similar to existing SgxEpcProperties. Update qemu-options.hx to reflect that this is now a -machine parameter. The bulk of -M / -machine parameters are documented under machine, so use that in preference to M. Update cxl-test and bios-tables-test to reflect new parameters. Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Reviewed-by: Ben Widawsky <ben@bwidawsk.net> Reviewed-by: Davidlohr Bueso <dave@stgolabs.net> Message-Id: <20220608145440.26106-2-Jonathan.Cameron@huawei.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
* | hw/core/loader: return image sizes as ssize_tJamie Iles2022-06-102-40/+43
|/ | | | | | | | | | | | | | | Various loader functions return an int which limits images to 2GB which is fine for things like a BIOS/kernel image, but if we want to be able to load memory images or large ramdisks then any file over 2GB would silently fail to load. Cc: Luc Michel <lmichel@kalray.eu> Signed-off-by: Jamie Iles <jamie@nuviainc.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: Luc Michel <lmichel@kalray.eu> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-Id: <20211111141141.3295094-2-jamie@nuviainc.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
* hw/nvme: do not auto-generate eui64Klaus Jensen2022-06-031-0/+1
| | | | | | | | | | | | | | | | We cannot provide auto-generated unique or persistent namespace identifiers (EUI64, NGUID, UUID) easily. Since 6.1, namespaces have been assigned a generated EUI64 of the form "52:54:00:<namespace counter>". This is will be unique within a QEMU instance, but not globally. Revert that this is assigned automatically and immediately deprecate the compatibility parameter. Users can opt-in to this with the `eui64-default=on` device parameter or set it explicitly with `eui64=UINT64`. Cc: libvir-list@redhat.com Reviewed-by: Christoph Hellwig <hch@lst.de> Signed-off-by: Klaus Jensen <k.jensen@samsung.com>
* hw/core: loader: Set is_linux to true for VxWorks uImageBin Meng2022-05-241-0/+15
| | | | | | | | | | | | | VxWorks 7 uses the same boot interface as the Linux kernel on Arm (64-bit only), PowerPC and RISC-V architectures. Add logic to set is_linux to true for VxWorks uImage for these architectures in load_uboot_image(). Signed-off-by: Bin Meng <bin.meng@windriver.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-Id: <20220324134812.541274-2-bmeng.cn@gmail.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
* hw/core: Sync uboot_image.h from U-Boot v2022.01Bin Meng2022-05-241-71/+142
| | | | | | | | | | | Sync uboot_image.h from upstream U-Boot v2022.01 release [1]. [1] https://source.denx.de/u-boot/u-boot/-/blob/v2022.01/include/image.h Signed-off-by: Bin Meng <bin.meng@windriver.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-Id: <20220324134812.541274-1-bmeng.cn@gmail.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
* hw/intc/arm_gicv3: Use correct number of priority bits for the CPUPeter Maydell2022-05-191-1/+3
| | | | | | | | | | | | | | Make the GICv3 set its number of bits of physical priority from the implementation-specific value provided in the CPU state struct, in the same way we already do for virtual priority bits. Because this would be a migration compatibility break, we provide a property force-8-bit-prio which is enabled for 7.0 and earlier versioned board models to retain the legacy "always use 8 bits" behaviour. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20220512151457.3899052-6-peter.maydell@linaro.org Message-id: 20220506162129.2896966-5-peter.maydell@linaro.org
* Merge tag 'for_upstream' of git://git.kernel.org/pub/scm/virt/kvm/mst/qemu ↵Richard Henderson2022-05-171-0/+28
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | into staging virtio,pc,pci: fixes,cleanups,features most of CXL support fixes, cleanups all over the place Signed-off-by: Michael S. Tsirkin <mst@redhat.com> # -----BEGIN PGP SIGNATURE----- # # iQFDBAABCAAtFiEEXQn9CHHI+FuUyooNKB8NuNKNVGkFAmKCuLIPHG1zdEByZWRo # YXQuY29tAAoJECgfDbjSjVRpdDUH/12SmWaAo+0+SdIHgWFFxsmg3t/EdcO38fgi # MV+GpYdbp6TlU3jdQhrMZYmFdkVVydBdxk93ujCLbFS0ixTsKj31j0IbZMfdcGgv # SLqnV+E3JdHqnGP39q9a9rdwYWyqhkgHoldxilIFW76ngOSapaZVvnwnOMAMkf77 # 1LieL4/Xq7N9Ho86Zrs3IczQcf0czdJRDaFaSIu8GaHl8ELyuPhlSm6CSqqrEEWR # PA/COQsLDbLOMxbfCi5v88r5aaxmGNZcGbXQbiH9qVHw65nlHyLH9UkNTdJn1du1 # f2GYwwa7eekfw/LCvvVwxO1znJrj02sfFai7aAtQYbXPvjvQiqA= # =xdSk # -----END PGP SIGNATURE----- # gpg: Signature made Mon 16 May 2022 01:48:50 PM PDT # gpg: using RSA key 5D09FD0871C8F85B94CA8A0D281F0DB8D28D5469 # gpg: issuer "mst@redhat.com" # gpg: Good signature from "Michael S. Tsirkin <mst@kernel.org>" [undefined] # gpg: aka "Michael S. Tsirkin <mst@redhat.com>" [undefined] # gpg: WARNING: This key is not certified with a trusted signature! # gpg: There is no indication that the signature belongs to the owner. # Primary key fingerprint: 0270 606B 6F3C DF3D 0B17 0970 C350 3912 AFBE 8E67 # Subkey fingerprint: 5D09 FD08 71C8 F85B 94CA 8A0D 281F 0DB8 D28D 5469 * tag 'for_upstream' of git://git.kernel.org/pub/scm/virt/kvm/mst/qemu: (86 commits) vhost-user-scsi: avoid unlink(NULL) with fd passing virtio-net: don't handle mq request in userspace handler for vhost-vdpa vhost-vdpa: change name and polarity for vhost_vdpa_one_time_request() vhost-vdpa: backend feature should set only once vhost-net: fix improper cleanup in vhost_net_start vhost-vdpa: fix improper cleanup in net_init_vhost_vdpa virtio-net: align ctrl_vq index for non-mq guest for vhost_vdpa virtio-net: setup vhost_dev and notifiers for cvq only when feature is negotiated hw/i386/amd_iommu: Fix IOMMU event log encoding errors hw/i386: Make pic a property of common x86 base machine type hw/i386: Make pit a property of common x86 base machine type include/hw/pci/pcie_host: Correct PCIE_MMCFG_SIZE_MAX include/hw/pci/pcie_host: Correct PCIE_MMCFG_BUS_MASK docs/vhost-user: Clarifications for VHOST_USER_ADD/REM_MEM_REG vhost-user: more master/slave things virtio: add vhost support for virtio devices virtio: drop name parameter for virtio_init() virtio/vhost-user: dynamically assign VhostUserHostNotifiers hw/virtio/vhost-user: don't suppress F_CONFIG when supported include/hw: start documenting the vhost API ... Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
| * cxl: Machine level control on whether CXL support is enabledJonathan Cameron2022-05-131-0/+28
| | | | | | | | | | | | | | | | | | | | | | | | There are going to be some potential overheads to CXL enablement, for example the host bridge region reserved in memory maps. Add a machine level control so that CXL is disabled by default. Signed-off-by: Jonathan Cameron <jonathan.cameron@huawei.com> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20220429144110.25167-14-Jonathan.Cameron@huawei.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
* | qdev-properties: Add a new macro with bitmask check for uint64_t propertyYang Weijiang2022-05-141-0/+19
|/ | | | | | | | | | | The DEFINE_PROP_UINT64_CHECKMASK maro applies certain mask check agaist user-supplied property value, reject the value if it violates the bitmask. Co-developed-by: Like Xu <like.xu@linux.intel.com> Signed-off-by: Like Xu <like.xu@linux.intel.com> Signed-off-by: Yang Weijiang <weijiang.yang@intel.com> Message-Id: <20220215195258.29149-2-weijiang.yang@intel.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
* machine: move more memory validation to Machine objectPaolo Bonzini2022-05-121-2/+19
| | | | | | | | | This allows setting memory properties without going through vl.c, and have them validated just the same. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Message-Id: <20220414165300.555321-6-pbonzini@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
* machine: make memory-backend a link propertyPaolo Bonzini2022-05-122-24/+48
| | | | | | | | | Handle HostMemoryBackend creation and setting of ms->ram entirely in machine_run_board_init. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Message-Id: <20220414165300.555321-5-pbonzini@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
* machine: add mem compound propertyPaolo Bonzini2022-05-121-0/+80
| | | | | | | | | | | | | Make -m syntactic sugar for a compound property "-machine mem.{size,max-size,slots}". The new property does not have the magic conversion to megabytes of unsuffixed arguments, and also does not understand that "0" means the default size (you have to leave it out to get the default). This means that we need to convert the QemuOpts by hand to a QDict. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Message-Id: <20220414165300.555321-4-pbonzini@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
* machine: add boot compound propertyPaolo Bonzini2022-05-121-46/+52
| | | | | | | | | Make -boot syntactic sugar for a compound property "-machine boot.{order,menu,...}". machine_boot_parse is replaced by the setter for the property. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Message-Id: <20220414165300.555321-3-pbonzini@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
* machine: use QAPI struct for boot configurationPaolo Bonzini2022-05-121-3/+65
| | | | | | | | | | | As part of converting -boot to a property with a QAPI type, define the struct and use it throughout QEMU to access boot configuration. machine_boot_parse takes care of doing the QemuOpts->QAPI conversion by hand, for now. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Message-Id: <20220414165300.555321-2-pbonzini@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
* qapi/machine.json: Add cluster-idGavin Shan2022-05-092-0/+20
| | | | | | | | | | | | | | | | | | | | | This adds cluster-id in CPU instance properties, which will be used by arm/virt machine. Besides, the cluster-id is also verified or dumped in various spots: * hw/core/machine.c::machine_set_cpu_numa_node() to associate CPU with its NUMA node. * hw/core/machine.c::machine_numa_finish_cpu_init() to record CPU slots with no NUMA mapping set. * hw/core/machine-hmp-cmds.c::hmp_hotpluggable_cpus() to dump cluster-id. Signed-off-by: Gavin Shan <gshan@redhat.com> Reviewed-by: Yanan Wang <wangyanan55@huawei.com> Acked-by: Igor Mammedov <imammedo@redhat.com> Message-id: 20220503140304.855514-2-gshan@redhat.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
* hw/core: Move the ARM sysbus-fdt to coreAlistair Francis2022-04-292-0/+572
| | | | | | | | | | | | | | The ARM virt machine currently uses sysbus-fdt to create device tree entries for dynamically created MMIO devices. The RISC-V virt machine can also benefit from this, so move the code to the core directory. Signed-off-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Edgar E. Iglesias <edgar.iglesias@amd.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Message-Id: <20220427234146.1130752-3-alistair.francis@opensource.wdc.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
* hw/core/irq: remove unused 'qemu_irq_split' functionZongyuan Li2022-04-211-15/+0Star
| | | | | | | | Signed-off-by: Zongyuan Li <zongyuan.li@smartx.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 20220324181557.203805-5-zongyuan.li@smartx.com Resolves: https://gitlab.com/qemu-project/qemu/-/issues/811 Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
* hw: Add compat machines for 7.1Cornelia Huck2022-04-201-0/+3
| | | | | | | | | | | | | Add 7.1 machine types for arm/i440fx/m68k/q35/s390x/spapr. Signed-off-by: Cornelia Huck <cohuck@redhat.com> Message-Id: <20220316145521.1224083-1-cohuck@redhat.com> Reviewed-by: Eric Farman <farman@linux.ibm.com> Reviewed-by: Cédric Le Goater <clg@kaod.org> Acked-by: Laurent Vivier <laurent@vivier.eu> Reviewed-by: Eric Auger <eric.auger@redhat.com> Reviewed-by: Yanan Wang <wangyanan55@huawei.com> Signed-off-by: Thomas Huth <thuth@redhat.com>
* Merge tag 'for-upstream' of https://gitlab.com/bonzini/qemu into stagingRichard Henderson2022-04-201-3/+2Star
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * Add cpu0-id to query-sev-capabilities * whpx support for breakpoints and stepping * initial support for Hyper-V Synthetic Debugging * use monotonic clock for QemuCond and QemuSemaphore * Remove qemu-common.h include from most units and lots of other clenaups * do not include headers for all virtio devices in virtio-ccw.h # -----BEGIN PGP SIGNATURE----- # # iQFIBAABCAAyFiEE8TM4V0tmI4mGbHaCv/vSX3jHroMFAmJXCQAUHHBib256aW5p # QHJlZGhhdC5jb20ACgkQv/vSX3jHroNT6wf+NHDJUEdDiwaVGVTGXgHuiaycsymi # FpNPiw/+XxSGN5xF3fkUGgqaDrcwIYwVfnXlghKSz8kp1cP3cjxa5CzNMLGTp5je # N6BxFbD7yC6dhagGm3mj32jlsptv3M38OHqKc3t+RaUAotP5RF2VdCyfUBLG6vU0 # aMzvMfMtB5aG0D8Fr5EV63t1JMTceFU0YxsG73UCFs2Yx4Z0cGBbNxMbHweRhd1q # tPeVDS46MFPM3/2cGGHpeeqxkoCTU7A9j1VuNQI3k+Kg+6W5YVxiK/UP7bw77E/a # yAHsmIVTNro8ajMBch73weuHtGtdfFLvCKc6QX6aVjzK4dF1voQ01E7gPQ== # =rMle # -----END PGP SIGNATURE----- # gpg: Signature made Wed 13 Apr 2022 10:31:44 AM PDT # gpg: using RSA key F13338574B662389866C7682BFFBD25F78C7AE83 # gpg: issuer "pbonzini@redhat.com" # gpg: Good signature from "Paolo Bonzini <bonzini@gnu.org>" [undefined] # gpg: aka "Paolo Bonzini <pbonzini@redhat.com>" [undefined] # gpg: WARNING: This key is not certified with a trusted signature! # gpg: There is no indication that the signature belongs to the owner. # Primary key fingerprint: 46F5 9FBD 57D6 12E7 BFD4 E2F7 7E15 100C CD36 69B1 # Subkey fingerprint: F133 3857 4B66 2389 866C 7682 BFFB D25F 78C7 AE83 * tag 'for-upstream' of https://gitlab.com/bonzini/qemu: (53 commits) target/i386: Remove unused XMMReg, YMMReg types and CPUState fields target/i386: do not access beyond the low 128 bits of SSE registers virtio-ccw: do not include headers for all virtio devices virtio-ccw: move device type declarations to .c files virtio-ccw: move vhost_ccw_scsi to a separate file s390x: follow qdev tree to detect SCSI device on a CCW bus hw: hyperv: Initial commit for Synthetic Debugging device hyperv: Add support to process syndbg commands hyperv: Add definitions for syndbg hyperv: SControl is optional to enable SynIc thread-posix: optimize qemu_sem_timedwait with zero timeout thread-posix: implement Semaphore with QemuCond and QemuMutex thread-posix: use monotonic clock for QemuCond and QemuSemaphore thread-posix: remove the posix semaphore support whpx: Added support for breakpoints and stepping build-sys: simplify AF_VSOCK check build-sys: drop ntddscsi.h check Remove qemu-common.h include from most units qga: remove explicit environ argument from exec/spawn Move fcntl_setfl() to oslib-posix ... Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
| * Remove qemu-common.h include from most unitsMarc-André Lureau2022-04-061-1/+0Star
| | | | | | | | | | | | Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Message-Id: <20220323155743.1585078-33-marcandre.lureau@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
| * Replace config-time define HOST_WORDS_BIGENDIANMarc-André Lureau2022-04-061-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Replace a config-time define with a compile time condition define (compatible with clang and gcc) that must be declared prior to its usage. This avoids having a global configure time define, but also prevents from bad usage, if the config header wasn't included before. This can help to make some code independent from qemu too. gcc supports __BYTE_ORDER__ from about 4.6 and clang from 3.2. Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> [ For the s390x parts I'm involved in ] Acked-by: Halil Pasic <pasic@linux.ibm.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20220323155743.1585078-7-marcandre.lureau@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
* | acpi: fix acpi_index migrationDr. David Alan Gilbert2022-04-061-1/+3
|/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | vmstate_acpi_pcihp_use_acpi_index() was expecting AcpiPciHpState as state but it actually received PIIX4PMState, because VMSTATE_PCI_HOTPLUG is a macro and not another struct. So it ended up accessing random pointer, which resulted in 'false' return value and acpi_index field wasn't ever sent. However in 7.0 that pointer de-references to value > 0, and destination QEMU starts to expect the field which isn't sent in migratioon stream from older QEMU (6.2 and older). As result migration fails with: qemu-system-x86_64: Missing section footer for 0000:00:01.3/piix4_pm qemu-system-x86_64: load of migration failed: Invalid argument In addition with QEMU-6.2, destination due to not expected state, also never expects the acpi_index field in migration stream. Q35 is not affected as it always sends/expects the field as long as acpi based PCI hotplug is enabled. Fix issue by introducing compat knob to never send/expect acpi_index in migration stream for 6.2 and older PC machine types and always send it for 7.0 and newer PC machine types. Diagnosed-by: Dr. David Alan Gilbert <dgilbert@redhat.com> Fixes: b32bd76 ("pci: introduce acpi-index property for PCI device") Resolves: https://gitlab.com/qemu-project/qemu/-/issues/932 Signed-off-by: Igor Mammedov <imammedo@redhat.com> Reviewed-by: Dr. David Alan Gilbert <dgilbert@redhat.com> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
* Use g_new() & friends where that makes obvious senseMarkus Armbruster2022-03-212-2/+2
| | | | | | | | | | | | | | | | | | | | | | | g_new(T, n) is neater than g_malloc(sizeof(T) * n). It's also safer, for two reasons. One, it catches multiplication overflowing size_t. Two, it returns T * rather than void *, which lets the compiler catch more type errors. This commit only touches allocations with size arguments of the form sizeof(T). Patch created mechanically with: $ spatch --in-place --sp-file scripts/coccinelle/use-g_new-etc.cocci \ --macro-file scripts/cocci-macro-file.h FILES... Signed-off-by: Markus Armbruster <armbru@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Cédric Le Goater <clg@kaod.org> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Acked-by: Dr. David Alan Gilbert <dgilbert@redhat.com> Message-Id: <20220315144156.1595462-4-armbru@redhat.com> Reviewed-by: Pavel Dovgalyuk <Pavel.Dovgalyuk@ispras.ru>
* clock-vmstate: Add missing END_OF_LISTDr. David Alan Gilbert2022-03-021-0/+1
| | | | | | | | | | | | | | Add the missing VMSTATE_END_OF_LIST to vmstate_muldiv Fixes: 99abcbc7600 ("clock: Provide builtin multiplier/divider") Signed-off-by: Dr. David Alan Gilbert <dgilbert@redhat.com> Message-Id: <20220111101934.115028-1-dgilbert@redhat.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Luc Michel <luc@lmichel.fr> Cc: qemu-stable@nongnu.org Signed-off-by: Dr. David Alan Gilbert <dgilbert@redhat.com>
* semihosting/arm-compat: replace heuristic for softmmu SYS_HEAPINFOAlex Bennée2022-02-281-0/+86
| | | | | | | | | | | | | | | | | | | The previous numbers were a guess at best and rather arbitrary without taking into account anything that might be loaded. Instead of using guesses based on the state of registers implement a new function that: a) scans the MemoryRegions for the largest RAM block b) iterates through all "ROM" blobs looking for the biggest gap The "ROM" blobs include all code loaded via -kernel and the various -device loader techniques. Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Cc: Andrew Strauss <astrauss11@gmail.com> Cc: Keith Packard <keithp@keithp.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20220225172021.3493923-18-alex.bennee@linaro.org>
* Merge remote-tracking branch ↵Peter Maydell2022-02-221-1/+0Star
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | 'remotes/thuth-gitlab/tags/pull-request-2022-02-21' into staging * Improve virtio-net failover test * Some small fixes for the qtests * Misc header cleanups by Philippe # gpg: Signature made Mon 21 Feb 2022 11:40:37 GMT # gpg: using RSA key 27B88847EEE0250118F3EAB92ED9D774FE702DB5 # gpg: issuer "thuth@redhat.com" # gpg: Good signature from "Thomas Huth <th.huth@gmx.de>" [full] # gpg: aka "Thomas Huth <thuth@redhat.com>" [full] # gpg: aka "Thomas Huth <huth@tuxfamily.org>" [full] # gpg: aka "Thomas Huth <th.huth@posteo.de>" [unknown] # Primary key fingerprint: 27B8 8847 EEE0 2501 18F3 EAB9 2ED9 D774 FE70 2DB5 * remotes/thuth-gitlab/tags/pull-request-2022-02-21: (25 commits) hw/tricore: Remove unused and incorrect header hw/m68k/mcf: Add missing 'exec/hwaddr.h' header exec/exec-all: Move 'qemu/log.h' include in units requiring it softmmu/runstate: Clean headers linux-user: Add missing "qemu/timer.h" include target: Add missing "qemu/timer.h" include core/ptimers: Remove unnecessary 'sysemu/cpus.h' include exec/ramblock: Add missing includes qtest: Add missing 'hw/qdev-core.h' include hw/acpi/memory_hotplug: Remove unused 'hw/acpi/pc-hotplug.h' header hw/remote: Add missing include hw/tpm: Clean includes scripts: Remove the old switch-timer-api script tests/qtest: failover: migration abort test with failover off tests/qtest: failover: test migration if the guest doesn't support failover tests/qtest: failover: check migration with failover off tests/qtest: failover: check missing guest feature tests/qtest: failover: check the feature is correctly provided tests/qtest: failover: use a macro for check_one_card() tests/qtest: failover: clean up pathname of tests ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
| * core/ptimers: Remove unnecessary 'sysemu/cpus.h' includePhilippe Mathieu-Daudé2022-02-211-1/+0Star
| | | | | | | | | | | | | | | | Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20220207082756.82600-7-f4bug@amsat.org> Signed-off-by: Thomas Huth <thuth@redhat.com>
* | Mark remaining global TypeInfo instances as constBernhard Beschow2022-02-212-2/+2
|/ | | | | | | | | | | | | | | | | | | More than 1k of TypeInfo instances are already marked as const. Mark the remaining ones, too. This commit was created with: git grep -z -l 'static TypeInfo' -- '*.c' | \ xargs -0 sed -i 's/static TypeInfo/static const TypeInfo/' Signed-off-by: Bernhard Beschow <shentey@gmail.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Cédric Le Goater <clg@kaod.org> Reviewed-by: Igor Mammedov <imammedo@redhat.com> Acked-by: Corey Minyard <cminyard@mvista.com> Message-id: 20220117145805.173070-2-shentey@gmail.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
* Allow setting up to 8 bytes with the generic loaderPetr Tesarik2022-02-161-1/+1
| | | | | | | | | | | | | | | | | | The documentation for the generic loader says that "the maximum size of the data is 8 bytes". However, attempts to set data-len=8 trigger the following assertion failure: ../hw/core/generic-loader.c:59: generic_loader_reset: Assertion `s->data_len < sizeof(s->data)' failed. The type of s->data is uint64_t (i.e. 8 bytes long), so I believe this assert should use <= instead of <. Fixes: e481a1f63c93 ("generic-loader: Add a generic loader") Signed-off-by: Petr Tesarik <ptesarik@suse.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-id: 20220120092715.7805-1-ptesarik@suse.com Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
* hw/elf_ops: clear uninitialized segment spaceLaurent Vivier2022-01-201-0/+4
| | | | | | | | | | | | | | | | | | When the mem_size of the segment is bigger than the file_size, and if this space doesn't overlap another segment, it needs to be cleared. This bug is very similar to the one we had for linux-user, 22d113b52f41 ("linux-user: Fix loading of BSS segments"), where .bss section is encoded as an extension of the the data one by setting the segment p_memsz > p_filesz. Signed-off-by: Laurent Vivier <laurent@vivier.eu> [PMD: Use recently added address_space_set()] Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: Stefano Garzarella <sgarzare@redhat.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20220115203725.3834712-3-laurent@vivier.eu>
* machine: Use host_memory_backend_is_mapped() in machine_consume_memdev()David Hildenbrand2022-01-181-1/+1
| | | | | | | | | | | | | | | | | | memory_region_is_mapped() is the wrong check, we actually want to check whether the backend is already marked mapped. For example, memory regions mapped via an alias, such as NVDIMMs, currently don't make memory_region_is_mapped() return "true". As the machine is initialized before any memory devices (and thereby before NVDIMMs are initialized), this isn't a fix but merely a cleanup. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Igor Mammedov <imammedo@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: Peter Xu <peterx@redhat.com> Signed-off-by: David Hildenbrand <david@redhat.com> Message-Id: <20211102164317.45658-2-david@redhat.com> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
* hw: Add compat machines for 7.0Cornelia Huck2022-01-051-0/+3
| | | | | | | | | | | | | Add 7.0 machine types for arm/i440fx/q35/s390x/spapr. Signed-off-by: Cornelia Huck <cohuck@redhat.com> Reviewed-by: Juan Quintela <quintela@redhat.com> Reviewed-by: Andrew Jones <drjones@redhat.com> Reviewed-by: Daniel P. Berrangé <berrange@redhat.com> Reviewed-by: Christian Borntraeger <borntraeger@de.ibm.com> Acked-by: Cédric Le Goater <clg@kaod.org> Message-Id: <20211217143948.289995-1-cohuck@redhat.com> Signed-off-by: Thomas Huth <thuth@redhat.com>
* hw/core/machine: Introduce CPU cluster topology supportYanan Wang2021-12-312-7/+22
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The new Cluster-Aware Scheduling support has landed in Linux 5.16, which has been proved to benefit the scheduling performance (e.g. load balance and wake_affine strategy) on both x86_64 and AArch64. So now in Linux 5.16 we have four-level arch-neutral CPU topology definition like below and a new scheduler level for clusters. struct cpu_topology { int thread_id; int core_id; int cluster_id; int package_id; int llc_id; cpumask_t thread_sibling; cpumask_t core_sibling; cpumask_t cluster_sibling; cpumask_t llc_sibling; } A cluster generally means a group of CPU cores which share L2 cache or other mid-level resources, and it is the shared resources that is used to improve scheduler's behavior. From the point of view of the size range, it's between CPU die and CPU core. For example, on some ARM64 Kunpeng servers, we have 6 clusters in each NUMA node, and 4 CPU cores in each cluster. The 4 CPU cores share a separate L2 cache and a L3 cache tag, which brings cache affinity advantage. In virtualization, on the Hosts which have pClusters (physical clusters), if we can design a vCPU topology with cluster level for guest kernel and have a dedicated vCPU pinning. A Cluster-Aware Guest kernel can also make use of the cache affinity of CPU clusters to gain similar scheduling performance. This patch adds infrastructure for CPU cluster level topology configuration and parsing, so that the user can specify cluster parameter if their machines support it. Signed-off-by: Yanan Wang <wangyanan55@huawei.com> Message-Id: <20211228092221.21068-3-wangyanan55@huawei.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> [PMD: Added '(since 7.0)' to @clusters in qapi/machine.json] Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
* hw/core: Rename smp_parse() -> machine_parse_smp_config()Philippe Mathieu-Daudé2021-12-312-3/+5
| | | | | | | | | | | | | | All methods related to MachineState are prefixed with "machine_". smp_parse() does not need to be an exception. Rename it and const'ify the SMPConfiguration argument, since it doesn't need to be modified. Reviewed-by: Andrew Jones <drjones@redhat.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Yanan Wang <wangyanan55@huawei.com> Tested-by: Yanan Wang <wangyanan55@huawei.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com> Message-Id: <20211216132015.815493-9-philmd@redhat.com>
* hw/qdev: Rename qdev_connect_gpio_out*() 'input_pin' parameterPhilippe Mathieu-Daudé2021-12-311-6/+7
| | | | | | | | | | @pin is an input where we connect a device output. Rename it @input_pin to simplify the documentation. Reviewed-by: Yanan Wang <wangyanan55@huawei.com> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20211218130437.1516929-5-f4bug@amsat.org> Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
* dma: Let dma_memory_read/write() take MemTxAttrs argumentPhilippe Mathieu-Daudé2021-12-301-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | Let devices specify transaction attributes when calling dma_memory_read() or dma_memory_write(). Patch created mechanically using spatch with this script: @@ expression E1, E2, E3, E4; @@ ( - dma_memory_read(E1, E2, E3, E4) + dma_memory_read(E1, E2, E3, E4, MEMTXATTRS_UNSPECIFIED) | - dma_memory_write(E1, E2, E3, E4) + dma_memory_write(E1, E2, E3, E4, MEMTXATTRS_UNSPECIFIED) ) Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Li Qiang <liq3ea@gmail.com> Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com> Acked-by: Stefan Hajnoczi <stefanha@redhat.com> Message-Id: <20211223115554.3155328-6-philmd@redhat.com>
* numa: Enable numa for SGX EPC sectionsYang Zhong2021-12-101-3/+2Star
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The basic SGX did not enable numa for SGX EPC sections, which result in all EPC sections located in numa node 0. This patch enable SGX numa function in the guest and the EPC section can work with RAM as one numa node. The Guest kernel related log: [ 0.009981] ACPI: SRAT: Node 0 PXM 0 [mem 0x180000000-0x183ffffff] [ 0.009982] ACPI: SRAT: Node 1 PXM 1 [mem 0x184000000-0x185bfffff] The SRAT table can normally show SGX EPC sections menory info in different numa nodes. The SGX EPC numa related command: ...... -m 4G,maxmem=20G \ -smp sockets=2,cores=2 \ -cpu host,+sgx-provisionkey \ -object memory-backend-ram,size=2G,host-nodes=0,policy=bind,id=node0 \ -object memory-backend-epc,id=mem0,size=64M,prealloc=on,host-nodes=0,policy=bind \ -numa node,nodeid=0,cpus=0-1,memdev=node0 \ -object memory-backend-ram,size=2G,host-nodes=1,policy=bind,id=node1 \ -object memory-backend-epc,id=mem1,size=28M,prealloc=on,host-nodes=1,policy=bind \ -numa node,nodeid=1,cpus=2-3,memdev=node1 \ -M sgx-epc.0.memdev=mem0,sgx-epc.0.node=0,sgx-epc.1.memdev=mem1,sgx-epc.1.node=1 \ ...... Signed-off-by: Yang Zhong <yang.zhong@intel.com> Message-Id: <20211101162009.62161-2-yang.zhong@intel.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
* hw/nvme: change nvme-ns 'shared' defaultKlaus Jensen2021-11-191-0/+1
| | | | | | | | Change namespaces to be shared namespaces by default (parameter shared=on). Keep shared=off for older machine types. Reviewed-by: Keith Busch <kbusch@kernel.org> Signed-off-by: Klaus Jensen <k.jensen@samsung.com>
* numa: avoid crash with SGX and "info numa"Paolo Bonzini2021-11-101-0/+7
| | | | | | | | | Add the MEMORY_DEVICE_INFO_KIND_SGX_EPC case, so that enclave memory is included in the output of "info numa" instead of crashing the monitor. Fixes: a7c565a941 ("sgx-epc: Add the fill_device_info() callback support", 2021-09-30) Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
* Fix virtio-net-pci* "vectors" compatEduardo Habkost2021-11-051-1/+1
| | | | | | | | | | | | | | | | hw_compat_5_2 has an issue: it affects only "virtio-net-pci" but not "virtio-net-pci-transitional" and "virtio-net-pci-non-transitional". The solution is to use the "virtio-net-pci-base" type in compat_props. Bugzilla: https://bugzilla.redhat.com/show_bug.cgi?id=1999141 Signed-off-by: Eduardo Habkost <ehabkost@redhat.com> Signed-off-by: Jean-Louis Dupond <jean-louis@dupond.be> Acked-by: Jason Wang <jasowang@redhat.com> Acked-by: Jean-Louis Dupond <jean-louis@dupond.be> Reviewed-by: Cornelia Huck <cohuck@redhat.com> Signed-off-by: Jason Wang <jasowang@redhat.com>
* Merge remote-tracking branch ↵Richard Henderson2021-11-031-0/+3
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | 'remotes/vivier/tags/trivial-branch-for-6.2-pull-request' into staging Trivial patches branch pull request 20211101 v2 # gpg: Signature made Tue 02 Nov 2021 07:21:44 PM EDT # gpg: using RSA key CD2F75DDC8E3A4DC2E4F5173F30C38BD3F2FBE3C # gpg: issuer "laurent@vivier.eu" # gpg: Good signature from "Laurent Vivier <lvivier@redhat.com>" [full] # gpg: aka "Laurent Vivier <laurent@vivier.eu>" [full] # gpg: aka "Laurent Vivier (Red Hat) <lvivier@redhat.com>" [full] * remotes/vivier/tags/trivial-branch-for-6.2-pull-request: hw/input/lasips2: Fix typos in function names MAINTAINERS: Split HPPA TCG vs HPPA machines/hardware hw/core/machine: Add the missing delimiter in cpu_slot_to_string() monitor: Trim some trailing space from human-readable output Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
| * hw/core/machine: Add the missing delimiter in cpu_slot_to_string()Yanan Wang2021-10-311-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | The expected output string from cpu_slot_to_string() ought to be like "socket-id: *, die-id: *, core-id: *, thread-id: *", so add the missing ", " before "die-id". This affects the readability of the error message. Fixes: 176d2cda0d ("i386/cpu: Consolidate die-id validity in smp context") Signed-off-by: Yanan Wang <wangyanan55@huawei.com> Reviewed-by: Laurent Vivier <laurent@vivier.eu> Message-Id: <20211008075040.18028-1-wangyanan55@huawei.com> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
* | qapi: introduce x-query-numa QMP commandDaniel P. Berrangé2021-11-022-35/+40
| | | | | | | | | | | | | | | | | | | | | | This is a counterpart to the HMP "info numa" command. It is being added with an "x-" prefix because this QMP command is intended as an adhoc debugging tool and will thus not be modelled in QAPI as fully structured data, nor will it have long term guaranteed stability. The existing HMP command is rewritten to call the QMP command. Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Signed-off-by: Daniel P. Berrangé <berrange@redhat.com>
* | qapi: introduce x-query-roms QMP commandDaniel P. Berrangé2021-11-021-17/+22
| | | | | | | | | | | | | | | | | | | | | | This is a counterpart to the HMP "info roms" command. It is being added with an "x-" prefix because this QMP command is intended as an adhoc debugging tool and will thus not be modelled in QAPI as fully structured data, nor will it have long term guaranteed stability. The existing HMP command is rewritten to call the QMP command. Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Signed-off-by: Daniel P. Berrangé <berrange@redhat.com>
* | monitor: make hmp_handle_error return a booleanDaniel P. Berrangé2021-11-021-2/+1Star
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This turns the pattern if (err) { hmp_handle_error(mon, err); return; } into if (hmp_handle_error(mon, err)) { return; } Reviewed-by: Dr. David Alan Gilbert <dgilbert@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Signed-off-by: Daniel P. Berrangé <berrange@redhat.com>
* | machine: remove the done notifier for dynamic sysbus device type checkDamien Hedde2021-11-011-27/+0Star
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Now that we check sysbus device types during device creation, we can remove the check in the machine init done notifier. This was the only thing done by this notifier, so we remove the whole sysbus_notifier structure of the MachineState. Note: This notifier was checking all /peripheral and /peripheral-anon sysbus devices. Now we only check those added by -device cli option or device_add qmp command when handling the command/option. So if there are some devices added in one of these containers manually (eg in machine C code), these will not be checked anymore. This use case does not seem to appear apart from hw/xen/xen-legacy-backend.c (it uses qdev_set_id() and in this case, not for a sysbus device, so it's ok). Signed-off-by: Damien Hedde <damien.hedde@greensocs.com> Acked-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Acked-by: Eduardo Habkost <ehabkost@redhat.com> Message-Id: <20211029142258.484907-4-damien.hedde@greensocs.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
* | machine: add device_type_is_dynamic_sysbus functionDamien Hedde2021-11-011-3/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Right now the allowance check for adding a sysbus device using -device cli option (or device_add qmp command) is done well after the device has been created. It is done during the machine init done notifier: machine_init_notify() in hw/core/machine.c This new function will allow us to do the check at the right time and issue an error if it fails. Also make device_is_dynamic_sysbus() use the new function. Signed-off-by: Damien Hedde <damien.hedde@greensocs.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Acked-by: Eduardo Habkost <ehabkost@redhat.com> Message-Id: <20211029142258.484907-2-damien.hedde@greensocs.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
* | hw/core/machine: Split out the smp parsing codeYanan Wang2021-11-013-159/+182
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We are going to introduce an unit test for the parser smp_parse() in hw/core/machine.c, but now machine.c is only built in softmmu. In order to solve the build dependency on the smp parsing code and avoid building unrelated stuff for the unit tests, move the tested code from machine.c into a separate file, i.e., machine-smp.c and build it in common field. Signed-off-by: Yanan Wang <wangyanan55@huawei.com> Reviewed-by: Andrew Jones <drjones@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com> Message-Id: <20211026034659.22040-2-wangyanan55@huawei.com> Acked-by: Eduardo Habkost <ehabkost@redhat.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
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