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* hw/misc/empty_slot: Name the slots when createdPhilippe Mathieu-Daudé2020-06-091-1/+1
| | | | | | | | | Directly set the slot name when creating the device, to display the device name in trace events. Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Acked-by: Artyom Tarasenko <atar4qemu@gmail.com> Message-Id: <20200510152840.13558-8-f4bug@amsat.org>
* hw/misc/empty_slot: Move the 'hw/misc' and cover in MAINTAINERSPhilippe Mathieu-Daudé2020-06-091-1/+1
| | | | | | | | Add an entry for the 'empty_slot' device. Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Acked-by: Artyom Tarasenko <atar4qemu@gmail.com> Message-Id: <20200510152840.13558-7-f4bug@amsat.org>
* hw/mips: fuloong2e: Set preferred page size to 16KBHuacai Chen2020-06-011-0/+1
| | | | | | | | | | | Loongson processor prefers 16KB page size in system emulator, so let's define mc->minimum_page_bits to 14. Cc: Jiaxun Yang <jiaxun.yang@flygoat.com> Signed-off-by: Huacai Chen <chenhc@lemote.com> Reviewed-by: Aleksandar Markovic <aleksandar.qemu.devel@gmail.com> Signed-off-by: Aleksandar Markovic <aleksandar.qemu.devel@gmail.com> Message-Id: <1586337380-25217-2-git-send-email-chenhc@lemote.com>
* hw/mips: Add CPU IRQ3 delivery for KVMHuacai Chen2020-06-011-1/+1
| | | | | | | | | | | | Currently, KVM/MIPS only deliver I/O interrupt via IP2, this patch add IP3 delivery as well, because Loongson-3 based machine use both IRQ2 (CPU's IP2) and IRQ3 (CPU's IP3). Signed-off-by: Huacai Chen <chenhc@lemote.com> Co-developed-by: Jiaxun Yang <jiaxun.yang@flygoat.com> Reviewed-by: Aleksandar Markovic <aleksandar.qemu.devel@gmail.com> Signed-off-by: Aleksandar Markovic <aleksandar.qemu.devel@gmail.com> Message-Id: <1588501221-1205-4-git-send-email-chenhc@lemote.com>
* Merge remote-tracking branch 'remotes/armbru/tags/pull-error-2020-05-27' ↵Peter Maydell2020-05-282-19/+13Star
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | into staging Error reporting patches for 2020-05-27 # gpg: Signature made Wed 27 May 2020 06:48:02 BST # gpg: using RSA key 354BC8B3D7EB2A6B68674E5F3870B400EB918653 # gpg: issuer "armbru@redhat.com" # gpg: Good signature from "Markus Armbruster <armbru@redhat.com>" [full] # gpg: aka "Markus Armbruster <armbru@pond.sub.org>" [full] # Primary key fingerprint: 354B C8B3 D7EB 2A6B 6867 4E5F 3870 B400 EB91 8653 * remotes/armbru/tags/pull-error-2020-05-27: i386: Fix x86_cpu_load_model() error API violation arm/sabrelite: Consistently use &error_fatal in sabrelite_init() mips/boston: Plug memory leak in boston_mach_init() mips/boston: Fix boston_mach_init() error handling mips/malta: Fix create_cps() error handling error: Use error_reportf_err() where appropriate tests/migration: Tighten error checking s390x/cpumodel: Fix harmless misuse of visit_check_struct() xen: Fix and improve handling of device_add usb-host errors nvdimm: Plug memory leak in uuid property setter Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
| * mips/boston: Plug memory leak in boston_mach_init()Markus Armbruster2020-05-271-2/+2
| | | | | | | | | | | | | | | | | | Fixes: df1d8a1f29f567567b9d20be685a4241282e7005 Cc: Paul Burton <pburton@wavecomp.com> Cc: Aleksandar Rikalo <aleksandar.rikalo@rt-rk.com> Signed-off-by: Markus Armbruster <armbru@redhat.com> Message-Id: <20200505101908.6207-9-armbru@redhat.com> Reviewed-by: Aleksandar Markovic <aleksandar.qemu.devel@gmail.com>
| * mips/boston: Fix boston_mach_init() error handlingMarkus Armbruster2020-05-271-8/+5Star
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The Error ** argument must be NULL, &error_abort, &error_fatal, or a pointer to a variable containing NULL. Passing an argument of the latter kind twice without clearing it in between is wrong: if the first call sets an error, it no longer points to NULL for the second call. boston_mach_init() is wrong that way. The last calls treats an error as fatal. Do that for the prior ones, too. Fixes: df1d8a1f29f567567b9d20be685a4241282e7005 Cc: Paul Burton <pburton@wavecomp.com> Cc: Aleksandar Rikalo <aleksandar.rikalo@rt-rk.com> Signed-off-by: Markus Armbruster <armbru@redhat.com> Message-Id: <20200505101908.6207-8-armbru@redhat.com> Reviewed-by: Aleksandar Markovic <aleksandar.qemu.devel@gmail.com>
| * mips/malta: Fix create_cps() error handlingMarkus Armbruster2020-05-271-9/+6Star
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The Error ** argument must be NULL, &error_abort, &error_fatal, or a pointer to a variable containing NULL. Passing an argument of the latter kind twice without clearing it in between is wrong: if the first call sets an error, it no longer points to NULL for the second create_cps() is wrong that way. The last calls treats an error as fatal. Do that for the prior ones, too. Fixes: bff384a4fbd5d0e86939092e74e766ef0f5f592c Cc: Aleksandar Markovic <aleksandar.qemu.devel@gmail.com> Cc: "Philippe Mathieu-Daudé" <philmd@redhat.com> Cc: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: Markus Armbruster <armbru@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Tested-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20200505101908.6207-7-armbru@redhat.com> Reviewed-by: Aleksandar Markovic <aleksandar.qemu.devel@gmail.com>
* | hw/mips/mips_int: De-duplicate KVM interrupt deliveryPhilippe Mathieu-Daudé2020-05-261-8/+3Star
| | | | | | | | | | | | | | | | Refactor duplicated code in a single place. Reviewed-by: Thomas Huth <thuth@redhat.com> Message-Id: <20200429082916.10669-2-f4bug@amsat.org> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
* | hw/mips/malta: Add some logging for bad register offset casesAleksandar Markovic2020-05-261-8/+6Star
| | | | | | | | | | | | | | | | | | | | | | | | Log the cases where a guest attempts read or write using bad register offset. Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Tested-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: Aleksandar Markovic <aleksandar.qemu.devel@gmail.com> Message-id: <20200518200920.17344-21-aleksandar.qemu.devel@gmail.com> [PMD: Replaced TARGET_FMT_lx by HWADDR_PRIX] Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
* | hw/mips: Rename malta/mipssim/r4k/jazz filesAleksandar Markovic2020-05-265-4/+4
| | | | | | | | | | | | | | | | | | | | Machine file names should not have prefix "mips_". Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: Aleksandar Markovic <aleksandar.qemu.devel@gmail.com> Message-id: <20200518200920.17344-22-aleksandar.qemu.devel@gmail.com> [PMD: Fixed Fuloong line conflict due to rebase] Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
* | hw/mips/fuloong2e: Fix typo in Fuloong machine namePhilippe Mathieu-Daudé2020-05-263-22/+23
| | | | | | | | | | | | | | | | | | | | | | We always miswrote the Fuloong machine... Fix its name. Add an machine alias to the previous name for backward compatibility. Suggested-by: Aleksandar Markovic <amarkovic@wavecomp.com> Reviewed-by: Aleksandar Markovic <aleksandar.qemu.devel@gmail.com> Message-id: <20200526104726.11273-11-f4bug@amsat.org> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
* | hw/mips/fuloong2e: Move code and update a commentPhilippe Mathieu-Daudé2020-05-261-3/+2Star
| | | | | | | | | | | | | | | | | | Move the RAM-related call closer to the RAM creation block, rename the ROM comment. Reviewed-by: Huacai Chen <chenhc@lemote.com> Message-id: <20200510210128.18343-4-f4bug@amsat.org> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
* | hw/pci-host: Use CONFIG_PCI_BONITO to select the Bonito North BridgePhilippe Mathieu-Daudé2020-05-261-0/+1
|/ | | | | | | | | | | Ease the kconfig selection by introducing CONFIG_PCI_BONITO to select the Bonito North Bridge. Reviewed-by: Aleksandar Markovic <amarkovic@wavecomp.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com> Message-id: <20200510210128.18343-6-f4bug@amsat.org> Reviewed-by: Huacai Chen <chenhc@lemote.com> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
* hw/mips/mips_fulong2e: Remove unused 'audio/audio.h' includePhilippe Mathieu-Daudé2020-05-261-1/+0Star
| | | | | | | | | The Fuloong machine never had to use "audio/audio.h", remove it. Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Huacai Chen <chenhc@lemote.com> Message-id: 20200515084209.9419-1-f4bug@amsat.org Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
* smbus: Fix spd_data_generate() error API violationMarkus Armbruster2020-04-291-8/+2Star
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The Error ** argument must be NULL, &error_abort, &error_fatal, or a pointer to a variable containing NULL. Passing an argument of the latter kind twice without clearing it in between is wrong: if the first call sets an error, it no longer points to NULL for the second call. spd_data_generate() can pass @errp to error_setg() more than once when it adjusts both memory size and type. Harmless, because no caller passes anything that needs adjusting. Until the previous commit, sam460ex passed types that needed adjusting, but not sizes. spd_data_generate()'s contract is rather awkward: If everything's fine, return non-null and don't set an error. Else, if memory size or type need adjusting, return non-null and set an error describing the adjustment. Else, return null and set an error reporting why no data can be generated. Its callers treat the error as a warning even when null is returned. They don't create the "smbus-eeprom" device then. Suspicious. Since the previous commit, only "everything's fine" can actually happen. Drop the unused code and simplify the callers. This gets rid of the error API violation. Signed-off-by: Markus Armbruster <armbru@redhat.com> Message-Id: <20200422134815.1584-3-armbru@redhat.com>
* hw/ide: Remove unneeded inclusion of hw/ide.hBALATON Zoltan2020-03-171-1/+0Star
| | | | | | | | | | | After previous clean ups we can drop direct inclusion of hw/ide.h from several places. Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu> Reviewed-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Reviewed-by: Markus Armbruster <armbru@redhat.com> Message-id: a3f72b663e537701c63cec5fc9cb8ed4f4249f28.1584457537.git.balaton@eik.bme.hu Signed-off-by: John Snow <jsnow@redhat.com>
* hw/ide: Move MAX_IDE_DEVS define to hw/ide/internal.hBALATON Zoltan2020-03-171-0/+1
| | | | | | | | | | | We can move this define now that less files use it to internal.h to further reduce dependency on hw/ide.h. Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu> Reviewed-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Reviewed-by: Markus Armbruster <armbru@redhat.com> Message-id: e68675d2f6252f229cf788b7cd163bb76fa3e26b.1584457537.git.balaton@eik.bme.hu Signed-off-by: John Snow <jsnow@redhat.com>
* hw/ide: Do ide_drive_get() within pci_ide_create_devs()BALATON Zoltan2020-03-172-4/+2Star
| | | | | | | | | | | | The pci_ide_create_devs() function takes a hd_table parameter but all callers just pass what ide_drive_get() returns so we can do it locally simplifying callers and removing hd_table parameter. Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu> Reviewed-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Reviewed-by: Markus Armbruster <armbru@redhat.com> Message-id: e9713fdded4d212fa68ed03b844e531934226a6f.1584457537.git.balaton@eik.bme.hu Signed-off-by: John Snow <jsnow@redhat.com>
* ide/via: Get rid of via_ide_init()BALATON Zoltan2020-03-171-1/+4
| | | | | | | | | | | | Follow example of CMD646 and remove via_ide_init function and do it directly in board code instead. Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu> Reviewed-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Tested-by: BALATON Zoltan <balaton@eik.bme.hu> Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Message-id: 20200313082444.2439-3-mark.cave-ayland@ilande.co.uk Signed-off-by: John Snow <jsnow@redhat.com>
* hw: Make MachineClass::is_default a boolean typePhilippe Mathieu-Daudé2020-02-281-1/+1
| | | | | | | | | | | | There's no good reason for it to be type int, change it to bool. Suggested-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com> Message-Id: <20200207161948.15972-3-philmd@redhat.com> Reviewed-by: Marc-André Lureau <marcandre.lureau@redhat.com> Reviewed-by: Laurent Vivier <laurent@vivier.eu> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
* hw/mips: Use memory_region_init_rom() with read-only regionsPhilippe Mathieu-Daudé2020-02-274-10/+5Star
| | | | | | | | | This commit was produced with the Coccinelle script scripts/coccinelle/memory-region-housekeeping.cocci. Reviewed-by: Aleksandar Markovic <amarkovic@wavecomp.com> Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com> Message-Id: <20200224205533.23798-8-philmd@redhat.com>
* hw/mips/mips_int: Simplify cpu_mips_irq_init_cpu()Philippe Mathieu-Daudé2020-02-271-1/+1
| | | | | | | | | | | Since commit d8ed887bdc, the cpu_mips_irq_request handler takes a pointer to MIPSCPU in its opaque argument. Directly pass the cpu pointer. Reviewed-by: Aleksandar Markovic <amarkovic@wavecomp.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com> Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com> Message-Id: <20200221162011.26383-1-philmd@redhat.com>
* mips/mips_r4k: use memdev for RAMIgor Mammedov2020-02-191-8/+4Star
| | | | | | | | | | | | | | memory_region_allocate_system_memory() API is going away, so replace it with memdev allocated MemoryRegion. The later is initialized by generic code, so board only needs to opt in to memdev scheme by providing MachineClass::default_ram_id and using MachineState::ram instead of manually initializing RAM memory region. Signed-off-by: Igor Mammedov <imammedo@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Message-Id: <20200219160953.13771-58-imammedo@redhat.com>
* mips/mips_mipssim: use memdev for RAMIgor Mammedov2020-02-191-6/+3Star
| | | | | | | | | | | | | | | memory_region_allocate_system_memory() API is going away, so replace it with memdev allocated MemoryRegion. The later is initialized by generic code, so board only needs to opt in to memdev scheme by providing MachineClass::default_ram_id and using MachineState::ram instead of manually initializing RAM memory region. Signed-off-by: Igor Mammedov <imammedo@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com> Message-Id: <20200219160953.13771-57-imammedo@redhat.com>
* mips/mips_malta: use memdev for RAMIgor Mammedov2020-02-191-6/+4Star
| | | | | | | | | | | | | | | memory_region_allocate_system_memory() API is going away, so replace it with memdev allocated MemoryRegion. The later is initialized by generic code, so board only needs to opt in to memdev scheme by providing MachineClass::default_ram_id and using MachineState::ram instead of manually initializing RAM memory region. Signed-off-by: Igor Mammedov <imammedo@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com> Message-Id: <20200219160953.13771-56-imammedo@redhat.com>
* mips/mips_jazz: add max ram size checkIgor Mammedov2020-02-191-0/+5
| | | | | | | | | error out in case user asked for more RAM than board supports. Signed-off-by: Igor Mammedov <imammedo@redhat.com> Reviewed-by: Philippe Mathieu-Daude <philmd@redhat.com> Message-Id: <20200219160953.13771-55-imammedo@redhat.com>
* mips/mips_jazz: use memdev for RAMIgor Mammedov2020-02-191-4/+3Star
| | | | | | | | | | | | | | memory_region_allocate_system_memory() API is going away, so replace it with memdev allocated MemoryRegion. The later is initialized by generic code, so board only needs to opt in to memdev scheme by providing MachineClass::default_ram_id and using MachineState::ram instead of manually initializing RAM memory region. Signed-off-by: Igor Mammedov <imammedo@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Message-Id: <20200219160953.13771-54-imammedo@redhat.com>
* mips/mips_fulong2e: use memdev for RAMIgor Mammedov2020-02-191-4/+2Star
| | | | | | | | | | | | | | memory_region_allocate_system_memory() API is going away, so replace it with memdev allocated MemoryRegion. The later is initialized by generic code, so board only needs to opt in to memdev scheme by providing MachineClass::default_ram_id and using MachineState::ram instead of manually initializing RAM memory region. Signed-off-by: Igor Mammedov <imammedo@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Message-Id: <20200219160953.13771-53-imammedo@redhat.com>
* mips/mips_fulong2e: drop RAM size fixupIgor Mammedov2020-02-191-5/+8
| | | | | | | | | | | | | | If user provided non-sense RAM size, board will complain and continue running with max RAM size supported. Also RAM is going to be allocated by generic code, so it won't be possible for board to fix things up for user. Make it error message and exit to force user fix CLI, instead of accepting non-sense CLI values. Signed-off-by: Igor Mammedov <imammedo@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Message-Id: <20200219160953.13771-52-imammedo@redhat.com>
* mips/boston: use memdev for RAMIgor Mammedov2020-02-191-6/+5Star
| | | | | | | | | | | | | | | memory_region_allocate_system_memory() API is going away, so replace it with memdev allocated MemoryRegion. The later is initialized by generic code, so board only needs to opt in to memdev scheme by providing MachineClass::default_ram_id and using MachineState::ram instead of manually initializing RAM memory region. Signed-off-by: Igor Mammedov <imammedo@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com> Message-Id: <20200219160953.13771-51-imammedo@redhat.com>
* hw/core/loader: Let load_elf() populate a field with CPU-specific flagsAleksandar Markovic2020-01-294-4/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | While loading the executable, some platforms (like AVR) need to detect CPU type that executable is built for - and, with this patch, this is enabled by reading the field 'e_flags' of the ELF header of the executable in question. The change expands functionality of the following functions: - load_elf() - load_elf_as() - load_elf_ram() - load_elf_ram_sym() The argument added to these functions is called 'pflags' and is of type 'uint32_t*' (that matches 'pointer to 'elf_word'', 'elf_word' being the type of the field 'e_flags', in both 32-bit and 64-bit variants of ELF header). Callers are allowed to pass NULL as that argument, and in such case no lookup to the field 'e_flags' will happen, and no information will be returned, of course. CC: Richard Henderson <rth@twiddle.net> CC: Peter Maydell <peter.maydell@linaro.org> CC: Edgar E. Iglesias <edgar.iglesias@gmail.com> CC: Michael Walle <michael@walle.cc> CC: Thomas Huth <huth@tuxfamily.org> CC: Laurent Vivier <laurent@vivier.eu> CC: Philippe Mathieu-Daudé <f4bug@amsat.org> CC: Aleksandar Rikalo <aleksandar.rikalo@rt-rk.com> CC: Aurelien Jarno <aurelien@aurel32.net> CC: Jia Liu <proljc@gmail.com> CC: David Gibson <david@gibson.dropbear.id.au> CC: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> CC: BALATON Zoltan <balaton@eik.bme.hu> CC: Christian Borntraeger <borntraeger@de.ibm.com> CC: Thomas Huth <thuth@redhat.com> CC: Artyom Tarasenko <atar4qemu@gmail.com> CC: Fabien Chouteau <chouteau@adacore.com> CC: KONRAD Frederic <frederic.konrad@adacore.com> CC: Max Filippov <jcmvbkbc@gmail.com> Reviewed-by: Aleksandar Rikalo <aleksandar.rikalo@rt-rk.com> Signed-off-by: Michael Rolnik <mrolnik@gmail.com> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com> Message-Id: <1580079311-20447-24-git-send-email-aleksandar.markovic@rt-rk.com>
* qdev: set properties with device_class_set_props()Marc-André Lureau2020-01-241-1/+1
| | | | | | | | | | | | | | | | | | | | | The following patch will need to handle properties registration during class_init time. Let's use a device_class_set_props() setter. spatch --macro-file scripts/cocci-macro-file.h --sp-file ./scripts/coccinelle/qdev-set-props.cocci --keep-comments --in-place --dir . @@ typedef DeviceClass; DeviceClass *d; expression val; @@ - d->props = val + device_class_set_props(d, val) Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Message-Id: <20200110153039.1379601-20-marcandre.lureau@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
* Merge remote-tracking branch 'remotes/bonzini/tags/for-upstream' into stagingPeter Maydell2020-01-102-2/+2
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * Compat machines fix (Denis) * Command line parsing fixes (Michal, Peter, Xiaoyao) * Cooperlake CPU model fixes (Xiaoyao) * i386 gdb fix (mkdolata) * IOEventHandler cleanup (Philippe) * icount fix (Pavel) * RR support for random number sources (Pavel) * Kconfig fixes (Philippe) # gpg: Signature made Wed 08 Jan 2020 10:41:00 GMT # gpg: using RSA key BFFBD25F78C7AE83 # gpg: Good signature from "Paolo Bonzini <bonzini@gnu.org>" [full] # gpg: aka "Paolo Bonzini <pbonzini@redhat.com>" [full] # Primary key fingerprint: 46F5 9FBD 57D6 12E7 BFD4 E2F7 7E15 100C CD36 69B1 # Subkey fingerprint: F133 3857 4B66 2389 866C 7682 BFFB D25F 78C7 AE83 * remotes/bonzini/tags/for-upstream: (38 commits) chardev: Use QEMUChrEvent enum in IOEventHandler typedef chardev: use QEMUChrEvent instead of int chardev/char: Explicit we ignore some QEMUChrEvent in IOEventHandler monitor/hmp: Explicit we ignore a QEMUChrEvent in IOEventHandler monitor/qmp: Explicit we ignore few QEMUChrEvent in IOEventHandler virtio-console: Explicit we ignore some QEMUChrEvent in IOEventHandler vhost-user-blk: Explicit we ignore few QEMUChrEvent in IOEventHandler vhost-user-net: Explicit we ignore few QEMUChrEvent in IOEventHandler vhost-user-crypto: Explicit we ignore some QEMUChrEvent in IOEventHandler ccid-card-passthru: Explicit we ignore QEMUChrEvent in IOEventHandler hw/usb/redirect: Explicit we ignore few QEMUChrEvent in IOEventHandler hw/usb/dev-serial: Explicit we ignore few QEMUChrEvent in IOEventHandler hw/char/terminal3270: Explicit ignored QEMUChrEvent in IOEventHandler hw/ipmi: Explicit we ignore some QEMUChrEvent in IOEventHandler hw/ipmi: Remove unnecessary declarations target/i386: Add missed features to Cooperlake CPU model target/i386: Add new bit definitions of MSR_IA32_ARCH_CAPABILITIES target/i386: Fix handling of k_gs_base register in 32-bit mode in gdbstub hw/rtc/mc146818: Add missing dependency on ISA Bus hw/nvram/Kconfig: Restrict CHRP NVRAM to machines using OpenBIOS or SLOF ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
| * chardev: Use QEMUChrEvent enum in IOEventHandler typedefPhilippe Mathieu-Daudé2020-01-082-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The Chardev events are listed in the QEMUChrEvent enum. By using the enum in the IOEventHandler typedef we: - make the IOEventHandler type more explicit (this handler process out-of-band information, while the IOReadHandler is in-band), - help static code analyzers. This patch was produced with the following spatch script: @match@ expression backend, opaque, context, set_open; identifier fd_can_read, fd_read, fd_event, be_change; @@ qemu_chr_fe_set_handlers(backend, fd_can_read, fd_read, fd_event, be_change, opaque, context, set_open); @depends on match@ identifier opaque, event; identifier match.fd_event; @@ static -void fd_event(void *opaque, int event) +void fd_event(void *opaque, QEMUChrEvent event) { ... } Then the typedef was modified manually in include/chardev/char-fe.h. Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com> Acked-by: Corey Minyard <cminyard@mvista.com> Acked-by: Cornelia Huck <cohuck@redhat.com> Reviewed-by: Marc-André Lureau <marcandre.lureau@redhat.com> Message-Id: <20191218172009.8868-15-philmd@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
* | mips/cps: fix setting saar propertyMarc-André Lureau2020-01-071-1/+1
| | | | | | | | | | | | | | | | | | | | | | There is no "saar" property. Note: I haven't been able to test this code. Help welcome. May fix commit 043715d1e0fbb3e3411be3f898c5b77b7f90327a ("target/mips: Update ITU to utilize SAARI and SAAR CP0 registers") Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Reviewed-by: Aleksandar Markovic <amarkovic@wavecomp.com>
* | dp8393x: replace PROP_PTR with PROP_LINKMarc-André Lureau2020-01-071-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Link property is the correct way to pass a MemoryRegion to a device for DMA purposes. Sidenote: as a sysbus device, this remains non-usercreatable even though we can drop the specific flag here. Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: Laurent Vivier <laurent@vivier.eu> Tested-by: Laurent Vivier <laurent@vivier.eu>
* | mips: use sysbus_mmio_get_region() instead of internal fieldsMarc-André Lureau2020-01-071-1/+2
| | | | | | | | | | | | | | | | | | | | | | Register the memory region with sysbus_init_mmio() and look it up with sysbus_mmio_get_region() to avoid accessing internal device fields. Suggested-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Aleksandar Markovic <amarkovic@wavecomp.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
* | mips: use sysbus_add_io()Marc-André Lureau2020-01-071-2/+1Star
| | | | | | | | | | | | | | | | | | | | | | sysbus devices should use the associated helper function instead of calling memory_region_add_subregion() manually. This simplifies slightly the code. Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Aleksandar Markovic <amarkovic@wavecomp.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
* | mips: baudbase is 115200 by defaultMarc-André Lureau2020-01-071-1/+0Star
| | | | | | | | | | | | | | | | (The default value is set for TYPE_SERIAL in serial_properties) Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Aleksandar Markovic <amarkovic@wavecomp.com>
* | mips: inline serial_init()Marc-André Lureau2020-01-071-3/+12
| | | | | | | | | | | | | | | | | | | | | | The function is specific to mipssim, let's inline it. (when inlining, we use a DeviceState variable instead of SerialIO, as it is the most common type used, and avoids having too many casts) Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: Aleksandar Markovic <amarkovic@wavecomp.com>
* | serial: start making SerialMM a sysbus deviceMarc-André Lureau2020-01-072-2/+2
|/ | | | | | | | | | | Memory mapped serial device is in fact a sysbus device. The following patches will make use of sysbus facilities for resource and registration. In particular, "serial-mm: use sysbus facilities" will move internal serial realization to serial_mm_realize callback to follow qdev best practices. Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
* hw: replace hw/i386/pc.h with a header just for the i8259Paolo Bonzini2019-12-174-4/+4
| | | | | | | | Remove the need to include i386/pc.h to get to the i8259 functions. This is enough to remove the inclusion of hw/i386/pc.h from all non-x86 files. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
* hw/mips: Deprecate the r4k machinePhilippe Mathieu-Daudé2019-12-161-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The r4k machine was introduced in 2005 (6af0bf9c7) and its last logical change was in 2005 (9542611a6). After that, one can count 164 maintenance commits (QEMU API changes) with the exception of 1 fix in 2015 (memory leak, commit 3ad9fd5a). This machine was introduced as a proof of concept to run a MIPS CPU. Two years later, the Malta machine was added (commit 5856de80), modeling a real platform. Note also this machine has no specification except 5 lines in the header of this file: * emulates a simple machine with ISA-like bus. * ISA IO space mapped to the 0x14000000 (PHYS) and * ISA memory at the 0x10000000 (PHYS, 16Mb in size). * All peripherial devices are attached to this "bus" with * the standard PC ISA addresses. The Linux kernel support for this machine has been dropped more than 10 years ago in commit 302922e5. It is time to deprecate this obsolete machine. Users are recommended to use the Malta board, and its hardware is well documented. Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com> Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com> Reviewed-by: Aleksandar Markovic <amarkovic@wavecomp.com> Acked-by: Aurelien Jarno <aurelien@aurel32.net> Message-Id: <20191125104103.28962-1-philmd@redhat.com>
* mips: r4000: Renovate coding styleFilip Bozuta2019-12-161-21/+34
| | | | | | | | | | | | | | | | The script checkpatch.pl located in scripts folder was used to detect all errors and warrnings in file: hw/mips/mips_r4k.c This mips r4000 machine file was edited and all the errors and warrings generated by the checkpatch.pl script were corrected and then the script was ran again to make sure there are no more errors and warnings. Signed-off-by: Filip Bozuta <Filip.Bozuta@rt-rk.com> Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com> Reviewed-by: Aleksandar Markovic <amarkovic@wavecomp.com> Message-Id: <1575640687-20744-5-git-send-email-Filip.Bozuta@rt-rk.com>
* mips: malta: Renovate coding styleFilip Bozuta2019-12-161-85/+87
| | | | | | | | | | | | | | | | | | The script checkpatch.pl located in scripts folder was used to detect all errors and warrnings in files: hw/mips/mips_malta.c hw/mips/gt64xxx_pci.c tests/acceptance/linux_ssh_mips_malta.py All these mips malta machine files were edited and all the errors and warrings generated by the checkpatch.pl script were corrected and then the script was ran again to make sure there are no more errors and warnings. Signed-off-by: Filip Bozuta <Filip.Bozuta@rt-rk.com> Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com> Reviewed-by: Aleksandar Markovic <amarkovic@wavecomp.com> Message-Id: <1575640687-20744-3-git-send-email-Filip.Bozuta@rt-rk.com>
* mips: jazz: Renovate coding styleFilip Bozuta2019-12-161-13/+19
| | | | | | | | | | | | | | | | | | The script checkpatch.pl located in scripts folder was used to detect all errors and warrnings in files: hw/mips/mips_jazz.c hw/display/jazz_led.c hw/dma/rc4030.c All these mips jazz machine files were edited and all the errors and warrings generated by the checkpatch.pl script were corrected and then the script was ran again to make sure there are no more errors and warnings. Signed-off-by: Filip Bozuta <Filip.Bozuta@rt-rk.com> Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com> Reviewed-by: Aleksandar Markovic <amarkovic@wavecomp.com> Message-Id: <1575640687-20744-2-git-send-email-Filip.Bozuta@rt-rk.com>
* hw/mips/gt64xxx: Remove dynamic field width from trace eventsPhilippe Mathieu-Daudé2019-11-192-10/+10
| | | | | | | | | | | | | | | | | Since not all trace backends support dynamic field width in format (dtrace via stap does not), replace by a static field width instead. We previously passed to the trace API 'width << 1' as the number of hex characters to display (the dynamic field width). We don't need this anymore. Instead, display the size of bytes accessed. Fixes: ab6bff424f ("gt64xxx_pci: Convert debug printf to trace events") Reported-by: Eric Blake <eblake@redhat.com> Reviewed-by: Eric Blake <eblake@redhat.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Buglink: https://bugs.launchpad.net/qemu/+bug/1844817 Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
* hw/pci-host/piix: Define and use the PIIX IRQ Route Control RegistersPhilippe Mathieu-Daudé2019-11-051-2/+2
| | | | | | | | | | The IRQ Route Control registers definitions belong to the PIIX chipset. We were only defining the 'A' register. Define the other B, C and D registers, and use them. Acked-by: Paul Durrant <paul@xen.org> Reviewed-by: Aleksandar Markovic <amarkovic@wavecomp.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
* hw/isa/piix4: Move piix4_create() to hw/isa/piix4.cPhilippe Mathieu-Daudé2019-11-052-28/+1Star
| | | | | | | | | Now that we properly refactored the piix4_create() function, let's move it to hw/isa/piix4.c where it belongs, so it can be reused on other places. Reviewed-by: Aleksandar Markovic <amarkovic@wavecomp.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
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