| Commit message (Collapse) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | hw/riscv: Move sifive_e_prci model to hw/misc | Bin Meng | 2020-09-10 | 1 | -0/+125 |
| This is an effort to clean up the hw/riscv directory. Ideally it should only contain the RISC-V SoC / machine codes plus generic codes. Let's move sifive_e_prci model to hw/misc directory. Signed-off-by: Bin Meng <bin.meng@windriver.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-Id: <1599129623-68957-2-git-send-email-bmeng.cn@gmail.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com> | |||||
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index : bwlp/qemu.git | |
| Experimental fork of QEMU with video encoding patches | OpenSLX |
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