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* hw/ppc/ppc405_uc: Drop use of ppcuic_init()Peter Maydell2021-01-193-33/+47
| | | | | | | | | | | | | | | | | | | Switch the ppc405_uc boards to directly creating and configuring the UIC, rather than doing it via the old ppcuic_init() helper function. We retain the API feature of ppc405ep_init() where it passes back something allowing the callers to wire up devices to the UIC if they need to, even though neither of the callsites currently makes use of this ability -- instead of passing back the qemu_irq array we pass back the UIC DeviceState. This fixes a trivial Coverity-detected memory leak where we were leaking the array of IRQs returned by ppcuic_init(). Fixes: Coverity CID 1421922 Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Message-Id: <20210108171212.16500-4-peter.maydell@linaro.org> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
* hw/ppc: Delete unused ppc405cr_init() codePeter Maydell2021-01-192-351/+0Star
| | | | | | | | | | | | The function ppc405cr_init() has apparently been unused since it was added in commit 8ecc7913525ecb in 2007. Remove this dead code, so we don't have to convert it away from using ppcuic_init(). Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Message-Id: <20210108171212.16500-3-peter.maydell@linaro.org> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
* hw/ppc/sam460ex: Drop use of ppcuic_init()Peter Maydell2021-01-191-16/+53
| | | | | | | | | Switch the sam460ex board to directly creating and configuring the UIC, rather than doing it via the old ppcuic_init() helper function. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Message-Id: <20210108171212.16500-2-peter.maydell@linaro.org> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
* macio: move OpenPIC inside macio-newworld deviceMark Cave-Ayland2021-01-131-14/+11Star
| | | | | | | | | | | | The OpenPIC device is located within the macio device on real hardware so make it a child of the macio-newworld device. This also removes the need for setting and checking a separate PIC object property link on the macio-newworld device which currently causes the automated QOM introspection tests to fail. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Reviewed-by: David Gibson <david@gibson.dropbear.id.au> Message-Id: <20201229175619.6051-6-mark.cave-ayland@ilande.co.uk> Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
* mac_newworld: delay wiring of PCI IRQs in New World machineMark Cave-Ayland2021-01-131-20/+26
| | | | | | | | | | In order to move the OpenPIC device to the macio device, the PCI bus needs to be initialised before the macio device and also before wiring the OpenPIC IRQs. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Reviewed-by: David Gibson <david@gibson.dropbear.id.au> Message-Id: <20201229175619.6051-5-mark.cave-ayland@ilande.co.uk> Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
* macio: move heathrow PIC inside macio-oldworld deviceMark Cave-Ayland2021-01-131-34/+32Star
| | | | | | | | | | | | The heathrow PIC is located within the macio device on real hardware so make it a child of the macio-oldworld device. This also removes the need for setting and checking a separate PIC object property link on the macio-oldworld device which currently causes the automated QOM introspection tests to fail. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Reviewed-by: David Gibson <david@gibson.dropbear.id.au> Message-Id: <20201229175619.6051-4-mark.cave-ayland@ilande.co.uk> Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
* mac_oldworld: move initialisation of grackle before heathrowMark Cave-Ayland2021-01-131-15/+15
| | | | | | | | | | In order to move the heathrow PIC to the macio device, the PCI bus needs to be initialised before the macio device and also before wiring the PIC IRQs. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Reviewed-by: David Gibson <david@gibson.dropbear.id.au> Message-Id: <20201229175619.6051-3-mark.cave-ayland@ilande.co.uk> Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
* mac_oldworld: remove duplicate bus check for PPC_INPUT(env)Mark Cave-Ayland2021-01-131-6/+0Star
| | | | | | | | | | This condition will have already been caught when wiring the heathrow PIC IRQs to the CPU. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Reviewed-by: David Gibson <david@gibson.dropbear.id.au> Message-Id: <20201229175619.6051-2-mark.cave-ayland@ilande.co.uk> Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
* Merge remote-tracking branch 'remotes/dg-gitlab/tags/ppc-for-6.0-20210106' ↵Peter Maydell2021-01-0610-355/+189Star
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | into staging ppc patch queue 2021-01-06 First pull request for 2021, which has a bunch of things accumulated over the holidays. Includes: * A number of cleanups to sam460ex and ppc440 code from BALATON Zoltan * Several fixes for builds with --without-default-devices from Greg Kurz * Fixes for some DRC reset problems from Greg Kurz * QOM conversion of the PPC 4xx UIC devices from Peter Maydell * Some other assorted fixes and cleanups # gpg: Signature made Wed 06 Jan 2021 03:33:19 GMT # gpg: using RSA key 75F46586AE61A66CC44E87DC6C38CACA20D9B392 # gpg: Good signature from "David Gibson <david@gibson.dropbear.id.au>" [full] # gpg: aka "David Gibson (Red Hat) <dgibson@redhat.com>" [full] # gpg: aka "David Gibson (ozlabs.org) <dgibson@ozlabs.org>" [full] # gpg: aka "David Gibson (kernel.org) <dwg@kernel.org>" [unknown] # Primary key fingerprint: 75F4 6586 AE61 A66C C44E 87DC 6C38 CACA 20D9 B392 * remotes/dg-gitlab/tags/ppc-for-6.0-20210106: (22 commits) ppc440_pcix: Fix up pci config access ppc440_pcix: Fix register write trace event ppc440_pcix: Improve comment for IRQ mapping sam460ex: Remove FDT_PPC dependency from KConfig ppc4xx: Move common dependency on serial to common option pnv: Fix reverse dependency on PCI express root ports ppc: Simplify reverse dependencies of POWERNV and PSERIES on XICS and XIVE ppc: Fix build with --without-default-devices spapr: Add drc_ prefix to the DRC realize and unrealize functions spapr: Use spapr_drc_reset_all() at machine reset spapr: Introduce spapr_drc_reset_all() spapr: Fix reset of transient DR connectors spapr: Call spapr_drc_reset() for all DRCs at CAS spapr: Fix buffer overflow in spapr_numa_associativity_init() spapr: Allow memory unplug to always succeed spapr: Fix DR properties of the root node spapr/xive: Make spapr_xive_pic_print_info() static spapr: DRC lookup cannot fail hw/ppc/ppc440_bamboo: Drop use of ppcuic_init() hw/ppc/virtex_ml507: Drop use of ppcuic_init() ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
| * ppc440_pcix: Fix up pci config accessBALATON Zoltan via2021-01-061-15/+22
| | | | | | | | | | | | | | | | | | | | | | | | This fixes a long standing issue with MorphOS booting on sam460ex which turns out to be because of suspicious values written to PCI config address that apparently works on real machine but caused wrong access on this device model. This replaces a previous work around for this with a better fix that makes it work. Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu> Message-Id: <6fd215ab2bc5f8d4455cd20ed1a2f059e4415fe5.1609636173.git.balaton@eik.bme.hu> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
| * ppc440_pcix: Fix register write trace eventBALATON Zoltan via2021-01-062-1/+2
| | | | | | | | | | | | | | | | | | | | The trace event for pci_host_config_write() was also using the trace event for read. Add corresponding trace and correct this. Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu> Message-Id: <a6c7dcf7153cc537123ed8ceac060f2f64a883cb.1609636173.git.balaton@eik.bme.hu> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
| * ppc440_pcix: Improve comment for IRQ mappingBALATON Zoltan via2021-01-061-2/+9
| | | | | | | | | | | | | | | | | | | | The code mapping all PCI interrupts to a single CPU IRQ works but is not trivial so document it in a comment. Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu> Message-Id: <c25c0310510672b58466e795fd701e65e8f1ff97.1609636173.git.balaton@eik.bme.hu> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
| * sam460ex: Remove FDT_PPC dependency from KConfigBALATON Zoltan via2021-01-061-1/+0Star
| | | | | | | | | | | | | | | | | | | | | | Dependency on FDT_PPC was added in commit b0048f76095 ("hw/ppc/Kconfig: Only select FDT helper for machines using it") but it does not seem to be really necessary so remove it again. Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <7461a20b129a912aeacdb9ad115a55f0b84c8726.1609636173.git.balaton@eik.bme.hu> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
| * ppc4xx: Move common dependency on serial to common optionBALATON Zoltan via2021-01-061-4/+1Star
| | | | | | | | | | | | | | | | | | All machines that select SERIAL also select PPC4XX so we can just add this common dependency there once. Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu> Message-Id: <94f1eb7cfb7f315bd883d825f3ce7e0cfc2f2b69.1609636173.git.balaton@eik.bme.hu> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
| * pnv: Fix reverse dependency on PCI express root portsGreg Kurz2021-01-061-2/+1Star
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | qemu-system-ppc64 built with --without-default-devices crashes: Type 'pnv-phb4-root-port' is missing its parent 'pcie-root-port-base' Aborted (core dumped) Have POWERNV to select PCIE_PORT. This is done through a new PCI_POWERNV config in hw/pci-host/Kconfig since POWERNV doesn't have a direct dependency on PCI. For this reason, PCI_EXPRESS and MSI_NONBROKEN are also moved under PCI_POWERNV. Signed-off-by: Greg Kurz <groug@kaod.org> Reviewed-by: Cédric Le Goater <clg@kaod.org> Message-Id: <160883058299.253005.342913177952681375.stgit@bahia.lan> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
| * ppc: Simplify reverse dependencies of POWERNV and PSERIES on XICS and XIVEGreg Kurz2021-01-061-12/+2Star
| | | | | | | | | | | | | | | | | | | | | | Have PSERIES to select XICS and XIVE, and directly check PSERIES in hw/intc/meson.build to enable build of the XICS and XIVE sPAPR backends, like POWERNV already does. This allows to get rid of the intermediate XICS_SPAPR and XIVE_SPAPR. Signed-off-by: Greg Kurz <groug@kaod.org> Message-Id: <160883057560.253005.4206568349917633920.stgit@bahia.lan> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
| * ppc: Fix build with --without-default-devicesGreg Kurz2021-01-061-5/+0Star
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Linking of the qemu-system-ppc64 fails on a POWER9 host when --without-default-devices is passed to configure: $ ./configure --without-default-devices \ --target-list=ppc64-softmmu && make ... libqemu-ppc64-softmmu.fa.p/hw_ppc_e500.c.o: In function `ppce500_init_mpic_kvm': /home/greg/Work/qemu/qemu-ppc/build/../hw/ppc/e500.c:777: undefined reference to `kvm_openpic_connect_vcpu' libqemu-ppc64-softmmu.fa.p/hw_ppc_spapr_irq.c.o: In function `spapr_irq_check': /home/greg/Work/qemu/qemu-ppc/build/../hw/ppc/spapr_irq.c:189: undefined reference to `xics_kvm_has_broken_disconnect' libqemu-ppc64-softmmu.fa.p/hw_intc_spapr_xive.c.o: In function `spapr_xive_post_load': /home/greg/Work/qemu/qemu-ppc/build/../hw/intc/spapr_xive.c:530: undefined reference to `kvmppc_xive_post_load' ... and tons of other symbols belonging to the KVM backend of the openpic, XICS and XIVE interrupt controllers. It turns out that OPENPIC_KVM, XICS_KVM and XIVE_KVM are marked to depend on KVM but this has no effect when minikconf runs in allnoconfig mode. Such reverse dependencies should rather be handled with a 'select' statement, eg. config OPENPIC select OPENPIC_KVM if KVM or even better by getting rid of the intermediate _KVM config and directly checking CONFIG_KVM in the meson.build file: specific_ss.add(when: ['CONFIG_KVM', 'CONFIG_OPENPIC'], if_true: files('openpic_kvm.c')) Go for the latter with OPENPIC, XICS and XIVE. This went unnoticed so far because CI doesn't test the build with --without-default-devices and KVM enabled on a POWER host. Signed-off-by: Greg Kurz <groug@kaod.org> Message-Id: <160883056791.253005.14924294027763955653.stgit@bahia.lan> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
| * spapr: Add drc_ prefix to the DRC realize and unrealize functionsGreg Kurz2021-01-061-6/+6
| | | | | | | | | | | | | | | | | | | | | | Use a less generic name for an easier experience with tools such as cscope or grep. Signed-off-by: Greg Kurz <groug@kaod.org> Message-Id: <20201218103400.689660-6-groug@kaod.org> Reviewed-by: Daniel Henrique Barboza <danielhb413@gmail.com> Tested-by: Daniel Henrique Barboza <danielhb413@gmail.com> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
| * spapr: Use spapr_drc_reset_all() at machine resetGreg Kurz2021-01-061-14/+1Star
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Documentation of object_child_foreach_recursive() clearly stipulates that "it is forbidden to add or remove children from @obj from the @fn callback". But this is exactly what we do during machine reset. The call to spapr_drc_reset() can finalize the hot-unplug sequence of a PHB or a PCI bridge, both of which will then in turn destroy their PCI DRCs. This could potentially invalidate the iterator used by do_object_child_foreach(). It is pure luck that this haven't caused any issues so far. Use spapr_drc_reset_all() since it can cope with DRC removal. Signed-off-by: Greg Kurz <groug@kaod.org> Message-Id: <20201218103400.689660-5-groug@kaod.org> Reviewed-by: Daniel Henrique Barboza <danielhb413@gmail.com> Tested-by: Daniel Henrique Barboza <danielhb413@gmail.com> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
| * spapr: Introduce spapr_drc_reset_all()Greg Kurz2021-01-062-34/+37
| | | | | | | | | | | | | | | | | | | | No need to expose the way DRCs are traversed outside of spapr_drc.c. Signed-off-by: Greg Kurz <groug@kaod.org> Message-Id: <20201218103400.689660-4-groug@kaod.org> Reviewed-by: Daniel Henrique Barboza <danielhb413@gmail.com> Tested-by: Daniel Henrique Barboza <danielhb413@gmail.com> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
| * spapr: Fix reset of transient DR connectorsGreg Kurz2021-01-062-2/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Documentation of object_property_iter_init() clearly stipulates that "it is forbidden to modify the property list while iterating". But this is exactly what we do when resetting transient DR connectors during CAS. The call to spapr_drc_reset() can finalize the hot-unplug sequence of a PHB or a PCI bridge, both of which will then in turn destroy their PCI DRCs. This could potentially invalidate the iterator. It is pure luck that this haven't caused any issues so far. Change spapr_drc_reset() to return true if it caused a device to be removed. Restart from scratch in this case. This can potentially increase the overall DRC reset time, especially with a high maxmem which generates a lot of LMB DRCs. But this kind of setup is rare, and so is the use case of rebooting a guest while doing hot-unplug. Signed-off-by: Greg Kurz <groug@kaod.org> Message-Id: <20201218103400.689660-3-groug@kaod.org> Reviewed-by: Daniel Henrique Barboza <danielhb413@gmail.com> Tested-by: Daniel Henrique Barboza <danielhb413@gmail.com> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
| * spapr: Call spapr_drc_reset() for all DRCs at CASGreg Kurz2021-01-062-9/+6Star
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Non-transient DRCs are either in the empty or the ready state, which means spapr_drc_reset() doesn't change their state. It is thus not needed to do any checking. Call spapr_drc_reset() unconditionally and squash spapr_drc_transient() into its only user, spapr_drc_needed(). Signed-off-by: Greg Kurz <groug@kaod.org> Message-Id: <20201218103400.689660-2-groug@kaod.org> Reviewed-by: Daniel Henrique Barboza <danielhb413@gmail.com> Tested-by: Daniel Henrique Barboza <danielhb413@gmail.com> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
| * spapr: Allow memory unplug to always succeedGreg Kurz2021-01-062-2/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | It is currently impossible to hot-unplug a memory device between machine reset and CAS. (qemu) device_del dimm1 Error: Memory hot unplug not supported for this guest This limitation was introduced in order to provide an explicit error path for older guests that didn't support hot-plug event sources (and thus memory hot-unplug). The linux kernel has been supporting these since 4.11. All recent enough guests are thus capable of handling the removal of a memory device at all time, including during early boot. Lift the limitation for the latest machine type. This means that trying to unplug memory from a guest that doesn't support it will likely just do nothing and the memory will only get removed at next reboot. Such older guests can still get the existing behavior by using an older machine type. Signed-off-by: Greg Kurz <groug@kaod.org> Message-Id: <160794035064.23292.17560963281911312439.stgit@bahia.lan> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
| * spapr: Fix DR properties of the root nodeGreg Kurz2021-01-062-9/+18
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Section 13.5.2 of LoPAPR mandates various DR related indentifiers for all hot-pluggable entities to be exposed in the "ibm,drc-indexes", "ibm,drc-power-domains", "ibm,drc-names" and "ibm,drc-types" properties of their parent node. These properties are created with spapr_dt_drc(). PHBs and LMBs are both children of the machine. Their DR identifiers are thus supposed to be exposed in the afore mentioned properties of the root node. When PHB hot-plug support was added, an extra call to spapr_dt_drc() was introduced: this overwrites the existing properties, previously populated with the LMB identifiers, and they end up containing only PHB identifiers. This went unseen so far because linux doesn't care, but this is still not conformant with LoPAPR. Fortunately spapr_dt_drc() is able to handle multiple DR entity types at the same time. Use that to handle DR indentifiers for PHBs and LMBs with a single call to spapr_dt_drc(). While here also account for PMEM DR identifiers, which were forgotten when NVDIMM hot-plug support was added. Also add an assert to prevent further misuse of spapr_dt_drc(). With -m 1G,maxmem=2G,slots=8 passed on the QEMU command line we get: Without this patch: /proc/device-tree/ibm,drc-indexes 0000001f 20000001 20000002 20000003 20000000 20000005 20000006 20000007 20000004 20000009 20000008 20000010 20000011 20000012 20000013 20000014 20000015 20000016 20000017 20000018 20000019 2000000a 2000000b 2000000c 2000000d 2000000e 2000000f 2000001a 2000001b 2000001c 2000001d 2000001e These are the DRC indexes for the 31 possible PHBs. With this patch: /proc/device-tree/ibm,drc-indexes 0000002b 90000000 90000001 90000002 90000003 90000004 90000005 90000006 90000007 20000001 20000002 20000003 20000000 20000005 20000006 20000007 20000004 20000009 20000008 20000010 20000011 20000012 20000013 20000014 20000015 20000016 20000017 20000018 20000019 2000000a 2000000b 2000000c 2000000d 2000000e 2000000f 2000001a 2000001b 2000001c 2000001d 2000001e 80000004 80000005 80000006 80000007 And now we also have the 4 ((2G - 1G) / 256M) LMBs and the 8 (slots) PMEMs. Fixes: 3998ccd09298 ("spapr: populate PHB DRC entries for root DT node") Signed-off-by: Greg Kurz <groug@kaod.org> Message-Id: <160794479566.35245.17809158217760761558.stgit@bahia.lan> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
| * spapr: DRC lookup cannot failGreg Kurz2021-01-061-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | All memory DRC objects are created during machine init. It is thus safe to assume spapr_drc_by_id() cannot return NULL when hot-plug/unplugging memory. Make this clear with an assertion, like the code already does a few lines above when looping over memory DRCs. This fixes Coverity reports 1437757 and 1437758. Signed-off-by: Greg Kurz <groug@kaod.org> Message-Id: <160805381160.228955.5388294067094240175.stgit@bahia.lan> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
| * hw/ppc/ppc440_bamboo: Drop use of ppcuic_init()Peter Maydell2021-01-061-11/+27
| | | | | | | | | | | | | | | | | | Switch the bamboo board to directly creating and configuring the UIC, rather than doing it via the old ppcuic_init() helper function. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Message-Id: <20201212001537.24520-5-peter.maydell@linaro.org> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
| * hw/ppc/virtex_ml507: Drop use of ppcuic_init()Peter Maydell2021-01-061-5/+16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Switch the virtex_ml507 board to directly creating and configuring the UIC, rather than doing it via the old ppcuic_init() helper function. This fixes a trivial Coverity-detected memory leak where we were leaking the array of IRQs returned by ppcuic_init(). Fixes: Coverity CID 1421992 Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Message-Id: <20201212001537.24520-4-peter.maydell@linaro.org> Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Tested-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
| * ppc: Convert PPC UIC to a QOM devicePeter Maydell2021-01-062-237/+31Star
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently the PPC UIC ("Universal Interrupt Controller") is implemented as a non-QOM device in ppc4xx_devs.c. Convert it to a proper QOM device in hw/intc. The ppcuic_init() function is retained for the moment with its current interface; in subsequent commits this will be tidied up to avoid the allocation of an irq array. This conversion adds VMState support. It leaves the LOG_UIC() macro as-is to maximise the extent to which this is simply code-movement rather than a rewrite (in new code it would be better to use tracepoints). The default property values for dcr-base and use-vectors are set to match those use by most of our boards with a UIC. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Message-Id: <20201212001537.24520-3-peter.maydell@linaro.org> Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Tested-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
| * hw/ppc/ppc4xx_devs: Make code style fixes to UIC codePeter Maydell2021-01-061-10/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | In a following commit we will move the PPC UIC implementation to its own file in hw/intc. To prevent checkpatch complaining about that code-motion, fix up the minor style issues first. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Message-Id: <20201212001537.24520-2-peter.maydell@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Tested-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Reviewed-by: Thomas Huth <thuth@redhat.com> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
* | hw: Use the PCI_SLOT() macro from 'hw/pci/pci.h'Philippe Mathieu-Daudé2021-01-041-1/+1
|/ | | | | | | | | | | We already have a generic PCI_SLOT() macro in "hw/pci/pci.h" to extract the PCI slot identifier, use it. Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Acked-by: Paul Durrant <paul@xen.org> Acked-by: David Gibson <david@gibson.dropbear.id.au> Acked-by: Michael S. Tsirkin <mst@redhat.com> Message-Id: <20201012124506.3406909-5-philmd@redhat.com>
* qdev: Move softmmu properties to qdev-properties-system.hEduardo Habkost2020-12-181-0/+1
| | | | | | | | | | | Move the property types and property macros implemented in qdev-properties-system.c to a new qdev-properties-system.h header. Signed-off-by: Eduardo Habkost <ehabkost@redhat.com> Reviewed-by: Igor Mammedov <imammedo@redhat.com> Message-Id: <20201211220529.2290218-16-ehabkost@redhat.com> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
* vl: make qemu_get_machine_opts staticPaolo Bonzini2020-12-152-4/+3Star
| | | | | | | Machine options can be retrieved as properties of the machine object. Encourage that by removing the "easy" accessor to machine options. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
* ppc/spapr: cleanup -machine pseries,nvdimm=X handlingIgor Mammedov2020-12-152-13/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | Since NVDIMM support was introduced on pseries machine, it ignored machine's nvdimm=on|off option and effectively was always enabled on machines that support NVDIMM. Later on commit (28f5a716212 ppc/spapr_nvdimm: do not enable support with 'nvdimm=off') makes QEMU error out in case user explicitly set 'nvdimm=off' on CLI by peeking at machine_opts. However that's a workaround and leaves 'nvdimms_state->is_enabled' in inconsistent state (false) when it should be set true by default. Instead of using on machine_opts, set default to true for pseries machine in initfn time. If user sets manually 'nvdimm=off' it will overwrite default value to false and QEMU will error as expected without need to peek into machine_opts. That way pseries will have, nvdimm enabled by default and will honor user provided 'nvdimm=on|off'. Signed-off-by: Igor Mammedov <imammedo@redhat.com> Message-Id: <20201208164606.4109134-1-imammedo@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
* spapr.c: set a 'kvm-type' default value instead of relying on NULLDaniel Henrique Barboza2020-12-141-4/+17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | spapr_kvm_type() is considering 'vm_type=NULL' as a valid input, where the function returns 0. This is relying on the current QEMU machine options handling logic, where the absence of the 'kvm-type' option will be reflected as 'vm_type=NULL' in this function. This is not robust, and will break if QEMU options code decides to propagate something else in the case mentioned above (e.g. an empty string instead of NULL). Let's avoid this entirely by setting a non-NULL default value in case of no user input for 'kvm-type'. spapr_kvm_type() was changed to handle 3 fixed values of kvm-type: "auto", "hv", and "pr", with "auto" being the default if no kvm-type was set by the user. This allows us to always be predictable regardless of any enhancements/changes made in QEMU options mechanics. While we're at it, let's also document in 'kvm-type' description the already existing default mode, now named 'auto'. The information provided about it is based on how the pseries kernel handles the KVM_CREATE_VM ioctl(), where the default value '0' makes the kernel choose an available KVM module to use, giving precedence to kvm_hv. This logic is described in the kernel source file arch/powerpc/kvm/powerpc.c, function kvm_arch_init_vm(). Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com> Message-Id: <20201210145517.1532269-2-danielhb413@gmail.com> Signed-off-by: David Gibson <david@gibson.dropbear.id.au> Reviewed-by: Greg Kurz <groug@kaod.org>
* spapr: Pass sPAPR machine state to some RTAS events handling functionsGreg Kurz2020-12-141-11/+10Star
| | | | | | | | | | Some functions in hw/ppc/spapr_events.c get a pointer to the machine state using qdev_get_machine(). Convert them to get it from their caller when possible. Signed-off-by: Greg Kurz <groug@kaod.org> Message-Id: <20201209170052.1431440-6-groug@kaod.org> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
* spapr: Don't use qdev_get_machine() in spapr_msi_write()Greg Kurz2020-12-141-1/+1
| | | | | | | | | | | | | spapr_phb_realize() passes the sPAPR machine state as opaque data for the I/O callbacks: memory_region_init_io(&sphb->msiwindow, OBJECT(sphb), &spapr_msi_ops, spapr, ^^^^^ "msi", msi_window_size); Signed-off-by: Greg Kurz <groug@kaod.org> Message-Id: <20201209170052.1431440-5-groug@kaod.org> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
* spapr: Pass sPAPR machine state down to spapr_pci_switch_vga()Greg Kurz2020-12-142-5/+5
| | | | | | | | This allows to drop a user of qdev_get_machine(). Signed-off-by: Greg Kurz <groug@kaod.org> Message-Id: <20201209170052.1431440-4-groug@kaod.org> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
* ppc/e500: Free irqs array to avoid memleakGan Qixin2020-12-141-0/+1
| | | | | | | | | | | | | | | | | | | | When running qom-test, a memory leak occurred in the ppce500_init function, this patch free irqs array to fix it. ASAN shows memory leak stack: Direct leak of 40 byte(s) in 1 object(s) allocated from: #0 0xfffc5ceee1f0 in __interceptor_calloc (/lib64/libasan.so.5+0xee1f0) #1 0xfffc5c806800 in g_malloc0 (/lib64/libglib-2.0.so.0+0x56800) #2 0xaaacf9999244 in ppce500_init qemu/hw/ppc/e500.c:859 #3 0xaaacf97434e8 in machine_run_board_init qemu/hw/core/machine.c:1134 #4 0xaaacf9c9475c in qemu_init qemu/softmmu/vl.c:4369 #5 0xaaacf94785a0 in main qemu/softmmu/main.c:49 Reported-by: Euler Robot <euler.robot@huawei.com> Signed-off-by: Gan Qixin <ganqixin@huawei.com> Message-Id: <20201204075822.359832-1-ganqixin@huawei.com> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
* hw/ppc: Do not re-read the clock on pre_save if doing savevmGreg Kurz2020-12-141-2/+3
| | | | | | | | | | | | | | | | A guest with enough RAM, eg. 128G, is likely to detect savevm downtime and to complain about stalled CPUs. This happens because we re-read the timebase just before migrating it and we thus don't account for all the time between VM stop and pre-save. A very similar situation was already addressed for live migration of paused guests (commit d14f33976282). Extend the logic to do the same with savevm. Fixes: https://bugzilla.redhat.com/show_bug.cgi?id=1893787 Signed-off-by: Greg Kurz <groug@kaod.org> Message-Id: <160693010619.1111945.632640981169395440.stgit@bahia.lan> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
* spapr: spapr_drc_attach() cannot failGreg Kurz2020-12-144-11/+7Star
| | | | | | | | | | All users are passing &error_abort already. Document the fact that spapr_drc_attach() should only be passed a free DRC, which is supposedly the case if appropriate checking is done earlier. Signed-off-by: Greg Kurz <groug@kaod.org> Message-Id: <20201201113728.885700-5-groug@kaod.org> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
* spapr: Simplify error path of spapr_core_plug()Greg Kurz2020-12-141-11/+10Star
| | | | | | | | | | | | | | spapr_core_pre_plug() already guarantees that the slot for the given core ID is available. It is thus safe to assume that spapr_find_cpu_slot() returns a slot during plug. Turn the error path into an assertion. It is also safe to assume that no device is attached to the corresponding DRC and that spapr_drc_attach() shouldn't fail. Pass &error_abort to spapr_drc_attach() and simplify error handling. Signed-off-by: Greg Kurz <groug@kaod.org> Message-Id: <20201201113728.885700-4-groug@kaod.org> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
* spapr: Abort if ppc_set_compat() fails for hot-plugged CPUsGreg Kurz2020-12-141-6/+4Star
| | | | | | | | | | | | | | | | | | | | | | | | | | | | When a CPU is hot-plugged, we set its compat mode to match the boot CPU, which was either set by machine reset or by CAS. This is currently handled in the plug handler after the core got realized. Potential errors of ppc_set_compat() are propagated to the hot-plug logic. Handling errors this late in the hot-plug sequence is generally frown upon. Ideally, we should do sanity checks in a pre-plug handler and pass &error_abort to ppc_set_compat() in the plug handler. We can filter out some error cases of ppc_set_compat() by calling ppc_check_compat() at pre-plug. But ppc_set_compat() also sets the compat register in KVM, and KVM doesn't provide any API that would allow to check valid compat mode settings beforehand. However, at this point we know that the compat mode was already successfully set for the boot CPU. Since this all boils down to setting a register with the very same value that was valid for the boot CPU, it should definitely not fail for hot-plugged CPUS. Pass &error_abort to ppc_set_compat(). Signed-off-by: Greg Kurz <groug@kaod.org> Message-Id: <20201201113728.885700-3-groug@kaod.org> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
* spapr: Fix pre-2.10 dummy ICP hackGreg Kurz2020-12-141-7/+7
| | | | | | | | | | | | | | | | | | | This hack registers dummy VMState entries of ICPs in order to support migration of old pseries machine types that used to create all smp.max_cpus possible ICPs at machine init. Part of the work is to unregister the dummy entries when plugging an actual vCPU core, and to register them back when unplugging the core. The code that unregisters the dummy ICPs in spapr_core_plug() is misplaced: if ppc_set_compat() fails afterwards, the hotplug operation will be cancelled and the dummy ICPs won't be registered back since the unplug handler isn't called. Unregister the dummy ICPs at the end of spapr_core_plug(). Signed-off-by: Greg Kurz <groug@kaod.org> Message-Id: <20201201113728.885700-2-groug@kaod.org> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
* hw/ppc/spapr_tpm_proxy: Fix hexadecimal format string specifierPhilippe Mathieu-Daudé2020-12-141-1/+1
| | | | | | | | | | | | The '%u' conversion specifier is for decimal notation. When prefixing a format with '0x', we want the hexadecimal specifier ('%x'). Inspired-by: Dov Murik <dovmurik@linux.vnet.ibm.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com> Message-Id: <20201103112558.2554390-4-philmd@redhat.com> Reviewed-by: Greg Kurz <groug@kaod.org> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
* ppc: Add a missing break for PPC6xx_INPUT_TBENChen Qun2020-12-141-0/+1
| | | | | | | | | | | | | | | | | | | | When using -Wimplicit-fallthrough in our CFLAGS, the compiler showed warning: hw/ppc/ppc.c: In function ‘ppc6xx_set_irq’: hw/ppc/ppc.c:118:16: warning: this statement may fall through [-Wimplicit-fallthrough=] 118 | if (level) { | ^ hw/ppc/ppc.c:123:9: note: here 123 | case PPC6xx_INPUT_INT: | ^~~~ According to the discussion, a break statement needs to be added here. Reported-by: Euler Robot <euler.robot@huawei.com> Signed-off-by: Chen Qun <kuhn.chenqun@huawei.com> Reviewed-by: Thomas Huth <thuth@redhat.com> Acked-by: David Gibson <david@gibson.dropbear.id.au> Message-Id: <20201116024810.2415819-7-kuhn.chenqun@huawei.com> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
* spapr: Do TPM proxy hotplug sanity checks at pre-plugGreg Kurz2020-12-141-5/+18
| | | | | | | | | | | | There can be only one TPM proxy at a time. This is currently checked at plug time. But this can be detected at pre-plug in order to error out earlier. This allows to get rid of error handling in the plug handler. Signed-off-by: Greg Kurz <groug@kaod.org> Message-Id: <20201120234208.683521-9-groug@kaod.org> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
* spapr: Do PHB hoplug sanity check at pre-plugGreg Kurz2020-12-141-6/+11
| | | | | | | | | | | | We currently detect that a PHB index is already in use at plug time. But this can be decteted at pre-plug in order to error out earlier. This allows to pass &error_abort to spapr_drc_attach() and to end up with a plug handler that doesn't need to report errors anymore. Signed-off-by: Greg Kurz <groug@kaod.org> Message-Id: <20201120234208.683521-8-groug@kaod.org> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
* spapr: Make PHB placement functions and spapr_pre_plug_phb() return statusGreg Kurz2020-12-141-17/+23
| | | | | | | | | | Read documentation in "qapi/error.h" and changelog of commit e3fe3988d785 ("error: Document Error API usage rules") for rationale. Signed-off-by: Greg Kurz <groug@kaod.org> Message-Id: <20201120234208.683521-7-groug@kaod.org> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
* spapr: Do NVDIMM/PC-DIMM device hotplug sanity checks at pre-plug onlyGreg Kurz2020-12-142-32/+19Star
| | | | | | | | | | | | | | | Pre-plug of a memory device, be it an NVDIMM or a PC-DIMM, ensures that the memory slot is available and that addresses don't overlap with existing memory regions. The corresponding DRCs in the LMB and PMEM namespaces are thus necessarily attachable at plug time. Pass &error_abort to spapr_drc_attach() in spapr_add_lmbs() and spapr_add_nvdimm(). This allows to greatly simplify error handling on the plug path. Signed-off-by: Greg Kurz <groug@kaod.org> Message-Id: <20201120234208.683521-3-groug@kaod.org> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
* spapr: Do PCI device hotplug sanity checks at pre-plug onlyGreg Kurz2020-12-141-10/+33
| | | | | | | | | | | | | | | | | | | | | The PHB acts as the hotplug handler for PCI devices. It does some sanity checks on DR enablement, PCI bridge chassis numbers and multifunction. These checks are currently performed at plug time, but they would best sit in a pre-plug handler in order to error out as early as possible. Create a spapr_pci_pre_plug() handler and move all the checking there. Add a check that the associated DRC doesn't already have an attached device. This is equivalent to the slot availability check performed by do_pci_register_device() upon realization of the PCI device. This allows to pass &error_abort to spapr_drc_attach() and to end up with a plug handler that doesn't need to report errors anymore. Signed-off-by: Greg Kurz <groug@kaod.org> Message-Id: <20201120234208.683521-2-groug@kaod.org> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
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