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* qom: Drop parameter @errp of object_property_add() & friendsMarkus Armbruster2020-05-151-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The only way object_property_add() can fail is when a property with the same name already exists. Since our property names are all hardcoded, failure is a programming error, and the appropriate way to handle it is passing &error_abort. Same for its variants, except for object_property_add_child(), which additionally fails when the child already has a parent. Parentage is also under program control, so this is a programming error, too. We have a bit over 500 callers. Almost half of them pass &error_abort, slightly fewer ignore errors, one test case handles errors, and the remaining few callers pass them to their own callers. The previous few commits demonstrated once again that ignoring programming errors is a bad idea. Of the few ones that pass on errors, several violate the Error API. The Error ** argument must be NULL, &error_abort, &error_fatal, or a pointer to a variable containing NULL. Passing an argument of the latter kind twice without clearing it in between is wrong: if the first call sets an error, it no longer points to NULL for the second call. ich9_pm_add_properties(), sparc32_ledma_realize(), sparc32_dma_realize(), xilinx_axidma_realize(), xilinx_enet_realize() are wrong that way. When the one appropriate choice of argument is &error_abort, letting users pick the argument is a bad idea. Drop parameter @errp and assert the preconditions instead. There's one exception to "duplicate property name is a programming error": the way object_property_add() implements the magic (and undocumented) "automatic arrayification". Don't drop @errp there. Instead, rename object_property_add() to object_property_try_add(), and add the obvious wrapper object_property_add(). Signed-off-by: Markus Armbruster <armbru@redhat.com> Reviewed-by: Eric Blake <eblake@redhat.com> Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Message-Id: <20200505152926.18877-15-armbru@redhat.com> [Two semantic rebase conflicts resolved]
* hw/ide: Do ide_drive_get() within pci_ide_create_devs()BALATON Zoltan2020-03-171-5/+1Star
| | | | | | | | | | | | The pci_ide_create_devs() function takes a hd_table parameter but all callers just pass what ide_drive_get() returns so we can do it locally simplifying callers and removing hd_table parameter. Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu> Reviewed-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Reviewed-by: Markus Armbruster <armbru@redhat.com> Message-id: e9713fdded4d212fa68ed03b844e531934226a6f.1584457537.git.balaton@eik.bme.hu Signed-off-by: John Snow <jsnow@redhat.com>
* hw: Make MachineClass::is_default a boolean typePhilippe Mathieu-Daudé2020-02-281-1/+1
| | | | | | | | | | | | There's no good reason for it to be type int, change it to bool. Suggested-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com> Message-Id: <20200207161948.15972-3-philmd@redhat.com> Reviewed-by: Marc-André Lureau <marcandre.lureau@redhat.com> Reviewed-by: Laurent Vivier <laurent@vivier.eu> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
* hw/core/loader: Let load_elf() populate a field with CPU-specific flagsAleksandar Markovic2020-01-291-2/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | While loading the executable, some platforms (like AVR) need to detect CPU type that executable is built for - and, with this patch, this is enabled by reading the field 'e_flags' of the ELF header of the executable in question. The change expands functionality of the following functions: - load_elf() - load_elf_as() - load_elf_ram() - load_elf_ram_sym() The argument added to these functions is called 'pflags' and is of type 'uint32_t*' (that matches 'pointer to 'elf_word'', 'elf_word' being the type of the field 'e_flags', in both 32-bit and 64-bit variants of ELF header). Callers are allowed to pass NULL as that argument, and in such case no lookup to the field 'e_flags' will happen, and no information will be returned, of course. CC: Richard Henderson <rth@twiddle.net> CC: Peter Maydell <peter.maydell@linaro.org> CC: Edgar E. Iglesias <edgar.iglesias@gmail.com> CC: Michael Walle <michael@walle.cc> CC: Thomas Huth <huth@tuxfamily.org> CC: Laurent Vivier <laurent@vivier.eu> CC: Philippe Mathieu-Daudé <f4bug@amsat.org> CC: Aleksandar Rikalo <aleksandar.rikalo@rt-rk.com> CC: Aurelien Jarno <aurelien@aurel32.net> CC: Jia Liu <proljc@gmail.com> CC: David Gibson <david@gibson.dropbear.id.au> CC: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> CC: BALATON Zoltan <balaton@eik.bme.hu> CC: Christian Borntraeger <borntraeger@de.ibm.com> CC: Thomas Huth <thuth@redhat.com> CC: Artyom Tarasenko <atar4qemu@gmail.com> CC: Fabien Chouteau <chouteau@adacore.com> CC: KONRAD Frederic <frederic.konrad@adacore.com> CC: Max Filippov <jcmvbkbc@gmail.com> Reviewed-by: Aleksandar Rikalo <aleksandar.rikalo@rt-rk.com> Signed-off-by: Michael Rolnik <mrolnik@gmail.com> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com> Message-Id: <1580079311-20447-24-git-send-email-aleksandar.markovic@rt-rk.com>
* qdev: set properties with device_class_set_props()Marc-André Lureau2020-01-241-3/+3
| | | | | | | | | | | | | | | | | | | | | The following patch will need to handle properties registration during class_init time. Let's use a device_class_set_props() setter. spatch --macro-file scripts/cocci-macro-file.h --sp-file ./scripts/coccinelle/qdev-set-props.cocci --keep-comments --in-place --dir . @@ typedef DeviceClass; DeviceClass *d; expression val; @@ - d->props = val + device_class_set_props(d, val) Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Message-Id: <20200110153039.1379601-20-marcandre.lureau@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
* hw: Move M48T59 device from hw/timer/ to hw/rtc/ subdirectoryPhilippe Mathieu-Daudé2019-10-241-1/+1
| | | | | | | | | | The M48T59 is a Real Time Clock, not a timer. Move it under the hw/rtc/ subdirectory. Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com> Message-Id: <20191003230404.19384-5-philmd@redhat.com> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
* sysemu: Split sysemu/runstate.h off sysemu/sysemu.hMarkus Armbruster2019-08-161-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | sysemu/sysemu.h is a rather unfocused dumping ground for stuff related to the system-emulator. Evidence: * It's included widely: in my "build everything" tree, changing sysemu/sysemu.h still triggers a recompile of some 1100 out of 6600 objects (not counting tests and objects that don't depend on qemu/osdep.h, down from 5400 due to the previous two commits). * It pulls in more than a dozen additional headers. Split stuff related to run state management into its own header sysemu/runstate.h. Touching sysemu/sysemu.h now recompiles some 850 objects. qemu/uuid.h also drops from 1100 to 850, and qapi/qapi-types-run-state.h from 4400 to 4200. Touching new sysemu/runstate.h recompiles some 500 objects. Since I'm touching MAINTAINERS to add sysemu/runstate.h anyway, also add qemu/main-loop.h. Suggested-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Markus Armbruster <armbru@redhat.com> Message-Id: <20190812052359.30071-30-armbru@redhat.com> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> [Unbreak OS-X build]
* Include hw/qdev-properties.h lessMarkus Armbruster2019-08-161-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | In my "build everything" tree, changing hw/qdev-properties.h triggers a recompile of some 2700 out of 6600 objects (not counting tests and objects that don't depend on qemu/osdep.h). Many places including hw/qdev-properties.h (directly or via hw/qdev.h) actually need only hw/qdev-core.h. Include hw/qdev-core.h there instead. hw/qdev.h is actually pointless: all it does is include hw/qdev-core.h and hw/qdev-properties.h, which in turn includes hw/qdev-core.h. Replace the remaining uses of hw/qdev.h by hw/qdev-properties.h. While there, delete a few superfluous inclusions of hw/qdev-core.h. Touching hw/qdev-properties.h now recompiles some 1200 objects. Cc: Paolo Bonzini <pbonzini@redhat.com> Cc: "Daniel P. Berrangé" <berrange@redhat.com> Cc: Eduardo Habkost <ehabkost@redhat.com> Signed-off-by: Markus Armbruster <armbru@redhat.com> Reviewed-by: Eduardo Habkost <ehabkost@redhat.com> Message-Id: <20190812052359.30071-22-armbru@redhat.com>
* Include hw/hw.h exactly where neededMarkus Armbruster2019-08-161-1/+0Star
| | | | | | | | | | | | | | | | In my "build everything" tree, changing hw/hw.h triggers a recompile of some 2600 out of 6600 objects (not counting tests and objects that don't depend on qemu/osdep.h). The previous commits have left only the declaration of hw_error() in hw/hw.h. This permits dropping most of its inclusions. Touching it now recompiles less than 200 objects. Signed-off-by: Markus Armbruster <armbru@redhat.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-Id: <20190812052359.30071-19-armbru@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com>
* Include migration/vmstate.h lessMarkus Armbruster2019-08-161-0/+2
| | | | | | | | | | | | | | | | | | In my "build everything" tree, changing migration/vmstate.h triggers a recompile of some 2700 out of 6600 objects (not counting tests and objects that don't depend on qemu/osdep.h). hw/hw.h supposedly includes it for convenience. Several other headers include it just to get VMStateDescription. The previous commit made that unnecessary. Include migration/vmstate.h only where it's still needed. Touching it now recompiles only some 1600 objects. Signed-off-by: Markus Armbruster <armbru@redhat.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-Id: <20190812052359.30071-16-armbru@redhat.com> Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com>
* hw: Replace global smp variables with MachineState for all remaining archsLike Xu2019-07-051-2/+2
| | | | | | | | | | | | | | The global smp variables in alpha/hppa/mips/openrisc/sparc*/xtensa codes are replaced with smp properties from MachineState. A local variable of the same name would be introduced in the declaration phase if it's used widely in the context OR replace it on the spot if it's only used once. No semantic changes. Signed-off-by: Like Xu <like.xu@linux.intel.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-Id: <20190518205428.90532-10-like.xu@linux.intel.com> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
* hw/sparc64: Implement fw_cfg_arch_key_name()Philippe Mathieu-Daudé2019-05-231-0/+19
| | | | | | | | | Implement fw_cfg_arch_key_name(), which returns the name of a sparc64-specific key. Reviewed-by: Laszlo Ersek <lersek@redhat.com> Message-Id: <20190422195020.1494-8-philmd@redhat.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
* hw/sparc64: Explicitly set default_display = "std"Thomas Huth2019-02-141-0/+2
| | | | | | | | | | | | | | | | | | | | | | The sun4uv_init() function expects vga_interface_type to be either VGA_STD or VGA_NONE and sets up a stdvga device or no vga card accordingly. However, the code in vl.c prefers the Cirrus VGA card to stdvga if it is available and the user and the machine did not specify anything else. So far this has not been a problem, since the Cirrus VGA was not linked into the sparc64 target. But with the upcoming Kconfig build system, all theoretically possible PCI cards will be enabled by default, so the Cirrus VGA card might become available on the sparc64 target, too. vl.c then picks the wrong card, causing sun4uv_init() to abort. Thus let's make it explicit that we always want stdvga for sparc64 and so set default_display = "std" for these machines. Signed-off-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Message-Id: <1550041639-10232-1-git-send-email-thuth@redhat.com> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
* Merge remote-tracking branch 'remotes/mcayland/tags/qemu-sparc-20190206' ↵Peter Maydell2019-02-071-1/+15
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | into staging qemu-sparc queue # gpg: Signature made Wed 06 Feb 2019 21:25:18 GMT # gpg: using RSA key CC621AB98E82200D915CC9C45BC2C56FAE0F321F # gpg: issuer "mark.cave-ayland@ilande.co.uk" # gpg: Good signature from "Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>" [full] # Primary key fingerprint: CC62 1AB9 8E82 200D 915C C9C4 5BC2 C56F AE0F 321F * remotes/mcayland/tags/qemu-sparc-20190206: sun4m: pass initrd size to OpenBIOS via fw_cfg interface sun4u: add power_mem_read routine hw/sparc64: Create VGA device only if it has really been requested Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
| * sun4u: add power_mem_read routinePrasad J Pandit2019-02-061-0/+6
| | | | | | | | | | | | | | | | Define skeleton 'power_mem_read' routine. Avoid NULL dereference. Reported-by: Fakhri Zulkifli <mohdfakhrizulkifli@gmail.com> Signed-off-by: Prasad J Pandit <pjp@fedoraproject.org> Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
| * hw/sparc64: Create VGA device only if it has really been requestedThomas Huth2019-02-061-1/+9
| | | | | | | | | | | | | | | | | | | | The sun4u/sun4v machine currently always creates a VGA device, even if the user started QEMU with "-nodefaults" or "-vga none". That's likely not what the users expect in this case, so add a check whether the VGA adapter has really been requested. Signed-off-by: Thomas Huth <huth@tuxfamily.org> Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
* | Merge remote-tracking branch ↵Peter Maydell2019-02-071-1/+0Star
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | 'remotes/vivier2/tags/trivial-patches-pull-request' into staging Trivial patches: * Update copyright * Fix LGPL in target/moxie * configure portability fix * Drop useless inclusion of "hw/i386/pc.h" * Mark the cpu-cluster device with user_creatable = false * tsc210x: Fix building with no verbosity # gpg: Signature made Wed 06 Feb 2019 15:27:35 GMT # gpg: using RSA key F30C38BD3F2FBE3C # gpg: Good signature from "Laurent Vivier <lvivier@redhat.com>" [full] # gpg: aka "Laurent Vivier <laurent@vivier.eu>" [full] # gpg: aka "Laurent Vivier (Red Hat) <lvivier@redhat.com>" [full] # Primary key fingerprint: CD2F 75DD C8E3 A4DC 2E4F 5173 F30C 38BD 3F2F BE3C * remotes/vivier2/tags/trivial-patches-pull-request: hw/input/tsc210x: Fix building with no verbosity hw/cpu/cluster: Mark the cpu-cluster device with user_creatable = false hw/unicore32/puv3: Drop useless inclusion of "hw/i386/pc.h" hw/sparc64/sun4u: Drop useless inclusion of "hw/i386/pc.h" configure: Avoid non-portable 'test -o/-a' target/moxie: Fix LGPL information in the file headers qemu-common.h: Update copyright string for 2019 Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
| * | hw/sparc64/sun4u: Drop useless inclusion of "hw/i386/pc.h"Philippe Mathieu-Daudé2019-02-061-1/+0Star
| |/ | | | | | | | | | | | | | | | | | | | | | | In 47973a2dbf we split the last generic chipset out of the PC board, but forgot to remove the include of "hw/i386/pc.h". Since it is now unused, remove it. Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Message-Id: <20190204210433.26088-2-philmd@redhat.com> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
* / elf: Add optional function ptr to load_elf() to parse ELF notesLiam Merwick2019-02-051-2/+2
|/ | | | | | | | | | | | | | | | | | | This patch adds an optional function pointer, 'elf_note_fn', to load_elf() which causes load_elf() to additionally parse any ELF program headers of type PT_NOTE and check to see if the ELF Note is of the type specified by the 'translate_opaque' arg. If a matching ELF Note is found then the specfied function pointer is called to process the ELF note. Passing a NULL function pointer results in ELF Notes being skipped. The first consumer of this functionality is the PVHboot support which needs to read the XEN_ELFNOTE_PHYS32_ENTRY ELF Note while loading the uncompressed kernel binary in order to discover the boot entry address for the x86/HVM direct boot ABI. Signed-off-by: Liam Merwick <liam.merwick@oracle.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
* sun4u: implement custom FWPathProviderMark Cave-Ayland2018-09-141-0/+58
| | | | | | | | | | This enables the correct generation of bootdevice fw paths for in-built IDE and virtio-pci-blk devices suitable for OpenBIOS. Note we also set the MachineClass ignore_boot_device_suffixes property to true to allow the correct customisation of the disk node names as required. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
* sun4u: ensure kernel_top is always initialisedMark Cave-Ayland2018-08-201-2/+2
| | | | | | | | | | | | Valgrind reports that when loading a non-ELF kernel, kernel_top may be used uninitialised when checking for an initrd. Since there are no known non-ELF kernels for SPARC64 then we can simply initialise kernel_top to 0 and then skip the initrd load process if it hasn't been set by load_elf(). Reported-by: Thomas Huth <thuth@redhat.com> Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
* Merge remote-tracking branch 'remotes/bonzini/tags/for-upstream' into stagingPeter Maydell2018-07-021-2/+2
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * IEC units series (Philippe) * Hyper-V PV TLB flush (Vitaly) * git archive detection (Daniel) * host serial passthrough fix (David) * NPT support for SVM emulation (Jan) * x86 "info mem" and "info tlb" fix (Doug) # gpg: Signature made Mon 02 Jul 2018 16:18:21 BST # gpg: using RSA key BFFBD25F78C7AE83 # gpg: Good signature from "Paolo Bonzini <bonzini@gnu.org>" # gpg: aka "Paolo Bonzini <pbonzini@redhat.com>" # Primary key fingerprint: 46F5 9FBD 57D6 12E7 BFD4 E2F7 7E15 100C CD36 69B1 # Subkey fingerprint: F133 3857 4B66 2389 866C 7682 BFFB D25F 78C7 AE83 * remotes/bonzini/tags/for-upstream: (50 commits) tcg: simplify !CONFIG_TCG handling of tb_invalidate_* i386/monitor.c: make addresses canonical for "info mem" and "info tlb" target-i386: Add NPT support serial: Open non-block bsd-user: Use the IEC binary prefix definitions linux-user: Use the IEC binary prefix definitions tests/crypto: Use the IEC binary prefix definitions vl: Use the IEC binary prefix definitions monitor: Use the IEC binary prefix definitions cutils: Do not include "qemu/units.h" directly hw/rdma: Use the IEC binary prefix definitions hw/virtio: Use the IEC binary prefix definitions hw/vfio: Use the IEC binary prefix definitions hw/sd: Use the IEC binary prefix definitions hw/usb: Use the IEC binary prefix definitions hw/net: Use the IEC binary prefix definitions hw/i386: Use the IEC binary prefix definitions hw/ppc: Use the IEC binary prefix definitions hw/mips: Use the IEC binary prefix definitions hw/mips/r4k: Constify params_size ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
| * hw/sparc: Use the IEC binary prefix definitionsPhilippe Mathieu-Daudé2018-07-021-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | It eases code review, unit is explicit. Patch generated using: $ git grep -E '(1024|2048|4096|8192|(<<|>>).?(10|20|30))' hw/ include/hw/ and modified manually. Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20180625124238.25339-19-f4bug@amsat.org> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
* | loader: Check access size when calling rom_ptr() to avoid crashesThomas Huth2018-07-021-2/+2
|/ | | | | | | | | | | | | | | | | | | | | | | | | The rom_ptr() function allows direct access to the ROM blobs that we load during startup. However, there are currently no checks for the size of the accesses, so it's currently possible to crash QEMU for example with: $ echo "Insane in the mainframe" > /tmp/test.txt $ s390x-softmmu/qemu-system-s390x -kernel /tmp/test.txt -append xyz Segmentation fault (core dumped) $ s390x-softmmu/qemu-system-s390x -kernel /tmp/test.txt -initrd /tmp/test.txt Segmentation fault (core dumped) $ echo -n HdrS > /tmp/hdr.txt $ sparc64-softmmu/qemu-system-sparc64 -kernel /tmp/hdr.txt -initrd /tmp/hdr.txt Segmentation fault (core dumped) We need a possibility to check the size of the ROM area that we want to access, thus let's add a size parameter to the rom_ptr() function to avoid these problems. Acked-by: Christian Borntraeger <borntraeger@de.ibm.com> Signed-off-by: Thomas Huth <thuth@redhat.com> Message-Id: <1530005740-25254-1-git-send-email-thuth@redhat.com> Signed-off-by: Cornelia Huck <cohuck@redhat.com>
* hw/sparc64/sun4u: Fix introspection by converting prom instance_init to realizeThomas Huth2018-06-171-6/+12
| | | | | | | | | | | | | | | | | | | | | | The instance_init function of devices should always succeed to be able to introspect the device. However, the instance_init function of the "openprom" device can currently fail, for example like this: $ echo "{'execute':'qmp_capabilities'}"\ "{'execute':'device-list-properties',"\ " 'arguments':{'typename':'openprom'}}" \ | sparc64-softmmu/qemu-system-sparc64 -M sun4v,accel=qtest -qmp stdio {"QMP": {"version": {"qemu": {"micro": 91, "minor": 11, "major": 2}, "package": "build-all"}, "capabilities": []}} {"return": {}} RAMBlock "sun4u.prom" already registered, abort! Aborted (core dumped) This should not happen. Fix this problem by moving the affected code from instance_init into a realize function instead. Signed-off-by: Thomas Huth <thuth@redhat.com> Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
* serial-isa: Use MAX_ISA_SERIAL_PORTS instead of MAX_SERIAL_PORTSPeter Maydell2018-04-261-1/+1
| | | | | | | | | | | | | | | | | The ISA serial port handling in serial-isa.c imposes a limit of 4 serial ports. This is because we only know of 4 IO port and IRQ settings for them, and is unrelated to the generic MAX_SERIAL_PORTS limit, though they happen to both be set at 4 currently. Use a new MAX_ISA_SERIAL_PORTS wherever that is the correct limit to be checking against. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Thomas Huth <thuth@redhat.com> Tested-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-id: 20180420145249.32435-11-peter.maydell@linaro.org
* Change references to serial_hds[] to serial_hd()Peter Maydell2018-04-261-1/+1
| | | | | | | | | | Change all the uses of serial_hds[] to go via the new serial_hd() function. Code change produced with: find hw -name '*.[ch]' | xargs sed -i -e 's/serial_hds\[\([^]]*\)\]/serial_hd(\1)/g' Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Thomas Huth <thuth@redhat.com> Message-id: 20180420145249.32435-8-peter.maydell@linaro.org
* hw/input/i8042: Extract declarations from i386/pc.h into input/i8042.hPhilippe Mathieu-Daudé2018-03-121-0/+1
| | | | | | | | Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Acked-by: David Gibson <david@gibson.dropbear.id.au> (hw/ppc) Message-Id: <20180308223946.26784-4-f4bug@amsat.org> Reviewed-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
* hw/dma/i8257: Rename DMA_init() to i8257_dma_init()Philippe Mathieu-Daudé2018-03-121-4/+0Star
| | | | | | | | | | | - Move the header from hw/isa/ to hw/dma/ - Remove the old i386/pc dependency - use a bool type for the high_page_enable argument Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20180308223946.26784-3-f4bug@amsat.org> Reviewed-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
* hw/isa: Move parallel_hds_isa_init() to hw/char/parallel-isa.cPhilippe Mathieu-Daudé2018-03-121-0/+1
| | | | | | | | | | | Again... (after 07dc788054d7 and 9157eee1b1c0). We now extract the ISA bus specific helpers. Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20180308223946.26784-2-f4bug@amsat.org> Reviewed-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
* hw/sparc*: Replace fprintf(stderr, "*\n" with error_report()Alistair Francis2018-02-061-5/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Replace a large number of the fprintf(stderr, "*\n" calls with error_report(). The functions were renamed with these commands and then compiler issues where manually fixed. find ./* -type f -exec sed -i \ 'N;N;N;N;N;N;N;N;N;N;N;N; {s|fprintf(stderr, "\(.*\)\\n"\(.*\));|error_report("\1"\2);|Ig}' \ {} + find ./* -type f -exec sed -i \ 'N;N;N;N;N;N;N;N;N;N;N; {s|fprintf(stderr, "\(.*\)\\n"\(.*\));|error_report("\1"\2);|Ig}' \ {} + find ./* -type f -exec sed -i \ 'N;N;N;N;N;N;N;N;N; {s|fprintf(stderr, "\(.*\)\\n"\(.*\));|error_report("\1"\2);|Ig}' \ {} + find ./* -type f -exec sed -i \ 'N;N;N;N;N;N;N;N; {s|fprintf(stderr, "\(.*\)\\n"\(.*\));|error_report("\1"\2);|Ig}' \ {} + find ./* -type f -exec sed -i \ 'N;N;N;N;N;N;N; {s|fprintf(stderr, "\(.*\)\\n"\(.*\));|error_report("\1"\2);|Ig}' \ {} + find ./* -type f -exec sed -i \ 'N;N;N;N;N;N; {s|fprintf(stderr, "\(.*\)\\n"\(.*\));|error_report("\1"\2);|Ig}' \ {} + find ./* -type f -exec sed -i \ 'N;N;N;N;N; {s|fprintf(stderr, "\(.*\)\\n"\(.*\));|error_report("\1"\2);|Ig}' \ {} + find ./* -type f -exec sed -i \ 'N;N;N;N; {s|fprintf(stderr, "\(.*\)\\n"\(.*\));|error_report("\1"\2);|Ig}' \ {} + find ./* -type f -exec sed -i \ 'N;N;N; {s|fprintf(stderr, "\(.*\)\\n"\(.*\));|error_report("\1"\2);|Ig}' \ {} + find ./* -type f -exec sed -i \ 'N;N; {s|fprintf(stderr, "\(.*\)\\n"\(.*\));|error_report("\1"\2);|Ig}' \ {} + find ./* -type f -exec sed -i \ 'N; {s|fprintf(stderr, "\(.*\)\\n"\(.*\));|error_report("\1"\2);|Ig}' \ {} + Some lines where then manually tweaked to pass checkpatch. Signed-off-by: Alistair Francis <alistair.francis@xilinx.com> Cc: Fabien Chouteau <chouteau@adacore.com> Cc: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Cc: Artyom Tarasenko <atar4qemu@gmail.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Signed-off-by: Markus Armbruster <armbru@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20180203084315.20497-12-armbru@redhat.com>
* sun4u: implement power deviceMark Cave-Ayland2018-01-251-1/+63
| | | | | | | | | | | | | | | This inbuilt device contains a single 4-byte register, of which bit 24 is used to power down the machine on a real Ultra 5. The power device exists at offset 0x724000 on a real machine, but due to the current configuration of the BARs in QEMU it must be located lower in PCI IO space. For the moment we place the power device at offset 0x7240 as a reminder of its original location and raise the base PCI IO address from 0x4000 to 0x8000. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Reviewed-by: Artyom Tarasenko <atar4qemu@gmail.com>
* apb: rename apb.c to sabre.cMark Cave-Ayland2018-01-241-1/+1
| | | | | | | | | | | | | | This is the final stage in correcting the naming convention with respect to sabre, APB and PBM. It is effectively a file rename from apb.c to sabre.c along with touching up a few constants to remove the remaining references to APB. Note that as part of the rename process the configuration variable CONFIG_PCI_APB is changed to CONFIG_PCI_SABRE. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Acked-by: Artyom Tarasenko <atar4qemu@gmail.com>
* sun4u: rename apb variables and constantsMark Cave-Ayland2018-01-241-20/+21
| | | | | | | | | In order to reflect the previous change of TYPE_APB to TYPE_SABRE, update the corresponding variable names to keep the terminology consistent. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Acked-by: Artyom Tarasenko <atar4qemu@gmail.com>
* apb: rename QOM type from TYPE_APB to TYPE_SABREMark Cave-Ayland2018-01-241-3/+3
| | | | | | | | Similarly rename the corresponding APBState typedef to SabreState. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Acked-by: Artyom Tarasenko <atar4qemu@gmail.com>
* sun4u: split IOMMU device out from apb.c to sun4u_iommu.cMark Cave-Ayland2018-01-091-0/+1
| | | | | | | | | By separating the sun4u IOMMU device into new sun4u_iommu.c and sun4m_iommu.h files we noticeably simplify apb.c whilst bringing sun4u in line with all the other IOMMU-supporting architectures. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Acked-by: Artyom Tarasenko <atar4qemu@gmail.com>
* apb: QOMify IOMMUMark Cave-Ayland2018-01-091-1/+6
| | | | | | | | | | | This is in preparation to split the IOMMU device out of the APB. As part of this commit we also enforce separation of the IOMMU and APB devices by using a QOM object link to pass the IOMMU reference and accessing the IOMMU registers via a separate memory region mapped into the APB config space rather than directly. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Acked-by: Artyom Tarasenko <atar4qemu@gmail.com>
* sun4u: switch from EBUS_DPRINTF() macro to trace-eventsMark Cave-Ayland2018-01-091-10/+2Star
| | | | | | Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Artyom Tarasenko <atar4qemu@gmail.com>
* ebus: wire up OBIO interrupts to APB pbm via qdev GPIOsMark Cave-Ayland2018-01-091-24/+25
| | | | | | | | | | | | | | This enables us to remove the static array mapping in the ISA IRQ handler (and the embedded reference to the APB device) by formalising the interrupt wiring via the qdev GPIO API. For more clarity we replace the APB OBIO interrupt numbers with constants designating the interrupt source, and rename isa_irq_handler() to ebus_isa_irq_handler(). Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Reviewed-by: Artyom Tarasenko <atar4qemu@gmail.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
* apb: remove pci_apb_init() and instantiate APB device using qdevMark Cave-Ayland2018-01-091-1/+5
| | | | | | | | | | | | | By making the special_base and mem_base values qdev properties, we can move the remaining parts of pci_apb_init() into the pbm init() and realize() functions. This finally allows us to instantiate the APB directly using standard qdev create/init functions in sun4u.c. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Reviewed-by: Artyom Tarasenko <atar4qemu@gmail.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
* apb: move the two secondary PCI bridges objects into APBStateMark Cave-Ayland2018-01-091-1/+4
| | | | | | | | This enables us to remove these parameters from pci_apb_init(). Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Reviewed-by: Artyom Tarasenko <atar4qemu@gmail.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
* apb: use gpios to wire up the apb device to the SPARC CPU IRQsMark Cave-Ayland2018-01-091-4/+8
| | | | | | Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Artyom Tarasenko <atar4qemu@gmail.com>
* apb: return APBState from pci_apb_init() rather than PCIBusMark Cave-Ayland2018-01-091-2/+4
| | | | | | | | This is a first step towards removing pci_apb_init() completely. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Artyom Tarasenko <atar4qemu@gmail.com>
* sun4u: move initialisation of all ISABus devices into ebus_realize()Mark Cave-Ayland2018-01-091-32/+46
| | | | | | | | This belongs in the PCI-ISA bridge rather than at the machine level. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Artyom Tarasenko <atar4qemu@gmail.com>
* sun4u: remove pci_ebus_init() functionMark Cave-Ayland2018-01-091-15/+14Star
| | | | | | | | | | | This is initialisation that should really take place in the ebus realize function. As part of this we also rework the ebus IRQ mapping so that instead of having to pass in the array of pbm_irqs, we obtain a reference to them by looking up the APB device during ebus realize. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Reviewed-by: Artyom Tarasenko <atar4qemu@gmail.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
* sun4u: move ISABus inside of EBusStateMark Cave-Ayland2018-01-091-2/+5
| | | | | | | | | Since the EBus is effectively a PCI-ISA bridge then the underlying ISA bus should be contained within the PCI bridge itself. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Reviewed-by: Artyom Tarasenko <atar4qemu@gmail.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
* sun4u: ebus QOMify tidy-upMark Cave-Ayland2018-01-091-7/+12
| | | | | | | | | | | | The main change here is to introduce the proper TYPE_EBUS/EBUS QOM macros and remove the use of DO_UPCAST. Alongside this there are some a couple of minor cosmetic changes and a rename of pci_ebus_realize() to ebus_realize() since the ebus device is always what is effectively a PCI-ISA bridge. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
* sparc: sun4u/sun4v/niagara: use generic cpu_model parsingIgor Mammedov2017-10-271-5/+3Star
| | | | | | | | Signed-off-by: Igor Mammedov <imammedo@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <1507211474-188400-33-git-send-email-imammedo@redhat.com> Reviewed-by: Artyom Tarasenko <atar4qemu@gmail.com> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
* sun4u: fix assert when adding NICs which aren't the in-built modelMark Cave-Ayland2017-10-191-2/+2
| | | | | | | | | | Commit 8d93297 introduced a bug whereby non-inbuilt NICs are realized before setting the default MAC address causing an assert. Switch NIC creation over from pci_create_simple() to pci_create() which works exactly the same except omitting the realize as originally intended. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Reviewed-by: Artyom Tarasenko <atar4qemu@gmail.com>
* sun4u: update PCI topology to include simba PCI bridgesMark Cave-Ayland2017-10-191-17/+43
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch updates the sun4u model to being much closer to a real Ultra 5 by moving devices behind the 2 simba PCI bridges (A and B) as found on real hardware. The most noticeable change introduced by this patchset is that in-built devices are no longer attached to the PCI root bus, but instead behind PCI bridge A. Along with this the interrupt routing is updated accordingly to match the official documentation. Since the existing code currently bypasses the PCI bridge interrupt swizzling, the interrupt mapping functions are reorganised so that pci_pbm_map_irq() is used by the PCI bridges and pci_apb_map_irq() is used by the PCI host bridge. Behind the sabre PCI host bridge, the PCI IO space now needs to be split into two separate halves at 0x8000000. Therefore we also setup a new PCI IO space region of increased size on the PCI host bridge and enable 32-bit PCI IO accesses to allow IO accesses to reach devices behind PCI bridge B correctly. As part of this change we also combine the onboard sunhme NIC and the ebus into a single multi-function device as done on a real Ultra 5. For other NICs the existing behaviour is preserved, i.e. we initialise them and place them into the next free slot on PCI bus B. Finally we mark the physically unavailable slots (plus slot 0 in busA) as reserved to ensure that users can't plug devices into non-existent slots which will break interrupt routing. Note: since this commit changes PCI topology and interrupt routing, an updated openbios-sparc64 binary is included with this commit containing the associated changes to maintain bisectability. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Reviewed-by: Artyom Tarasenko <atar4qemu@gmail.com>
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