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* hw/display/cirrus_vga: Update the documentation URLPhilippe Mathieu-Daudé2019-05-071-2/+7
| | | | | | | | | | | The documentation URL is not working, but is backed up by the Wayback Machine on the Internet Archive. Replace the outdated link by a captured one. Add another link to the VGADOC4b.ZIP archive content. Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com> Message-id: 20190504121650.12651-1-philmd@redhat.com Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
* qxl: check release info objectPrasad J Pandit2019-05-071-0/+3
| | | | | | | | | | | When releasing spice resources in release_resource() routine, if release info object 'ext.info' is null, it leads to null pointer dereference. Add check to avoid it. Reported-by: Bugs SysSec <bugs-syssec@rub.de> Signed-off-by: Prasad J Pandit <pjp@fedoraproject.org> Message-id: 20190425063534.32747-1-ppandit@redhat.com Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
* Merge remote-tracking branch ↵Peter Maydell2019-05-038-209/+302
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | 'remotes/kraxel/tags/usb-20190503-v2-pull-request' into staging usb: bugfixes for mtp and xhci, split ohci-pci. # gpg: Signature made Fri 03 May 2019 07:59:39 BST # gpg: using RSA key 4CB6D8EED3E87138 # gpg: Good signature from "Gerd Hoffmann (work) <kraxel@redhat.com>" [full] # gpg: aka "Gerd Hoffmann <gerd@kraxel.org>" [full] # gpg: aka "Gerd Hoffmann (private) <kraxel@gmail.com>" [full] # Primary key fingerprint: A032 8CFF B93A 17A7 9901 FE7D 4CB6 D8EE D3E8 7138 * remotes/kraxel/tags/usb-20190503-v2-pull-request: hw/usb: avoid format truncation warning when formatting port name hw/usb/hcd-ohci: Move PCI-related code into a separate file hw/usb/hcd-ohci: Do not use PCI functions with sysbus devices in ohci_die() usb/xhci: avoid trigger assertion if guest write wrong epid usb-mtp: change default to success for usb_mtp_update_object usb-mtp: fix alignment of access of ObjectInfo filename field usb-mtp: fix string length for filename when writing metadata Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
| * hw/usb: avoid format truncation warning when formatting port nameDaniel P. Berrangé2019-05-031-1/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | hw/usb/hcd-xhci.c: In function ‘usb_xhci_realize’: hw/usb/hcd-xhci.c:3339:66: warning: ‘%d’ directive output may be truncated writing between 1 and 10 bytes into a region of size 5 [-Wformat-trunca\ tion=] 3339 | snprintf(port->name, sizeof(port->name), "usb2 port #%d", i+1); | ^~ hw/usb/hcd-xhci.c:3339:54: note: directive argument in the range [1, 2147483647] 3339 | snprintf(port->name, sizeof(port->name), "usb2 port #%d", i+1); | ^~~~~~~~~~~~~~~ The xhci code formats the port name into a fixed length buffer which is only large enough to hold port numbers upto 5 digits in decimal representation. We're never going to have a port number that large, so aserting the port number is sensible is sufficient to tell GCC the formatted string won't be truncated. Signed-off-by: Daniel P. Berrangé <berrange@redhat.com> Message-Id: <20190412121626.19829-5-berrange@redhat.com> [ kraxel: also s/int/unsigned int/ to tell gcc they can't go negative. ] Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
| * hw/usb/hcd-ohci: Move PCI-related code into a separate fileThomas Huth2019-05-026-208/+284
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Some machines (like the pxa2xx-based ARM machines) only have a sysbus OHCI controller, but no PCI. With the new Kconfig-style build system, it will soon be possible to create QEMU binaries that only contain such PCI-less machines. However, the two OHCI controllers, for sysbus and for PCI, are currently both located in one file, so the PCI code is still required for linking here. Move the OHCI-PCI device code into a separate file, so that it is possible to use the sysbus OHCI device also without the PCI dependency. Signed-off-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com> Message-id: 20190419075625.24251-3-thuth@redhat.com Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
| * hw/usb/hcd-ohci: Do not use PCI functions with sysbus devices in ohci_die()Thomas Huth2019-05-021-12/+27
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The ohci_die() function always assumes to be running with a PCI OHCI controller and calls the PCI-specific functions pci_set_word(). However, this function might also get called for the sysbus OHCI devices, so it likely fails in that case. To fix this issue, change the code now, so that there are two implementations now, one for sysbus and one for PCI, and use the right function via a function pointer in the OHCIState structure. Signed-off-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com> Message-id: 20190419075625.24251-2-thuth@redhat.com Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
| * usb/xhci: avoid trigger assertion if guest write wrong epidLongpeng2019-05-021-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | we found the following core in our environment: 0 0x00007fc6b06c2237 in raise () 1 0x00007fc6b06c3928 in abort () 2 0x00007fc6b06bb056 in __assert_fail_base () 3 0x00007fc6b06bb102 in __assert_fail () 4 0x0000000000702e36 in xhci_kick_ep (...) 5 0x000000000047897a in memory_region_write_accessor (...) 6 0x000000000047767f in access_with_adjusted_size (...) 7 0x000000000047944d in memory_region_dispatch_write (...) (mr=mr@entry=0x7fc6a0138df0, addr=addr@entry=156, data=1648892416, size=size@entry=4, attrs=attrs@entry=...) 8 0x000000000042df17 in address_space_write_continue (...) 10 0x000000000043084d in address_space_rw (...) 11 0x000000000047451b in kvm_cpu_exec (cpu=cpu@entry=0x1ab11b0) 12 0x000000000045dcf5 in qemu_kvm_cpu_thread_fn (arg=0x1ab11b0) 13 0x0000000000870631 in qemu_thread_start (args=args@entry=0x1acfb50) 14 0x00000000008959a7 in thread_entry_for_hotfix (pthread_cb=<optimized out>) 15 0x00007fc6b0a60dd5 in start_thread () 16 0x00007fc6b078a59d in clone () (gdb) f 5 5 0x000000000047897a in memory_region_write_accessor (...) 529 mr->ops->write(mr->opaque, addr, tmp, size); (gdb) p /x tmp $9 = 0x62481a00 <-- last byte 0x00 is @epid xhci_doorbell_write() already check the upper bound of @slotid an @epid, it also need to check the lower bound. Cc: Gonglei <arei.gonglei@huawei.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Signed-off-by: Longpeng <longpeng2@huawei.com> Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com> Message-id: 1556605301-44112-1-git-send-email-longpeng2@huawei.com [ kraxel: fixed typo in subject line ] Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
| * usb-mtp: change default to success for usb_mtp_update_objectBandan Das2019-05-021-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit c5ead51f90cf (usb-mtp: return incomplete transfer on a lstat failure) checks if lstat succeeded when updating attributes of a file. However, it also changed behavior to return an error by default. This is incorrect because for smaller file sizes, Qemu will attempt to write the file in one go and there won't be an object for it. Fixes: c5ead51f90cf Signed-off-by: Bandan Das <bsd@redhat.com> Message-id: jpgwojv9pwv.fsf@linux.bootlegged.copy Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
| * usb-mtp: fix alignment of access of ObjectInfo filename fieldDaniel P. Berrangé2019-05-021-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | The ObjectInfo struct's "filename" field is following a uint8_t field in a packed struct and thus has bad alignment for a 16-bit field. Switch the field to to uint8_t and use the helper function for accessing unaligned 16-bit data. Note that although the MTP spec specifies big endian, when transported over the USB protocol, data is little endian. Signed-off-by: Daniel P. Berrangé <berrange@redhat.com> Message-id: 20190415154503.6758-4-berrange@redhat.com Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
| * usb-mtp: fix string length for filename when writing metadataDaniel P. Berrangé2019-05-021-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | The ObjectInfo 'length' field provides the length of the wide character string filename. This is then converted to a multi-byte character string. This may have a different byte count to the wide character string. We should use the C string length of the multi-byte string instead. Signed-off-by: Daniel P. Berrangé <berrange@redhat.com> Message-id: 20190415154503.6758-2-berrange@redhat.com Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
* | hw/pci-host: Use object_initialize_child for correct reference countingThomas Huth2019-05-024-8/+9
|/ | | | | | | | | | | | | | | | | Both functions, object_initialize() and object_property_add_child() increase the reference counter of the new object, so one of the references has to be dropped afterwards to get the reference counting right. Otherwise the child object might not be properly cleaned up when the parent gets destroyed. Some functions of the pci-host devices miss to drop one of the references. Fix it by using object_initialize_child() instead, which takes care of calling object_initialize(), object_property_add_child() and object_unref() in the right order. Suggested-by: Eduardo Habkost <ehabkost@redhat.com> Message-Id: <20190430191552.4027-1-thuth@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com> Signed-off-by: Thomas Huth <thuth@redhat.com>
* hw/devices: Move SMSC 91C111 declaration into a new headerPhilippe Mathieu-Daudé2019-04-296-6/+6
| | | | | | | | | This commit finally deletes "hw/devices.h". Reviewed-by: Markus Armbruster <armbru@redhat.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com> Message-id: 20190412165416.7977-13-philmd@redhat.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
* hw/net/lan9118: Export TYPE_LAN9118 and use it instead of hardcoded stringPhilippe Mathieu-Daudé2019-04-293-3/+4
| | | | | | | Reviewed-by: Markus Armbruster <armbru@redhat.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com> Message-id: 20190412165416.7977-12-philmd@redhat.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
* hw/devices: Move LAN9118 declarations into a new headerPhilippe Mathieu-Daudé2019-04-295-4/+5
| | | | | | | Reviewed-by: Markus Armbruster <armbru@redhat.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com> Message-id: 20190412165416.7977-10-philmd@redhat.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
* hw/devices: Move TI touchscreen declarations into a new headerPhilippe Mathieu-Daudé2019-04-294-5/+5
| | | | | | | | | | Since uWireSlave is only used in this new header, there is no need to expose it via "qemu/typedefs.h". Reviewed-by: Markus Armbruster <armbru@redhat.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com> Message-id: 20190412165416.7977-9-philmd@redhat.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
* hw/devices: Move Gamepad declarations into a new headerPhilippe Mathieu-Daudé2019-04-292-2/+2
| | | | | | | Reviewed-by: Markus Armbruster <armbru@redhat.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com> Message-id: 20190412165416.7977-8-philmd@redhat.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
* hw/devices: Move CBus declarations into a new headerPhilippe Mathieu-Daudé2019-04-292-1/+2
| | | | | | | | Reviewed-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Markus Armbruster <armbru@redhat.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com> Message-id: 20190412165416.7977-7-philmd@redhat.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
* hw/devices: Move Blizzard declarations into a new headerPhilippe Mathieu-Daudé2019-04-292-1/+2
| | | | | | | | | | Add an entries the Blizzard device in MAINTAINERS. Reviewed-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Markus Armbruster <armbru@redhat.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com> Message-id: 20190412165416.7977-6-philmd@redhat.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
* hw/devices: Move TC6393XB declarations into a new headerPhilippe Mathieu-Daudé2019-04-292-2/+2
| | | | | | | Reviewed-by: Markus Armbruster <armbru@redhat.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com> Message-id: 20190412165416.7977-5-philmd@redhat.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
* hw/display/tc6393xb: Remove unused functionsPhilippe Mathieu-Daudé2019-04-291-16/+0Star
| | | | | | | | | | | | No code used the tc6393xb_gpio_in_get() and tc6393xb_gpio_out_set() functions since their introduction in commit 88d2c950b002. Time to remove them. Suggested-by: Markus Armbruster <armbru@redhat.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com> Message-id: 20190412165416.7977-4-philmd@redhat.com Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
* hw/arm/nseries: Use TYPE_TMP105 instead of hardcoded stringPhilippe Mathieu-Daudé2019-04-291-1/+2
| | | | | | | | Suggested-by: Markus Armbruster <armbru@redhat.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com> Message-id: 20190412165416.7977-3-philmd@redhat.com Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
* hw/arm/aspeed: Use TYPE_TMP105/TYPE_PCA9552 instead of hardcoded stringPhilippe Mathieu-Daudé2019-04-291-4/+9
| | | | | | | | | Reviewed-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Cédric Le Goater <clg@kaod.org> Reviewed-by: Markus Armbruster <armbru@redhat.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com> Message-id: 20190412165416.7977-2-philmd@redhat.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
* hw/dma: Compile the bcm2835_dma device as common objectPhilippe Mathieu-Daudé2019-04-291-1/+1
| | | | | | | | | | | This device is used by both ARM (BCM2836, for raspi2) and AArch64 (BCM2837, for raspi3) targets, and is not CPU-specific. Move it to common object, so we build it once for all targets. Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com> Message-id: 20190427133028.12874-1-philmd@redhat.com Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
* target/arm: New function armv7m_nvic_set_pending_lazyfp()Peter Maydell2019-04-291-0/+96
| | | | | | | | | | | | | | | | | In the v7M architecture, if an exception is generated in the process of doing the lazy stacking of FP registers, the handling of possible escalation to HardFault is treated differently to the normal approach: it works based on the saved information about exception readiness that was stored in the FPCCR when the stack frame was created. Provide a new function armv7m_nvic_set_pending_lazyfp() which pends exceptions during lazy stacking, and implements this logic. This corresponds to the pseudocode TakePreserveFPException(). Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20190416125744.27770-22-peter.maydell@linaro.org
* target/arm: Implement v7m_update_fpccr()Peter Maydell2019-04-291-0/+34
| | | | | | | | | | Implement the code which updates the FPCCR register on an exception entry where we are going to use lazy FP stacking. We have to defer to the NVIC to determine whether the various exceptions are currently ready or not. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 20190416125744.27770-12-peter.maydell@linaro.org
* target/arm: Implement dummy versions of M-profile FP-related registersPeter Maydell2019-04-291-0/+125
| | | | | | | | | | | | | | | | | | | | | | The M-profile floating point support has three associated config registers: FPCAR, FPCCR and FPDSCR. It also makes the registers CPACR and NSACR have behaviour other than reads-as-zero. Add support for all of these as simple reads-as-written registers. We will hook up actual functionality later. The main complexity here is handling the FPCCR register, which has a mix of banked and unbanked bits. Note that we don't share storage with the A-profile cpu->cp15.nsacr and cpu->cp15.cpacr_el1, though the behaviour is quite similar, for two reasons: * the M profile CPACR is banked between security states * it preserves the invariant that M profile uses no state inside the cp15 substruct Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20190416125744.27770-4-peter.maydell@linaro.org
* hw/intc/armv7m_nvic: Allow reading of M-profile MVFR* registersPeter Maydell2019-04-291-0/+6
| | | | | | | | | | For M-profile the MVFR* ID registers are memory mapped, in the range we implement via the NVIC. Allow them to be read. (If the CPU has no FPU, these registers are defined to be RAZ.) Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20190416125744.27770-3-peter.maydell@linaro.org
* hw/ssi/xilinx_spips: Avoid variable length arrayPeter Maydell2019-04-291-2/+4
| | | | | | | | | | | | | In the stripe8() function we use a variable length array; however we know that the maximum length required is MAX_NUM_BUSSES. Use a fixed-length array and an assert instead. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Francisco Iglesias <frasse.iglesias@gmail.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Stefano Garzarella <sgarzare@redhat.com> Message-id: 20190328152635.2794-1-peter.maydell@linaro.org
* hw/arm/smmuv3: Remove SMMUNotifierNodeEric Auger2019-04-292-24/+10Star
| | | | | | | | | | | | | | | The SMMUNotifierNode struct is not necessary and brings extra complexity so let's remove it. We now directly track the SMMUDevices which have registered IOMMU MR notifiers. This is inspired from the same transformation on intel-iommu done in commit b4a4ba0d68f50f218ee3957b6638dbee32a5eeef ("intel-iommu: remove IntelIOMMUNotifierNode") Signed-off-by: Eric Auger <eric.auger@redhat.com> Reviewed-by: Peter Xu <peterx@redhat.com> Message-id: 20190409160219.19026-1-eric.auger@redhat.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
* Add generic Nios II board.Sandra Loosemore2019-04-294-6/+122
| | | | | | | | | | | | | | | | | | | | | | | This patch adds support for a generic MMU-less Nios II board that can be used e.g. for bare-metal compiler testing with the linker script and startup code provided by libgloss. Nios II booting is also tweaked so that bare-metal binaries start executing in RAM starting at 0x00000000, rather than an alias at 0xc0000000, which allows features such as unwinding to work when binaries are linked to start at the beginning of the address space. The generic_nommu.c parts are based on code by Andrew Jenner, which was in turn based on code by Marek Vasut. Originally by Marek Vasut and Andrew Jenner. Signed-off-by: Sandra Loosemore <sandra@codesourcery.com> Signed-off-by: Julian Brown <julian@codesourcery.com> Signed-off-by: Andrew Jenner <andrew@codesourcery.com> Signed-off-by: Marek Vasut <marex@denx.de> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 1554321185-2825-2-git-send-email-sandra@codesourcery.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
* Merge remote-tracking branch 'remotes/dgibson/tags/ppc-for-4.1-20190426' ↵Peter Maydell2019-04-2713-81/+732
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | into staging ppc patch queue 2019-04-26 Here's the first ppc target pull request for qemu-4.1. This has a number of things that have accumulated while qemu-4.0 was frozen. * A number of emulated MMU improvements from Ben Herrenschmidt * Assorted cleanups fro Greg Kurz * A large set of mostly mechanical cleanups from me to make target/ppc much closer to compliant with the modern coding style * Support for passthrough of NVIDIA GPUs using NVLink2 As well as some other assorted fixes. # gpg: Signature made Fri 26 Apr 2019 07:02:19 BST # gpg: using RSA key 75F46586AE61A66CC44E87DC6C38CACA20D9B392 # gpg: Good signature from "David Gibson <david@gibson.dropbear.id.au>" [full] # gpg: aka "David Gibson (Red Hat) <dgibson@redhat.com>" [full] # gpg: aka "David Gibson (ozlabs.org) <dgibson@ozlabs.org>" [full] # gpg: aka "David Gibson (kernel.org) <dwg@kernel.org>" [unknown] # Primary key fingerprint: 75F4 6586 AE61 A66C C44E 87DC 6C38 CACA 20D9 B392 * remotes/dgibson/tags/ppc-for-4.1-20190426: (36 commits) target/ppc: improve performance of large BAT invalidations ppc/hash32: Rework R and C bit updates ppc/hash64: Rework R and C bit updates ppc/spapr: Use proper HPTE accessors for H_READ target/ppc: Don't check UPRT in radix mode when in HV real mode target/ppc/kvm: Convert DPRINTF to traces target/ppc/trace-events: Fix trivial typo spapr: Drop duplicate PCI swizzle code spapr_pci: Get rid of duplicate code for node name creation target/ppc: Style fixes for translate/spe-impl.inc.c target/ppc: Style fixes for translate/vmx-impl.inc.c target/ppc: Style fixes for translate/vsx-impl.inc.c target/ppc: Style fixes for translate/fp-impl.inc.c target/ppc: Style fixes for translate.c target/ppc: Style fixes for translate_init.inc.c target/ppc: Style fixes for monitor.c target/ppc: Style fixes for mmu_helper.c target/ppc: Style fixes for mmu-hash64.[ch] target/ppc: Style fixes for mmu-hash32.[ch] target/ppc: Style fixes for misc_helper.c ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
| * ppc/hash64: Rework R and C bit updatesBenjamin Herrenschmidt2019-04-262-10/+44
| | | | | | | | | | | | | | | | | | | | | | | | | | | | With MT-TCG, we are now running translation in a racy way, thus we need to mimic hardware when it comes to updating the R and C bits, by doing byte stores. The current "store_hpte" abstraction is ill suited for this, we replace it with two separate callbacks for setting R and C. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Cédric Le Goater <clg@kaod.org> Message-Id: <20190411080004.8690-4-clg@kaod.org> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
| * ppc/spapr: Use proper HPTE accessors for H_READBenjamin Herrenschmidt2019-04-261-6/+5Star
| | | | | | | | | | | | | | Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Cédric Le Goater <clg@kaod.org> Message-Id: <20190411080004.8690-3-clg@kaod.org> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
| * spapr: Drop duplicate PCI swizzle codeGreg Kurz2019-04-262-21/+5Star
| | | | | | | | | | | | | | | | | | | | | | | | | | LSI mapping in spapr currently open-codes standard PCI swizzling. It thus duplicates the code of pci_swizzle_map_irq_fn(). Expose the swizzling formula so that it can be used with a slot number when building the device tree. Simply drop pci_spapr_map_irq() and call pci_swizzle_map_irq_fn() instead. Signed-off-by: Greg Kurz <groug@kaod.org> Message-Id: <155448184841.8446.13959787238854054119.stgit@bahia.lan> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
| * spapr_pci: Get rid of duplicate code for node name creationGreg Kurz2019-04-261-4/+1Star
| | | | | | | | | | | | | | | | | | | | | | | | According to the changelog of 298a971024534, SpaprPhbState::dtbusname was introduced to "make it easier to relate the guest and qemu views of memory to each other", hence its name. Use it when creating the PHB node to avoid code duplication. Signed-off-by: Greg Kurz <groug@kaod.org> Message-Id: <155448184292.8446.8225650773162648595.stgit@bahia.lan> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
| * spapr/irq: remove spapr_ics_create()Cédric Le Goater2019-04-261-30/+14Star
| | | | | | | | | | | | | | | | | | spapr_ics_create() is only called once. Merge it in spapr_irq_init_xics() and simplify a bit the error handling by using 'error_fatal' . Signed-off-by: Cédric Le Goater <clg@kaod.org> Message-Id: <20190321144914.19934-13-clg@kaod.org> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
| * spapr/rtas: modify spapr_rtas_register() to remove RTAS handlersCédric Le Goater2019-04-261-1/+1
| | | | | | | | | | | | | | | | | | Removing RTAS handlers will become necessary when the new pseries machine supporting multiple interrupt mode is introduced. Signed-off-by: Cédric Le Goater <clg@kaod.org> Message-Id: <20190321144914.19934-9-clg@kaod.org> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
| * hw/ppc/prep: Drop useless inclusion of "hw/input/i8042.h"Philippe Mathieu-Daudé2019-04-261-1/+0Star
| | | | | | | | | | | | | | | | | | | | | | In commit 47973a2dbf we split the last generic chipset out of the PC board, but missed to remove the i8042 keyboard controller. This omission was later fixed in commit 7cb00357c1, but here we forgot to remove the "i8042.h" include. Do it now. Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com> Message-Id: <20190316201528.9140-1-philmd@redhat.com> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
| * spapr: Support NVIDIA V100 GPU with NVLink2Alexey Kardashevskiy2019-04-268-8/+662
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | NVIDIA V100 GPUs have on-board RAM which is mapped into the host memory space and accessible as normal RAM via an NVLink bus. The VFIO-PCI driver implements special regions for such GPUs and emulates an NVLink bridge. NVLink2-enabled POWER9 CPUs also provide address translation services which includes an ATS shootdown (ATSD) register exported via the NVLink bridge device. This adds a quirk to VFIO to map the GPU memory and create an MR; the new MR is stored in a PCI device as a QOM link. The sPAPR PCI uses this to get the MR and map it to the system address space. Another quirk does the same for ATSD. This adds additional steps to sPAPR PHB setup: 1. Search for specific GPUs and NPUs, collect findings in sPAPRPHBState::nvgpus, manage system address space mappings; 2. Add device-specific properties such as "ibm,npu", "ibm,gpu", "memory-block", "link-speed" to advertise the NVLink2 function to the guest; 3. Add "mmio-atsd" to vPHB to advertise the ATSD capability; 4. Add new memory blocks (with extra "linux,memory-usable" to prevent the guest OS from accessing the new memory until it is onlined) and npuphb# nodes representing an NPU unit for every vPHB as the GPU driver uses it for link discovery. This allocates space for GPU RAM and ATSD like we do for MMIOs by adding 2 new parameters to the phb_placement() hook. Older machine types set these to zero. This puts new memory nodes in a separate NUMA node to as the GPU RAM needs to be configured equally distant from any other node in the system. Unlike the host setup which assigns numa ids from 255 downwards, this adds new NUMA nodes after the user configures nodes or from 1 if none were configured. This adds requirement similar to EEH - one IOMMU group per vPHB. The reason for this is that ATSD registers belong to a physical NPU so they cannot invalidate translations on GPUs attached to another NPU. It is guaranteed by the host platform as it does not mix NVLink bridges or GPUs from different NPU in the same IOMMU group. If more than one IOMMU group is detected on a vPHB, this disables ATSD support for that vPHB and prints a warning. Signed-off-by: Alexey Kardashevskiy <aik@ozlabs.ru> [aw: for vfio portions] Acked-by: Alex Williamson <alex.williamson@redhat.com> Message-Id: <20190312082103.130561-1-aik@ozlabs.ru> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
* | Merge remote-tracking branch 'remotes/ehabkost/tags/x86-next-pull-request' ↵Peter Maydell2019-04-263-0/+5
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | into staging x86 queue, 2019-04-25 * Hygon Dhyana CPU model (Pu Wen) * Categorize a few devices in hw/i386 (Ernest Esene) * Support host-cache-info on TOPOEXT CPUID leaf (Stanislav Lanci) # gpg: Signature made Thu 25 Apr 2019 19:12:25 BST # gpg: using RSA key 2807936F984DC5A6 # gpg: Good signature from "Eduardo Habkost <ehabkost@redhat.com>" [full] # Primary key fingerprint: 5A32 2FD5 ABC4 D3DB ACCF D1AA 2807 936F 984D C5A6 * remotes/ehabkost/tags/x86-next-pull-request: Pass through cache information for TOPOEXT CPUs Categorize devices: iommu Categorize devices: IGD passthrough ISA bridge i386: Add new Hygon 'Dhyana' CPU model Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
| * | Categorize devices: iommuErnest Esene2019-04-252-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Set category and description for iommu devices. Signed-off-by: Ernest Esene <eroken1@gmail.com> Message-Id: <20190327170518.GA16887@erokenlabserver> Reviewed-by: Eduardo Habkost <ehabkost@redhat.com> [ehabkost: edited commit message] Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
| * | Categorize devices: IGD passthrough ISA bridgeErnest Esene2019-04-251-0/+1
| |/ | | | | | | | | | | | | | | | | | | Set category for the device. Signed-off-by: Ernest Esene <eroken1@gmail.com> Message-Id: <20190327133714.GA9329@erokenlabserver> Reviewed-by: Eduardo Habkost <ehabkost@redhat.com> [ehabkost: edited commit message] Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
* | Merge remote-tracking branch ↵Peter Maydell2019-04-267-6/+65
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | 'remotes/ehabkost/tags/machine-next-pull-request' into staging Machine queue, 2019-04-25 * 4.1 machine-types (Cornelia Huck) * Support MAP_SYNC on pmem memory backends (Zhang Yi) * -cpu parsing fixes and cleanups (Eduardo Habkost) * machine initialization cleanups (Wei Yang, Markus Armbruster) # gpg: Signature made Thu 25 Apr 2019 18:54:57 BST # gpg: using RSA key 2807936F984DC5A6 # gpg: Good signature from "Eduardo Habkost <ehabkost@redhat.com>" [full] # Primary key fingerprint: 5A32 2FD5 ABC4 D3DB ACCF D1AA 2807 936F 984D C5A6 * remotes/ehabkost/tags/machine-next-pull-request: util/mmap-alloc: support MAP_SYNC in qemu_ram_mmap() linux-headers: add linux/mman.h. scripts/update-linux-headers: add linux/mman.h util/mmap-alloc: Add a 'is_pmem' parameter to qemu_ram_mmap cpu: Fix crash with empty -cpu option cpu: Rename parse_cpu_model() to parse_cpu_option() vl: Simplify machine_parse() vl: Clean up after previous commit vl.c: allocate TYPE_MACHINE list once during bootup vl.c: make find_default_machine() local hw: add compat machines for 4.1 Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
| * | hw: add compat machines for 4.1Cornelia Huck2019-04-257-6/+65
| |/ | | | | | | | | | | | | | | | | | | Add 4.1 machine types for arm/i440fx/q35/s390x/spapr. Signed-off-by: Cornelia Huck <cohuck@redhat.com> Message-Id: <20190411102025.22559-1-cohuck@redhat.com> Acked-by: Greg Kurz <groug@kaod.org> Acked-by: David Gibson <david@gibson.dropbear.id.au> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
* | Merge tag 's390-ccw-bios-2019-04-12' into s390-next-stagingCornelia Huck2019-04-253-18/+58
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Support for booting from a vfio-ccw passthrough dasd device # gpg: Signature made Fri 12 Apr 2019 01:17:03 PM CEST # gpg: using RSA key 2ED9D774FE702DB5 # gpg: Good signature from "Thomas Huth <th.huth@gmx.de>" [full] # gpg: aka "Thomas Huth <thuth@redhat.com>" [undefined] # gpg: aka "Thomas Huth <huth@tuxfamily.org>" [undefined] # gpg: aka "Thomas Huth <th.huth@posteo.de>" [unknown] * tag 's390-ccw-bios-2019-04-12': pc-bios/s390: Update firmware images s390-bios: Use control unit type to find bootable devices s390-bios: Support booting from real dasd device s390-bios: Add channel command codes/structs needed for dasd-ipl s390-bios: Use control unit type to determine boot method s390-bios: Refactor virtio to run channel programs via cio s390-bios: Factor finding boot device out of virtio code path s390-bios: Extend find_dev() for non-virtio devices s390-bios: cio error handling s390-bios: Support for running format-0/1 channel programs s390-bios: ptr2u32 and u32toptr s390-bios: Map low core memory s390-bios: Decouple channel i/o logic from virtio s390-bios: Clean up cio.h s390-bios: decouple common boot logic from virtio s390-bios: decouple cio setup from virtio s390 vfio-ccw: Add bootindex property and IPLB data Signed-off-by: Cornelia Huck <cohuck@redhat.com>
| * | s390 vfio-ccw: Add bootindex property and IPLB dataJason J. Herne2019-04-123-18/+58
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add bootindex property and iplb data for vfio-ccw devices. This allows us to forward boot information into the bios for vfio-ccw devices. Refactor s390_get_ccw_device() to return device type. This prevents us from having to use messy casting logic in several places. Signed-off-by: Jason J. Herne <jjherne@linux.ibm.com> Acked-by: Halil Pasic <pasic@linux.vnet.ibm.com> Reviewed-by: Cornelia Huck <cohuck@redhat.com> Reviewed-by: Thomas Huth <thuth@redhat.com> Message-Id: <1554388475-18329-2-git-send-email-jjherne@linux.ibm.com> [thuth: fixed "typedef struct VFIOCCWDevice" build failure with clang] Signed-off-by: Thomas Huth <thuth@redhat.com>
* | | exec: Introduce qemu_maxrampagesize() and rename qemu_getrampagesize()David Hildenbrand2019-04-253-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Rename qemu_getrampagesize() to qemu_minrampagesize(). While at it, properly rename find_max_supported_pagesize() to find_min_backend_pagesize(). s390x is actually interested into the maximum ram pagesize, so introduce and use qemu_maxrampagesize(). Add a TODO, indicating that looking at any mapped memory backends is not 100% correct in some cases. Signed-off-by: David Hildenbrand <david@redhat.com> Message-Id: <20190417113143.5551-3-david@redhat.com> Reviewed-by: David Gibson <david@gibson.dropbear.id.au> Reviewed-by: Igor Mammedov <imammedo@redhat.com> Signed-off-by: Cornelia Huck <cohuck@redhat.com>
* | | s390x/kvm: Configure page size after memory has actually been initializedDavid Hildenbrand2019-04-251-0/+12
| |/ |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Right now we configure the pagesize quite early, when initializing KVM. This is long before system memory is actually allocated via memory_region_allocate_system_memory(), and therefore memory backends marked as mapped. Instead, let's configure the maximum page size after initializing memory in s390_memory_init(). cap_hpage_1m is still properly configured before creating any CPUs, and therefore before configuring the CPU model and eventually enabling CMMA. This is not a fix but rather a preparation for the future, when initial memory might reside on memory backends (not the case for s390x right now) We will replace qemu_getrampagesize() soon by a function that will always return the maximum page size (not the minimum page size, which only works by pure luck so far, as there are no memory backends). Acked-by: Igor Mammedov <imammedo@redhat.com> Reviewed-by: David Gibson <david@gibson.dropbear.id.au> Signed-off-by: David Hildenbrand <david@redhat.com> Message-Id: <20190417113143.5551-2-david@redhat.com> Signed-off-by: Cornelia Huck <cohuck@redhat.com>
* | vfio: Report warnings with warn_report(), not error_printf()Markus Armbruster2019-04-181-6/+13
| | | | | | | | | | | | | | Cc: Alex Williamson <alex.williamson@redhat.com> Signed-off-by: Markus Armbruster <armbru@redhat.com> Message-Id: <20190417190641.26814-8-armbru@redhat.com> Acked-by: Alex Williamson <alex.williamson@redhat.com>
* | hpet: Report warnings with warn_report(), not error_printf()Markus Armbruster2019-04-171-1/+1
| | | | | | | | | | | | | | Cc: "Michael S. Tsirkin" <mst@redhat.com> Cc: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Markus Armbruster <armbru@redhat.com> Message-Id: <20190417190641.26814-7-armbru@redhat.com>
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