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* hw/ppc/mac.h: Rename to include/hw/nvram/mac_nvram.hBALATON Zoltan2022-10-311-1/+1
* hw/ppc/mac.h: Move macio specific parts out from shared headerBALATON Zoltan2022-10-311-0/+21
* aspeed: sbc: Allow per-machine settingsJoel Stanley2022-07-141-0/+13
* hw/misc/aspeed: Add PECI controllerPeter Delevoryas2022-06-301-0/+29
* acpi: pvpanic-isa: use AcpiDevAmlIfClass:build_dev_aml to provide device's AMLIgor Mammedov2022-06-101-9/+0Star
* Clean up decorations and whitespace around header guardsMarkus Armbruster2022-05-113-3/+3
* Clean up header guards that don't match their file nameMarkus Armbruster2022-05-115-11/+11
* lasi: move from hw/hppa to hw/miscMark Cave-Ayland2022-05-081-0/+78
* aspeed/hace: Support AST1030 HACESteven Lee2022-05-031-0/+2
* aspeed/hace: Support AST2600 HACESteven Lee2022-05-021-0/+4
* aspeed/hace: Support HMAC Key Buffer register.Steven Lee2022-05-021-0/+1
* aspeed/scu: Add AST1030 supportSteven Lee2022-05-021-0/+25
* hw: aspeed_scu: Introduce clkin_25Mhz attributeSteven Lee2022-05-021-0/+1
* hw: aspeed_scu: Add AST2600 apb_freq and hpll calculation functionSteven Lee2022-05-021-0/+19
* hw/misc: Add PWRON STRAP bit fields in GCR moduleHao Wu2022-04-211-0/+30
* hw/misc: Add a model of the Xilinx Versal CRLEdgar E. Iglesias2022-04-211-0/+235
* hw/misc: Add a model of the Xilinx ZynqMP APU ControlEdgar E. Iglesias2022-03-181-0/+93
* hw/misc: Add a model of the Xilinx ZynqMP CRFEdgar E. Iglesias2022-03-181-0/+211
* macio/pmu.c: remove redundant codeMark Cave-Ayland2022-03-091-2/+0Star
* mos6522: implement edge-triggering for CA1/2 and CB1/2 control line IRQsMark Cave-Ayland2022-03-091-0/+15
* mos6522: record last_irq_levels in mos6522_set_irq()Mark Cave-Ayland2022-03-091-0/+1
* mos6522: add "info via" HMP command for debuggingMark Cave-Ayland2022-03-091-0/+2
* mos6522: add register names to register read/write trace eventsMark Cave-Ayland2022-03-091-0/+2
* mos6522: remove update_irq() and set_sr_int() methods from MOS6522DeviceClassMark Cave-Ayland2022-03-091-2/+0Star
* mos6522: switch over to use qdev gpios for IRQsMark Cave-Ayland2022-03-092-5/+2Star
* mac_via: use IFR bit flag constants for VIA2 IRQsMark Cave-Ayland2022-03-091-10/+9Star
* mac_via: use IFR bit flag constants for VIA1 IRQsMark Cave-Ayland2022-03-091-10/+10
* mos6522: add defines for IFR bit flagsMark Cave-Ayland2022-03-091-7/+15
* hw/misc/pvpanic: Use standard headers insteadzhenwei pi2022-03-061-8/+0Star
* ast2600: Add Secure Boot Controller modelJoel Stanley2022-02-261-0/+32
* hw/misc: Add a model of Versal's PMC SLCRFrancisco Iglesias2022-01-281-0/+78
* hw/misc/aspeed_i3c.c: Introduce a dummy AST2600 I3C model.Troy Lee2022-01-201-0/+48
* hw/m68k: Fix typo in SPDX tagPhilippe Mathieu-Daudé2021-11-091-1/+1
* mac_via: add GPIO for A/UX modeMark Cave-Ayland2021-10-201-0/+1
* aspeed: Emulate the AST2600A3Joel Stanley2021-09-201-0/+2
* mac_via: add qdev gpios for nubus slot interrupts to VIA2Mark Cave-Ayland2021-09-081-0/+10
* mac_via: rename VIA2_IRQ_SLOT_BIT to VIA2_IRQ_NUBUS_BITMark Cave-Ayland2021-09-081-11/+11
* mac_via: remove mac_via deviceMark Cave-Ayland2021-09-081-16/+5Star
* mac_via: move ADB variables to MOS6522Q800VIA1StateMark Cave-Ayland2021-09-081-10/+10
* mac_via: move PRAM/RTC variables to MOS6522Q800VIA1StateMark Cave-Ayland2021-09-081-11/+10Star
* mac_via: move PRAM contents and block backend to MOS6522Q800VIA1StateMark Cave-Ayland2021-09-081-3/+4
* arm: Move M-profile RAS register block into its own devicePeter Maydell2021-09-011-0/+37
* Merge remote-tracking branch 'remotes/cminyard/tags/for-qemu-6.1-2' into stagingPeter Maydell2021-07-114-190/+0Star
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| * sensor: Move hardware sensors from misc to a sensor directoryCorey Minyard2021-06-172-88/+0Star
| * adc: Move the max111x driver to the adc directoryCorey Minyard2021-06-171-56/+0Star
| * adc: Move the zynq-xadc file to the adc directoriesCorey Minyard2021-06-171-46/+0Star
* | hw/arm: Add basic power management to raspi.Nolan Leake2021-07-021-0/+29
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* hw/misc/mps2-scc: Support using CFG0 bit 0 for remappingPeter Maydell2021-05-101-0/+9
* hw/misc/mps2-scc: Add "QEMU interface" commentPeter Maydell2021-05-101-0/+12
* Merge remote-tracking branch 'remotes/vivier2/tags/trivial-branch-for-6.1-pul...Peter Maydell2021-05-053-3/+0Star
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